1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "amdgpu_reset.h" 37 #include "kfd_priv.h" 38 #include "kfd_svm.h" 39 #include "kfd_migrate.h" 40 #include "kfd_smi_events.h" 41 42 #ifdef dev_fmt 43 #undef dev_fmt 44 #endif 45 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 46 47 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 48 49 /* Long enough to ensure no retry fault comes after svm range is restored and 50 * page table is updated. 51 */ 52 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 53 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 54 #define dynamic_svm_range_dump(svms) \ 55 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 56 #else 57 #define dynamic_svm_range_dump(svms) \ 58 do { if (0) svm_range_debug_dump(svms); } while (0) 59 #endif 60 61 /* Giant svm range split into smaller ranges based on this, it is decided using 62 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 63 * power of 2MB. 64 */ 65 static uint64_t max_svm_range_pages; 66 67 struct criu_svm_metadata { 68 struct list_head list; 69 struct kfd_criu_svm_range_priv_data data; 70 }; 71 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del_init(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvzalloc_objs(*addr, prange->npages); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 202 return 0; 203 } 204 205 static int 206 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 207 unsigned long offset, unsigned long npages, 208 unsigned long *hmm_pfns) 209 { 210 struct kfd_process *p; 211 uint32_t gpuidx; 212 int r; 213 214 p = container_of(prange->svms, struct kfd_process, svms); 215 216 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 217 struct kfd_process_device *pdd; 218 219 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 220 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 221 if (!pdd) { 222 pr_debug("failed to find device idx %d\n", gpuidx); 223 return -EINVAL; 224 } 225 226 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 227 hmm_pfns, gpuidx); 228 if (r) 229 break; 230 } 231 232 return r; 233 } 234 235 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 236 unsigned long offset, unsigned long npages) 237 { 238 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 239 int i; 240 241 if (!dma_addr) 242 return; 243 244 for (i = offset; i < offset + npages; i++) { 245 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 246 continue; 247 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 248 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 249 dma_addr[i] = 0; 250 } 251 } 252 253 void svm_range_dma_unmap(struct svm_range *prange) 254 { 255 struct kfd_process_device *pdd; 256 dma_addr_t *dma_addr; 257 struct device *dev; 258 struct kfd_process *p; 259 uint32_t gpuidx; 260 261 p = container_of(prange->svms, struct kfd_process, svms); 262 263 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 264 dma_addr = prange->dma_addr[gpuidx]; 265 if (!dma_addr) 266 continue; 267 268 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 269 if (!pdd) { 270 pr_debug("failed to find device idx %d\n", gpuidx); 271 continue; 272 } 273 dev = &pdd->dev->adev->pdev->dev; 274 275 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 276 } 277 } 278 279 static void svm_range_free(struct svm_range *prange, bool do_unmap) 280 { 281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 282 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 283 uint32_t gpuidx; 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 /* Unlink from range_list; no-op if already unlinked. */ 289 if (prange->svm_bo) { 290 spin_lock(&prange->svm_bo->list_lock); 291 list_del_init(&prange->svm_bo_list); 292 spin_unlock(&prange->svm_bo->list_lock); 293 } 294 295 /* Wait for any in-flight eviction of this range to finish. */ 296 mutex_lock(&prange->migrate_mutex); 297 mutex_unlock(&prange->migrate_mutex); 298 299 svm_range_vram_node_free(prange); 300 if (do_unmap) 301 svm_range_dma_unmap(prange); 302 303 if (do_unmap && !p->xnack_enabled) { 304 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 305 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 306 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 307 } 308 309 /* free dma_addr array for each gpu */ 310 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 311 if (prange->dma_addr[gpuidx]) { 312 kvfree(prange->dma_addr[gpuidx]); 313 prange->dma_addr[gpuidx] = NULL; 314 } 315 } 316 317 mutex_destroy(&prange->lock); 318 mutex_destroy(&prange->migrate_mutex); 319 kfree(prange); 320 } 321 322 static void 323 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location, 324 int32_t *prefetch_loc, uint8_t *granularity, 325 uint32_t *flags) 326 { 327 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 328 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 329 *granularity = svms->default_granularity; 330 *flags = 331 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 332 } 333 334 static struct 335 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 336 uint64_t last, bool update_mem_usage) 337 { 338 uint64_t size = last - start + 1; 339 struct svm_range *prange; 340 struct kfd_process *p; 341 342 prange = kzalloc_obj(*prange); 343 if (!prange) 344 return NULL; 345 346 p = container_of(svms, struct kfd_process, svms); 347 if (!p->xnack_enabled && update_mem_usage && 348 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 349 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 350 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 351 kfree(prange); 352 return NULL; 353 } 354 prange->npages = size; 355 prange->svms = svms; 356 prange->start = start; 357 prange->last = last; 358 INIT_LIST_HEAD(&prange->list); 359 INIT_LIST_HEAD(&prange->update_list); 360 INIT_LIST_HEAD(&prange->svm_bo_list); 361 INIT_LIST_HEAD(&prange->deferred_list); 362 INIT_LIST_HEAD(&prange->child_list); 363 atomic_set(&prange->invalid, 0); 364 prange->validate_timestamp = 0; 365 prange->vram_pages = 0; 366 mutex_init(&prange->migrate_mutex); 367 mutex_init(&prange->lock); 368 369 if (p->xnack_enabled) 370 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 371 MAX_GPU_INSTANCE); 372 373 svm_range_set_default_attributes(svms, &prange->preferred_loc, 374 &prange->prefetch_loc, 375 &prange->granularity, &prange->flags); 376 377 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 378 379 return prange; 380 } 381 382 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 383 { 384 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 385 return false; 386 387 return true; 388 } 389 390 static void svm_range_bo_release(struct kref *kref) 391 { 392 struct svm_range_bo *svm_bo; 393 struct amdgpu_bo *bo; 394 395 svm_bo = container_of(kref, struct svm_range_bo, kref); 396 bo = &svm_bo->bo; 397 pr_debug("svm_bo 0x%p\n", svm_bo); 398 399 spin_lock(&svm_bo->list_lock); 400 while (!list_empty(&svm_bo->range_list)) { 401 struct svm_range *prange = 402 list_first_entry(&svm_bo->range_list, 403 struct svm_range, svm_bo_list); 404 /* list_del_init tells a concurrent svm_range_vram_node_new when 405 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 406 */ 407 list_del_init(&prange->svm_bo_list); 408 spin_unlock(&svm_bo->list_lock); 409 410 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 411 prange->start, prange->last); 412 mutex_lock(&prange->lock); 413 prange->svm_bo = NULL; 414 /* prange should not hold vram page now */ 415 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 416 mutex_unlock(&prange->lock); 417 418 spin_lock(&svm_bo->list_lock); 419 } 420 spin_unlock(&svm_bo->list_lock); 421 422 if (mmget_not_zero(svm_bo->mm)) { 423 struct kfd_process_device *pdd; 424 struct kfd_process *p; 425 struct mm_struct *mm; 426 427 mm = svm_bo->mm; 428 /* 429 * The forked child process takes svm_bo device pages ref, svm_bo could be 430 * released after parent process is gone. 431 */ 432 p = kfd_lookup_process_by_mm(mm); 433 if (p) { 434 pdd = kfd_get_process_device_data(svm_bo->node, p); 435 if (pdd) 436 atomic64_sub(amdgpu_bo_size(bo), &pdd->vram_usage); 437 kfd_unref_process(p); 438 } 439 mmput(mm); 440 } 441 442 amdgpu_bo_unref(&bo); 443 } 444 445 static void svm_range_bo_wq_release(struct work_struct *work) 446 { 447 struct svm_range_bo *svm_bo; 448 449 svm_bo = container_of(work, struct svm_range_bo, release_work); 450 svm_range_bo_release(&svm_bo->kref); 451 } 452 453 static void svm_range_bo_release_async(struct kref *kref) 454 { 455 struct svm_range_bo *svm_bo; 456 457 svm_bo = container_of(kref, struct svm_range_bo, kref); 458 pr_debug("svm_bo 0x%p\n", svm_bo); 459 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 460 schedule_work(&svm_bo->release_work); 461 } 462 463 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 464 { 465 kref_put(&svm_bo->kref, svm_range_bo_release_async); 466 } 467 468 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 469 { 470 if (svm_bo) 471 kref_put(&svm_bo->kref, svm_range_bo_release); 472 } 473 474 static bool 475 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 476 { 477 mutex_lock(&prange->lock); 478 if (!prange->svm_bo) { 479 mutex_unlock(&prange->lock); 480 return false; 481 } 482 if (prange->ttm_res) { 483 /* We still have a reference, all is well */ 484 mutex_unlock(&prange->lock); 485 return true; 486 } 487 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 488 /* 489 * Migrate from GPU to GPU, remove range from source svm_bo->node 490 * range list, and return false to allocate svm_bo from destination 491 * node. 492 */ 493 if (prange->svm_bo->node != node) { 494 mutex_unlock(&prange->lock); 495 496 spin_lock(&prange->svm_bo->list_lock); 497 list_del_init(&prange->svm_bo_list); 498 spin_unlock(&prange->svm_bo->list_lock); 499 500 svm_range_bo_unref(prange->svm_bo); 501 return false; 502 } 503 if (READ_ONCE(prange->svm_bo->evicting)) { 504 /* The BO is getting evicted, 505 * we need to get a new one 506 */ 507 mutex_unlock(&prange->lock); 508 svm_range_bo_unref(prange->svm_bo); 509 } else { 510 /* The BO was still around and we got 511 * a new reference to it 512 */ 513 mutex_unlock(&prange->lock); 514 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 515 prange->svms, prange->start, prange->last); 516 517 prange->ttm_res = prange->svm_bo->bo.tbo.resource; 518 return true; 519 } 520 521 } else { 522 mutex_unlock(&prange->lock); 523 } 524 525 /* We need a new svm_bo. Spin-loop to wait for concurrent 526 * svm_range_bo_release to finish removing this range from 527 * its range list and set prange->svm_bo to null. After this, 528 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 529 */ 530 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 531 cond_resched(); 532 533 return false; 534 } 535 536 #define to_svm_range_bo(bo) container_of((bo), struct svm_range_bo, bo) 537 538 void svm_range_bo_destroy(struct ttm_buffer_object *tbo) 539 { 540 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(tbo); 541 struct svm_range_bo *svm_bo = to_svm_range_bo(bo); 542 543 drm_gem_object_release(&bo->tbo.base); 544 /* 545 * svm_bo->mm is only set once the BO is fully created. If 546 * ttm_bo_init_reserved() fails (e.g. no VRAM could be evicted), it 547 * calls this destroy callback with mm still NULL, so guard the drop. 548 */ 549 if (svm_bo->mm) 550 mmdrop(svm_bo->mm); 551 kvfree(svm_bo); 552 } 553 554 int 555 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 556 bool clear) 557 { 558 struct kfd_process_device *pdd; 559 struct amdgpu_bo_param bp; 560 struct svm_range_bo *svm_bo; 561 struct amdgpu_bo *bo; 562 struct kfd_process *p; 563 struct mm_struct *mm; 564 int r; 565 566 p = container_of(prange->svms, struct kfd_process, svms); 567 pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n", 568 p->lead_thread->pid, prange->svms, 569 prange->start, prange->last); 570 571 if (svm_range_validate_svm_bo(node, prange)) 572 return 0; 573 574 mm = get_task_mm(p->lead_thread); 575 if (!mm) { 576 pr_debug("failed to get mm\n"); 577 return -ESRCH; 578 } 579 580 memset(&bp, 0, sizeof(bp)); 581 bp.size = prange->npages * PAGE_SIZE; 582 bp.bo_ptr_size = sizeof(struct svm_range_bo); 583 bp.destroy = svm_range_bo_destroy; 584 bp.byte_align = PAGE_SIZE; 585 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 586 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 587 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 588 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 589 bp.type = ttm_bo_type_device; 590 bp.resv = NULL; 591 if (node->xcp) 592 bp.xcp_id_plus1 = node->xcp->id + 1; 593 594 r = amdgpu_bo_create(node->adev, &bp, &bo); 595 if (r) { 596 pr_debug("failed %d to create bo\n", r); 597 mmput(mm); 598 goto create_bo_failed; 599 } 600 601 svm_bo = to_svm_range_bo(bo); 602 svm_bo->evicting = 0; 603 kref_init(&svm_bo->kref); 604 INIT_LIST_HEAD(&svm_bo->range_list); 605 spin_lock_init(&svm_bo->list_lock); 606 607 svm_bo->node = node; 608 svm_bo->mm = mm; 609 mmgrab(svm_bo->mm); 610 mmput(mm); 611 612 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 613 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 614 bp.xcp_id_plus1 - 1); 615 616 r = amdgpu_bo_reserve(bo, true); 617 if (r) { 618 pr_debug("failed %d to reserve bo\n", r); 619 goto reserve_bo_failed; 620 } 621 622 if (clear) { 623 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 624 if (r) { 625 pr_debug("failed %d to sync bo\n", r); 626 amdgpu_bo_unreserve(bo); 627 goto reserve_bo_failed; 628 } 629 } 630 631 amdgpu_bo_unreserve(bo); 632 633 prange->svm_bo = svm_bo; 634 prange->ttm_res = bo->tbo.resource; 635 prange->offset = 0; 636 637 spin_lock(&svm_bo->list_lock); 638 list_add(&prange->svm_bo_list, &svm_bo->range_list); 639 spin_unlock(&svm_bo->list_lock); 640 641 pdd = svm_range_get_pdd_by_node(prange, node); 642 if (pdd) 643 atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage); 644 645 return 0; 646 647 reserve_bo_failed: 648 amdgpu_bo_unref(&bo); 649 create_bo_failed: 650 651 return r; 652 } 653 654 void svm_range_vram_node_free(struct svm_range *prange) 655 { 656 /* serialize prange->svm_bo unref */ 657 mutex_lock(&prange->lock); 658 /* prange->svm_bo has not been unref */ 659 if (prange->ttm_res) { 660 prange->ttm_res = NULL; 661 mutex_unlock(&prange->lock); 662 svm_range_bo_unref(prange->svm_bo); 663 } else 664 mutex_unlock(&prange->lock); 665 } 666 667 struct kfd_node * 668 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 669 { 670 struct kfd_process *p; 671 struct kfd_process_device *pdd; 672 673 p = container_of(prange->svms, struct kfd_process, svms); 674 pdd = kfd_process_device_data_by_id(p, gpu_id); 675 if (!pdd) { 676 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 677 return NULL; 678 } 679 680 return pdd->dev; 681 } 682 683 struct kfd_process_device * 684 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 685 { 686 struct kfd_process *p; 687 688 p = container_of(prange->svms, struct kfd_process, svms); 689 690 return kfd_get_process_device_data(node, p); 691 } 692 693 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 694 { 695 struct ttm_operation_ctx ctx = { false, false }; 696 697 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 698 699 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 700 } 701 702 static int 703 svm_range_check_attr(struct kfd_process *p, 704 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 705 { 706 uint32_t i; 707 708 for (i = 0; i < nattr; i++) { 709 uint32_t val = attrs[i].value; 710 int gpuidx = MAX_GPU_INSTANCE; 711 712 switch (attrs[i].type) { 713 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 714 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 715 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 716 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 717 break; 718 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 719 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 720 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 721 break; 722 case KFD_IOCTL_SVM_ATTR_ACCESS: 723 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 724 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 725 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 726 break; 727 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 728 break; 729 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 730 break; 731 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 732 break; 733 default: 734 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 735 return -EINVAL; 736 } 737 738 if (gpuidx < 0) { 739 pr_debug("no GPU 0x%x found\n", val); 740 return -EINVAL; 741 } else if (gpuidx < MAX_GPU_INSTANCE && 742 !test_bit(gpuidx, p->svms.bitmap_supported)) { 743 pr_debug("GPU 0x%x not supported\n", val); 744 return -EINVAL; 745 } 746 } 747 748 return 0; 749 } 750 751 static void svm_range_update_checkpoint_timestamp(struct kfd_process *p) 752 { 753 struct svm_range_list *svms; 754 int i; 755 756 svms = &p->svms; 757 758 /* calculate time stamps that are used to decide which page faults need be 759 * dropped or handled before unmap pages from gpu vm 760 */ 761 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 762 struct kfd_process_device *pdd; 763 struct amdgpu_device *adev; 764 struct amdgpu_ih_ring *ih; 765 uint32_t checkpoint_wptr; 766 767 pdd = p->pdds[i]; 768 if (!pdd) 769 continue; 770 771 adev = pdd->dev->adev; 772 773 /* Check and drain ih1 ring if cam not available */ 774 if (!adev->irq.retry_cam_enabled && adev->irq.ih1.ring_size) { 775 ih = &adev->irq.ih1; 776 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 777 if (ih->rptr != checkpoint_wptr) { 778 atomic64_set(&svms->checkpoint_ts[i], 779 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1)); 780 continue; 781 } 782 } 783 784 /* check if dev->irq.ih_soft is not empty */ 785 ih = &adev->irq.ih_soft; 786 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 787 if (ih->rptr != checkpoint_wptr) 788 atomic64_set(&svms->checkpoint_ts[i], 789 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1)); 790 } 791 } 792 793 static void 794 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 795 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 796 bool *update_mapping) 797 { 798 uint32_t i; 799 int gpuidx; 800 801 for (i = 0; i < nattr; i++) { 802 switch (attrs[i].type) { 803 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 804 prange->preferred_loc = attrs[i].value; 805 break; 806 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 807 prange->prefetch_loc = attrs[i].value; 808 break; 809 case KFD_IOCTL_SVM_ATTR_ACCESS: 810 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 811 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 812 if (!p->xnack_enabled) 813 *update_mapping = true; 814 815 gpuidx = kfd_process_gpuidx_from_gpuid(p, 816 attrs[i].value); 817 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 818 bitmap_clear(prange->bitmap_access, gpuidx, 1); 819 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 820 if (test_bit(gpuidx, prange->bitmap_mapped)) 821 bitmap_set(prange->bitmap_needs_unmap, gpuidx, 1); 822 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 823 bitmap_set(prange->bitmap_access, gpuidx, 1); 824 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 825 } else { 826 bitmap_clear(prange->bitmap_access, gpuidx, 1); 827 bitmap_set(prange->bitmap_aip, gpuidx, 1); 828 } 829 break; 830 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 831 *update_mapping = true; 832 prange->flags |= attrs[i].value; 833 break; 834 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 835 *update_mapping = true; 836 prange->flags &= ~attrs[i].value; 837 break; 838 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 839 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 840 break; 841 default: 842 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 843 } 844 } 845 } 846 847 static bool 848 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 849 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 850 { 851 uint32_t i; 852 int gpuidx; 853 854 for (i = 0; i < nattr; i++) { 855 switch (attrs[i].type) { 856 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 857 if (prange->preferred_loc != attrs[i].value) 858 return false; 859 break; 860 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 861 /* Prefetch should always trigger a migration even 862 * if the value of the attribute didn't change. 863 */ 864 return false; 865 case KFD_IOCTL_SVM_ATTR_ACCESS: 866 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 867 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 868 gpuidx = kfd_process_gpuidx_from_gpuid(p, 869 attrs[i].value); 870 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 871 if (test_bit(gpuidx, prange->bitmap_access) || 872 test_bit(gpuidx, prange->bitmap_aip)) 873 return false; 874 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 875 if (!test_bit(gpuidx, prange->bitmap_access)) 876 return false; 877 } else { 878 if (!test_bit(gpuidx, prange->bitmap_aip)) 879 return false; 880 } 881 break; 882 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 883 if ((prange->flags & attrs[i].value) != attrs[i].value) 884 return false; 885 break; 886 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 887 if ((prange->flags & attrs[i].value) != 0) 888 return false; 889 break; 890 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 891 if (prange->granularity != attrs[i].value) 892 return false; 893 break; 894 default: 895 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 896 } 897 } 898 899 return true; 900 } 901 902 /** 903 * svm_range_debug_dump - print all range information from svms 904 * @svms: svm range list header 905 * 906 * debug output svm range start, end, prefetch location from svms 907 * interval tree and link list 908 * 909 * Context: The caller must hold svms->lock 910 */ 911 static void svm_range_debug_dump(struct svm_range_list *svms) 912 { 913 struct interval_tree_node *node; 914 struct svm_range *prange; 915 916 pr_debug("dump svms 0x%p list\n", svms); 917 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 918 919 list_for_each_entry(prange, &svms->list, list) { 920 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 921 prange, prange->start, prange->npages, 922 prange->start + prange->npages - 1, 923 prange->actual_loc); 924 } 925 926 pr_debug("dump svms 0x%p interval tree\n", svms); 927 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 928 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 929 while (node) { 930 prange = container_of(node, struct svm_range, it_node); 931 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 932 prange, prange->start, prange->npages, 933 prange->start + prange->npages - 1, 934 prange->actual_loc); 935 node = interval_tree_iter_next(node, 0, ~0ULL); 936 } 937 } 938 939 static void * 940 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 941 uint64_t offset, uint64_t *vram_pages) 942 { 943 unsigned char *src = (unsigned char *)psrc + offset; 944 unsigned char *dst; 945 uint64_t i; 946 947 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 948 if (!dst) 949 return NULL; 950 951 if (!vram_pages) { 952 memcpy(dst, src, num_elements * size); 953 return (void *)dst; 954 } 955 956 *vram_pages = 0; 957 for (i = 0; i < num_elements; i++) { 958 dma_addr_t *temp; 959 temp = (dma_addr_t *)dst + i; 960 *temp = *((dma_addr_t *)src + i); 961 if (*temp&SVM_RANGE_VRAM_DOMAIN) 962 (*vram_pages)++; 963 } 964 965 return (void *)dst; 966 } 967 968 static int 969 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 970 { 971 int i; 972 973 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 974 if (!src->dma_addr[i]) 975 continue; 976 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 977 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 978 if (!dst->dma_addr[i]) 979 return -ENOMEM; 980 } 981 982 return 0; 983 } 984 985 static int 986 svm_range_split_array(void *ppnew, void *ppold, size_t size, 987 uint64_t old_start, uint64_t old_n, 988 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 989 { 990 unsigned char *new, *old, *pold; 991 uint64_t d; 992 993 if (!ppold) 994 return 0; 995 pold = *(unsigned char **)ppold; 996 if (!pold) 997 return 0; 998 999 d = (new_start - old_start) * size; 1000 /* get dma addr array for new range and calculte its vram page number */ 1001 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 1002 if (!new) 1003 return -ENOMEM; 1004 d = (new_start == old_start) ? new_n * size : 0; 1005 old = svm_range_copy_array(pold, size, old_n, d, NULL); 1006 if (!old) { 1007 kvfree(new); 1008 return -ENOMEM; 1009 } 1010 kvfree(pold); 1011 *(void **)ppold = old; 1012 *(void **)ppnew = new; 1013 1014 return 0; 1015 } 1016 1017 static int 1018 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 1019 uint64_t start, uint64_t last) 1020 { 1021 uint64_t npages = last - start + 1; 1022 int i, r; 1023 1024 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 1025 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 1026 sizeof(*old->dma_addr[i]), old->start, 1027 npages, new->start, new->npages, 1028 old->actual_loc ? &new->vram_pages : NULL); 1029 if (r) 1030 return r; 1031 } 1032 if (old->actual_loc) 1033 old->vram_pages -= new->vram_pages; 1034 1035 return 0; 1036 } 1037 1038 static int 1039 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 1040 uint64_t start, uint64_t last) 1041 { 1042 uint64_t npages = last - start + 1; 1043 1044 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 1045 new->svms, new, new->start, start, last); 1046 1047 if (new->start == old->start) { 1048 new->offset = old->offset; 1049 old->offset += new->npages; 1050 } else { 1051 new->offset = old->offset + npages; 1052 } 1053 1054 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1055 new->ttm_res = old->ttm_res; 1056 1057 spin_lock(&new->svm_bo->list_lock); 1058 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1059 spin_unlock(&new->svm_bo->list_lock); 1060 1061 return 0; 1062 } 1063 1064 /** 1065 * svm_range_split_adjust - split range and adjust 1066 * 1067 * @new: new range 1068 * @old: the old range 1069 * @start: the old range adjust to start address in pages 1070 * @last: the old range adjust to last address in pages 1071 * 1072 * Copy system memory dma_addr or vram ttm_res in old range to new 1073 * range from new_start up to size new->npages, the remaining old range is from 1074 * start to last 1075 * 1076 * Return: 1077 * 0 - OK, -ENOMEM - out of memory 1078 */ 1079 static int 1080 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1081 uint64_t start, uint64_t last) 1082 { 1083 int r; 1084 1085 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1086 new->svms, new->start, old->start, old->last, start, last); 1087 1088 if (new->start < old->start || 1089 new->last > old->last) { 1090 WARN_ONCE(1, "invalid new range start or last\n"); 1091 return -EINVAL; 1092 } 1093 1094 r = svm_range_split_pages(new, old, start, last); 1095 if (r) 1096 return r; 1097 1098 if (old->actual_loc && old->ttm_res) { 1099 r = svm_range_split_nodes(new, old, start, last); 1100 if (r) 1101 return r; 1102 } 1103 1104 old->npages = last - start + 1; 1105 old->start = start; 1106 old->last = last; 1107 new->flags = old->flags; 1108 new->preferred_loc = old->preferred_loc; 1109 new->prefetch_loc = old->prefetch_loc; 1110 new->actual_loc = old->actual_loc; 1111 new->granularity = old->granularity; 1112 new->mapping_done = old->mapping_done; 1113 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1114 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1115 bitmap_copy(new->bitmap_mapped, old->bitmap_mapped, MAX_GPU_INSTANCE); 1116 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1117 1118 return 0; 1119 } 1120 1121 /** 1122 * svm_range_split - split a range in 2 ranges 1123 * 1124 * @prange: the svm range to split 1125 * @start: the remaining range start address in pages 1126 * @last: the remaining range last address in pages 1127 * @new: the result new range generated 1128 * 1129 * Two cases only: 1130 * case 1: if start == prange->start 1131 * prange ==> prange[start, last] 1132 * new range [last + 1, prange->last] 1133 * 1134 * case 2: if last == prange->last 1135 * prange ==> prange[start, last] 1136 * new range [prange->start, start - 1] 1137 * 1138 * Return: 1139 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1140 */ 1141 static int 1142 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1143 struct svm_range **new) 1144 { 1145 uint64_t old_start = prange->start; 1146 uint64_t old_last = prange->last; 1147 struct svm_range_list *svms; 1148 int r = 0; 1149 1150 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1151 old_start, old_last, start, last); 1152 1153 if (old_start != start && old_last != last) 1154 return -EINVAL; 1155 if (start < old_start || last > old_last) 1156 return -EINVAL; 1157 1158 svms = prange->svms; 1159 if (old_start == start) 1160 *new = svm_range_new(svms, last + 1, old_last, false); 1161 else 1162 *new = svm_range_new(svms, old_start, start - 1, false); 1163 if (!*new) 1164 return -ENOMEM; 1165 1166 r = svm_range_split_adjust(*new, prange, start, last); 1167 if (r) { 1168 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1169 r, old_start, old_last, start, last); 1170 svm_range_free(*new, false); 1171 *new = NULL; 1172 } 1173 1174 return r; 1175 } 1176 1177 static int 1178 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1179 struct list_head *insert_list, struct list_head *remap_list) 1180 { 1181 unsigned long last_align_down = ALIGN_DOWN(prange->last + 1, 512); 1182 unsigned long start_align = ALIGN(prange->start, 512); 1183 bool huge_page_mapping = last_align_down > start_align; 1184 struct svm_range *tail = NULL; 1185 int r; 1186 1187 r = svm_range_split(prange, prange->start, new_last, &tail); 1188 1189 if (r) 1190 return r; 1191 1192 list_add(&tail->list, insert_list); 1193 1194 if (huge_page_mapping && tail->start > start_align && 1195 tail->start < last_align_down && (!IS_ALIGNED(tail->start, 512))) 1196 list_add(&tail->update_list, remap_list); 1197 1198 return 0; 1199 } 1200 1201 static int 1202 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1203 struct list_head *insert_list, struct list_head *remap_list) 1204 { 1205 unsigned long last_align_down = ALIGN_DOWN(prange->last + 1, 512); 1206 unsigned long start_align = ALIGN(prange->start, 512); 1207 bool huge_page_mapping = last_align_down > start_align; 1208 struct svm_range *head = NULL; 1209 int r; 1210 1211 r = svm_range_split(prange, new_start, prange->last, &head); 1212 1213 if (r) 1214 return r; 1215 1216 list_add(&head->list, insert_list); 1217 1218 if (huge_page_mapping && new_start > start_align && 1219 new_start < last_align_down && !IS_ALIGNED(new_start, 512)) 1220 list_add(&head->update_list, remap_list); 1221 1222 return 0; 1223 } 1224 1225 static void 1226 svm_range_add_child(struct svm_range *prange, struct svm_range *pchild, enum svm_work_list_ops op) 1227 { 1228 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1229 pchild, pchild->start, pchild->last, prange, op); 1230 1231 pchild->work_item.mm = NULL; 1232 pchild->work_item.op = op; 1233 list_add_tail(&pchild->child_list, &prange->child_list); 1234 } 1235 1236 static bool 1237 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1238 { 1239 return (node_a->adev == node_b->adev || 1240 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1241 } 1242 1243 static uint64_t 1244 svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm, 1245 struct svm_range *prange, int domain) 1246 { 1247 struct kfd_node *bo_node; 1248 uint32_t flags = prange->flags; 1249 uint32_t mapping_flags = 0; 1250 uint32_t gc_ip_version = KFD_GC_VERSION(node); 1251 uint64_t pte_flags; 1252 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1253 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1254 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1255 unsigned int mtype_local, mtype_remote; 1256 bool is_aid_a1, is_local; 1257 1258 if (domain == SVM_RANGE_VRAM_DOMAIN) 1259 bo_node = prange->svm_bo->node; 1260 1261 switch (gc_ip_version) { 1262 case IP_VERSION(9, 4, 1): 1263 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1264 if (bo_node == node) { 1265 mapping_flags |= coherent ? 1266 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1267 } else { 1268 mapping_flags |= coherent ? 1269 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1270 if (svm_nodes_in_same_hive(node, bo_node)) 1271 snoop = true; 1272 } 1273 } else { 1274 mapping_flags |= coherent ? 1275 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1276 } 1277 break; 1278 case IP_VERSION(9, 4, 2): 1279 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1280 if (bo_node == node) { 1281 mapping_flags |= coherent ? 1282 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1283 if (node->adev->gmc.xgmi.connected_to_cpu) 1284 snoop = true; 1285 } else { 1286 mapping_flags |= coherent ? 1287 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1288 if (svm_nodes_in_same_hive(node, bo_node)) 1289 snoop = true; 1290 } 1291 } else { 1292 mapping_flags |= coherent ? 1293 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1294 } 1295 break; 1296 case IP_VERSION(9, 4, 3): 1297 case IP_VERSION(9, 4, 4): 1298 case IP_VERSION(9, 5, 0): 1299 if (ext_coherent) 1300 mtype_local = AMDGPU_VM_MTYPE_CC; 1301 else 1302 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1303 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1304 snoop = true; 1305 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1306 /* local HBM region close to partition */ 1307 if (bo_node->adev == node->adev && 1308 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1309 mapping_flags |= mtype_local; 1310 /* local HBM region far from partition or remote XGMI GPU 1311 * with regular system scope coherence 1312 */ 1313 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1314 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1315 /* PCIe P2P on GPUs pre-9.5.0 */ 1316 else if (gc_ip_version < IP_VERSION(9, 5, 0) && 1317 !svm_nodes_in_same_hive(bo_node, node)) 1318 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1319 /* Other remote memory */ 1320 else 1321 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1322 /* system memory accessed by the APU */ 1323 } else if (node->adev->flags & AMD_IS_APU) { 1324 /* On NUMA systems, locality is determined per-page 1325 * in amdgpu_gmc_override_vm_pte_flags 1326 */ 1327 if (num_possible_nodes() <= 1) 1328 mapping_flags |= mtype_local; 1329 else 1330 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1331 /* system memory accessed by the dGPU */ 1332 } else { 1333 if (gc_ip_version < IP_VERSION(9, 5, 0) || ext_coherent) 1334 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1335 else 1336 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1337 } 1338 break; 1339 case IP_VERSION(12, 0, 0): 1340 case IP_VERSION(12, 0, 1): 1341 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1342 break; 1343 case IP_VERSION(12, 1, 0): 1344 is_aid_a1 = (node->adev->rev_id & 0x10); 1345 is_local = (domain == SVM_RANGE_VRAM_DOMAIN) && 1346 (bo_node->adev == node->adev); 1347 1348 mtype_local = amdgpu_mtype_local == 0 ? AMDGPU_VM_MTYPE_RW : 1349 amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1350 is_aid_a1 ? AMDGPU_VM_MTYPE_RW : AMDGPU_VM_MTYPE_NC; 1351 mtype_remote = is_aid_a1 ? AMDGPU_VM_MTYPE_NC : AMDGPU_VM_MTYPE_UC; 1352 snoop = true; 1353 1354 if (is_local) /* local HBM */ { 1355 mapping_flags |= mtype_local; 1356 } else if (ext_coherent) { 1357 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1358 } else { 1359 /* system memory or remote VRAM */ 1360 mapping_flags |= mtype_remote; 1361 } 1362 break; 1363 default: 1364 mapping_flags |= coherent ? 1365 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1366 } 1367 1368 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1369 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1370 1371 pte_flags = AMDGPU_PTE_VALID; 1372 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1373 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1374 if (gc_ip_version >= IP_VERSION(12, 0, 0)) 1375 pte_flags |= AMDGPU_PTE_IS_PTE; 1376 1377 amdgpu_gmc_get_vm_pte(node->adev, vm, NULL, mapping_flags, &pte_flags); 1378 pte_flags |= AMDGPU_PTE_READABLE; 1379 if (!(flags & KFD_IOCTL_SVM_FLAG_GPU_RO)) 1380 pte_flags |= AMDGPU_PTE_WRITEABLE; 1381 1382 if ((gc_ip_version == IP_VERSION(12, 1, 0)) && 1383 node->adev->have_atomics_support) 1384 pte_flags |= AMDGPU_PTE_BUS_ATOMICS; 1385 1386 return pte_flags; 1387 } 1388 1389 static int 1390 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1391 uint64_t start, uint64_t last, 1392 struct dma_fence **fence) 1393 { 1394 uint64_t init_pte_value = adev->gmc.init_pte_flags; 1395 uint64_t gpu_start, gpu_end; 1396 1397 /* Convert CPU page range to GPU page range */ 1398 gpu_start = start * AMDGPU_GPU_PAGES_IN_CPU_PAGE; 1399 gpu_end = (last + 1) * AMDGPU_GPU_PAGES_IN_CPU_PAGE - 1; 1400 1401 pr_debug("CPU[0x%llx 0x%llx] -> GPU[0x%llx 0x%llx]\n", start, last, 1402 gpu_start, gpu_end); 1403 1404 if (!amdgpu_vm_ready(vm)) { 1405 pr_debug("VM not ready, canceling unmap\n"); 1406 return -EINVAL; 1407 } 1408 1409 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, gpu_start, 1410 gpu_end, init_pte_value, 0, 0, NULL, NULL, 1411 fence); 1412 } 1413 1414 static int 1415 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1416 unsigned long last, unsigned long *bitmap_unmap, 1417 uint32_t trigger) 1418 { 1419 struct kfd_process_device *pdd; 1420 struct dma_fence *fence = NULL; 1421 struct kfd_process *p; 1422 uint32_t gpuidx; 1423 int r = 0; 1424 1425 p = container_of(prange->svms, struct kfd_process, svms); 1426 1427 for_each_set_bit(gpuidx, bitmap_unmap, MAX_GPU_INSTANCE) { 1428 if (prange->start == start && prange->last == last) { 1429 pr_debug("unmap svms 0x%p prange 0x%p from gpu_idx 0x%x\n", 1430 prange->svms, prange, gpuidx); 1431 clear_bit(gpuidx, prange->bitmap_mapped); 1432 } 1433 1434 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1435 if (!pdd) { 1436 pr_debug("failed to find device idx %d\n", gpuidx); 1437 return -EINVAL; 1438 } 1439 1440 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread, 1441 start, last, trigger); 1442 1443 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1444 drm_priv_to_vm(pdd->drm_priv), 1445 start, last, &fence); 1446 if (r) 1447 break; 1448 1449 if (fence) { 1450 r = dma_fence_wait(fence, false); 1451 dma_fence_put(fence); 1452 fence = NULL; 1453 if (r) 1454 break; 1455 } 1456 kfd_flush_tlb(pdd); 1457 } 1458 1459 return r; 1460 } 1461 1462 static int 1463 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1464 unsigned long offset, unsigned long npages, bool readonly, 1465 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1466 struct dma_fence **fence, bool flush_tlb) 1467 { 1468 struct amdgpu_device *adev = pdd->dev->adev; 1469 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1470 uint64_t pte_flags; 1471 unsigned long last_start; 1472 int last_domain; 1473 int r = 0; 1474 int64_t i, j; 1475 1476 last_start = prange->start + offset; 1477 1478 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1479 last_start, last_start + npages - 1, readonly); 1480 1481 if (!amdgpu_vm_ready(vm)) { 1482 pr_debug("VM not ready, canceling map\n"); 1483 return -EINVAL; 1484 } 1485 1486 for (i = offset; i < offset + npages; i++) { 1487 uint64_t gpu_start; 1488 uint64_t gpu_end; 1489 1490 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1491 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1492 1493 /* Collect all pages in the same address range and memory domain 1494 * that can be mapped with a single call to update mapping. 1495 */ 1496 if (i < offset + npages - 1 && 1497 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1498 continue; 1499 1500 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1501 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1502 1503 pte_flags = svm_range_get_pte_flags(pdd->dev, vm, prange, last_domain); 1504 if (readonly) 1505 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1506 1507 1508 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1509 * different memory partition based on fpfn/lpfn, we should use 1510 * same vm_manager.vram_base_offset regardless memory partition. 1511 */ 1512 gpu_start = last_start * AMDGPU_GPU_PAGES_IN_CPU_PAGE; 1513 gpu_end = (prange->start + i + 1) * AMDGPU_GPU_PAGES_IN_CPU_PAGE - 1; 1514 1515 pr_debug("svms 0x%p map CPU[0x%lx 0x%llx] GPU[0x%llx 0x%llx] vram %d PTE 0x%llx\n", 1516 prange->svms, last_start, prange->start + i, 1517 gpu_start, gpu_end, 1518 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1519 pte_flags); 1520 1521 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1522 NULL, gpu_start, gpu_end, 1523 pte_flags, 1524 (last_start - prange->start) << PAGE_SHIFT, 1525 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1526 NULL, dma_addr, &vm->last_update); 1527 1528 for (j = last_start - prange->start; j <= i; j++) 1529 dma_addr[j] |= last_domain; 1530 1531 if (r) { 1532 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1533 goto out; 1534 } 1535 last_start = prange->start + i + 1; 1536 } 1537 1538 r = amdgpu_vm_update_pdes(adev, vm, false); 1539 if (r) { 1540 pr_debug("failed %d to update directories 0x%lx\n", r, 1541 prange->start); 1542 goto out; 1543 } 1544 1545 if (fence) 1546 *fence = dma_fence_get(vm->last_update); 1547 1548 out: 1549 return r; 1550 } 1551 1552 static int 1553 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1554 unsigned long npages, bool readonly, 1555 unsigned long *bitmap, bool wait, bool flush_tlb) 1556 { 1557 struct kfd_process_device *pdd; 1558 struct amdgpu_device *bo_adev = NULL; 1559 struct kfd_process *p; 1560 struct dma_fence *fence = NULL; 1561 uint32_t gpuidx; 1562 int r = 0; 1563 1564 if (prange->svm_bo && prange->ttm_res) 1565 bo_adev = prange->svm_bo->node->adev; 1566 1567 p = container_of(prange->svms, struct kfd_process, svms); 1568 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1569 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1570 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1571 if (!pdd) { 1572 pr_debug("failed to find device idx %d\n", gpuidx); 1573 return -EINVAL; 1574 } 1575 1576 pdd = kfd_bind_process_to_device(pdd->dev, p); 1577 if (IS_ERR(pdd)) 1578 return -EINVAL; 1579 1580 if (bo_adev && pdd->dev->adev != bo_adev && 1581 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1582 pr_debug("cannot map to device idx %d\n", gpuidx); 1583 continue; 1584 } 1585 1586 set_bit(gpuidx, prange->bitmap_mapped); 1587 1588 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1589 prange->dma_addr[gpuidx], 1590 bo_adev, wait ? &fence : NULL, 1591 flush_tlb); 1592 if (r) 1593 break; 1594 1595 if (fence) { 1596 r = dma_fence_wait(fence, false); 1597 dma_fence_put(fence); 1598 fence = NULL; 1599 if (r) { 1600 pr_debug("failed %d to dma fence wait\n", r); 1601 break; 1602 } 1603 } 1604 1605 kfd_flush_tlb(pdd); 1606 } 1607 1608 return r; 1609 } 1610 1611 struct svm_validate_context { 1612 struct kfd_process *process; 1613 struct svm_range *prange; 1614 bool intr; 1615 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1616 struct drm_exec exec; 1617 }; 1618 1619 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1620 { 1621 struct kfd_process_device *pdd; 1622 struct amdgpu_vm *vm; 1623 uint32_t gpuidx; 1624 int r; 1625 1626 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1627 drm_exec_until_all_locked(&ctx->exec) { 1628 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1629 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1630 if (!pdd) { 1631 pr_debug("failed to find device idx %d\n", gpuidx); 1632 r = -EINVAL; 1633 goto unreserve_out; 1634 } 1635 vm = drm_priv_to_vm(pdd->drm_priv); 1636 1637 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1638 drm_exec_retry_on_contention(&ctx->exec); 1639 if (unlikely(r)) { 1640 pr_debug("failed %d to reserve bo\n", r); 1641 goto unreserve_out; 1642 } 1643 } 1644 } 1645 1646 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1647 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1648 if (!pdd) { 1649 pr_debug("failed to find device idx %d\n", gpuidx); 1650 r = -EINVAL; 1651 goto unreserve_out; 1652 } 1653 1654 r = amdgpu_vm_validate(pdd->dev->adev, 1655 drm_priv_to_vm(pdd->drm_priv), NULL, 1656 svm_range_bo_validate, NULL); 1657 if (r) { 1658 pr_debug("failed %d validate pt bos\n", r); 1659 goto unreserve_out; 1660 } 1661 } 1662 1663 return 0; 1664 1665 unreserve_out: 1666 drm_exec_fini(&ctx->exec); 1667 return r; 1668 } 1669 1670 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1671 { 1672 drm_exec_fini(&ctx->exec); 1673 } 1674 1675 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1676 { 1677 struct kfd_process_device *pdd; 1678 1679 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1680 if (!pdd) 1681 return NULL; 1682 1683 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1684 } 1685 1686 /* 1687 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1688 * 1689 * To prevent concurrent destruction or change of range attributes, the 1690 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1691 * because that would block concurrent evictions and lead to deadlocks. To 1692 * serialize concurrent migrations or validations of the same range, the 1693 * prange->migrate_mutex must be held. 1694 * 1695 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1696 * eviction fence. 1697 * 1698 * The following sequence ensures race-free validation and GPU mapping: 1699 * 1700 * 1. Reserve page table (and SVM BO if range is in VRAM) 1701 * 2. hmm_range_fault to get page addresses (if system memory) 1702 * 3. DMA-map pages (if system memory) 1703 * 4-a. Take notifier lock 1704 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1705 * 4-c. Check that the range was not split or otherwise invalidated 1706 * 4-d. Update GPU page table 1707 * 4.e. Release notifier lock 1708 * 5. Release page table (and SVM BO) reservation 1709 */ 1710 static int svm_range_validate_and_map(struct mm_struct *mm, 1711 unsigned long map_start, unsigned long map_last, 1712 struct svm_range *prange, int32_t gpuidx, 1713 bool intr, bool wait, bool flush_tlb) 1714 { 1715 struct svm_validate_context *ctx; 1716 unsigned long start, end, addr; 1717 struct kfd_process *p; 1718 void *owner; 1719 int32_t idx; 1720 int r = 0; 1721 1722 ctx = kzalloc_obj(struct svm_validate_context); 1723 if (!ctx) 1724 return -ENOMEM; 1725 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1726 ctx->prange = prange; 1727 ctx->intr = intr; 1728 1729 if (gpuidx < MAX_GPU_INSTANCE) { 1730 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1731 bitmap_set(ctx->bitmap, gpuidx, 1); 1732 } else if (ctx->process->xnack_enabled) { 1733 /* Update mapping on already mapped or access in place GPU */ 1734 bitmap_or(ctx->bitmap, prange->bitmap_mapped, prange->bitmap_aip, 1735 MAX_GPU_INSTANCE); 1736 1737 /* If prefetch range to GPU, or GPU retry fault migrate range to 1738 * GPU, which has ACCESS attribute to the range, create mapping 1739 * on that GPU. 1740 */ 1741 if (prange->actual_loc) { 1742 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1743 prange->actual_loc); 1744 if (gpuidx < 0) { 1745 WARN_ONCE(1, "failed get device by id 0x%x\n", 1746 prange->actual_loc); 1747 r = -EINVAL; 1748 goto free_ctx; 1749 } 1750 if (test_bit(gpuidx, prange->bitmap_access)) 1751 bitmap_set(ctx->bitmap, gpuidx, 1); 1752 } 1753 1754 /* 1755 * If prange with always mapped flag, update mapping on GPUs with 1756 * ACCESS attribute 1757 */ 1758 if (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1759 bitmap_or(ctx->bitmap, ctx->bitmap, prange->bitmap_access, 1760 MAX_GPU_INSTANCE); 1761 } else { 1762 bitmap_or(ctx->bitmap, prange->bitmap_access, 1763 prange->bitmap_aip, MAX_GPU_INSTANCE); 1764 } 1765 1766 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1767 r = 0; 1768 goto free_ctx; 1769 } 1770 1771 if (prange->actual_loc && !prange->ttm_res) { 1772 /* This should never happen. actual_loc gets set by 1773 * svm_migrate_ram_to_vram after allocating a BO. 1774 */ 1775 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1776 r = -EINVAL; 1777 goto free_ctx; 1778 } 1779 1780 r = svm_range_reserve_bos(ctx, intr); 1781 if (r) 1782 goto free_ctx; 1783 1784 p = container_of(prange->svms, struct kfd_process, svms); 1785 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1786 MAX_GPU_INSTANCE)); 1787 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1788 if (kfd_svm_page_owner(p, idx) != owner) { 1789 owner = NULL; 1790 break; 1791 } 1792 } 1793 1794 start = map_start << PAGE_SHIFT; 1795 end = (map_last + 1) << PAGE_SHIFT; 1796 for (addr = start; !r && addr < end; ) { 1797 struct amdgpu_hmm_range *range = NULL; 1798 unsigned long map_start_vma; 1799 unsigned long map_last_vma; 1800 struct vm_area_struct *vma; 1801 unsigned long next = 0; 1802 unsigned long offset; 1803 unsigned long npages; 1804 bool readonly; 1805 1806 vma = vma_lookup(mm, addr); 1807 if (vma) { 1808 readonly = !(vma->vm_flags & VM_WRITE); 1809 1810 next = min(vma->vm_end, end); 1811 npages = (next - addr) >> PAGE_SHIFT; 1812 /* HMM requires at least READ permissions. If provided with PROT_NONE, 1813 * unmap the memory. If it's not already mapped, this is a no-op 1814 * If PROT_WRITE is provided without READ, warn first then unmap 1815 */ 1816 if (!(vma->vm_flags & VM_READ)) { 1817 unsigned long e, s; 1818 1819 svm_range_lock(prange); 1820 if (vma->vm_flags & VM_WRITE) 1821 pr_debug("VM_WRITE without VM_READ is not supported"); 1822 s = max(start, prange->start); 1823 e = min(end, prange->last); 1824 if (e >= s) 1825 r = svm_range_unmap_from_gpus(prange, s, e, 1826 prange->bitmap_mapped, 1827 KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU); 1828 svm_range_unlock(prange); 1829 /* If unmap returns non-zero, we'll bail on the next for loop 1830 * iteration, so just leave r and continue 1831 */ 1832 addr = next; 1833 continue; 1834 } 1835 1836 WRITE_ONCE(p->svms.faulting_task, current); 1837 range = amdgpu_hmm_range_alloc(NULL); 1838 if (likely(range)) 1839 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1840 readonly, owner, range); 1841 else 1842 r = -ENOMEM; 1843 WRITE_ONCE(p->svms.faulting_task, NULL); 1844 if (r) 1845 pr_debug("failed %d to get svm range pages\n", r); 1846 } else { 1847 r = -EFAULT; 1848 } 1849 1850 if (!r) { 1851 offset = (addr >> PAGE_SHIFT) - prange->start; 1852 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1853 range->hmm_range.hmm_pfns); 1854 if (r) 1855 pr_debug("failed %d to dma map range\n", r); 1856 } 1857 1858 svm_range_lock(prange); 1859 1860 /* Free backing memory of hmm_range if it was initialized 1861 * Override return value to TRY AGAIN only if prior returns 1862 * were successful 1863 */ 1864 if (range && !amdgpu_hmm_range_valid(range) && !r) { 1865 pr_debug("hmm update the range, need validate again\n"); 1866 r = -EAGAIN; 1867 } 1868 1869 /* Free the hmm range */ 1870 amdgpu_hmm_range_free(range); 1871 1872 if (!r && !list_empty(&prange->child_list)) { 1873 pr_debug("range split by unmap in parallel, validate again\n"); 1874 r = -EAGAIN; 1875 } 1876 1877 if (!r) { 1878 map_start_vma = max(map_start, prange->start + offset); 1879 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1880 if (map_start_vma <= map_last_vma) { 1881 offset = map_start_vma - prange->start; 1882 npages = map_last_vma - map_start_vma + 1; 1883 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1884 ctx->bitmap, wait, flush_tlb); 1885 } 1886 } 1887 1888 if (!r && next == end) 1889 prange->mapping_done = true; 1890 else 1891 prange->mapping_done = false; 1892 1893 svm_range_unlock(prange); 1894 1895 addr = next; 1896 } 1897 1898 svm_range_unreserve_bos(ctx); 1899 if (!r) 1900 prange->validate_timestamp = ktime_get_boottime(); 1901 1902 free_ctx: 1903 kfree(ctx); 1904 1905 return r; 1906 } 1907 1908 /** 1909 * svm_range_list_lock_and_flush_work - flush pending deferred work 1910 * 1911 * @svms: the svm range list 1912 * @mm: the mm structure 1913 * 1914 * Context: Returns with mmap write lock held, pending deferred work flushed 1915 * 1916 */ 1917 void 1918 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1919 struct mm_struct *mm) 1920 { 1921 retry_flush_work: 1922 flush_work(&svms->deferred_list_work); 1923 mmap_write_lock(mm); 1924 1925 if (list_empty(&svms->deferred_range_list)) 1926 return; 1927 mmap_write_unlock(mm); 1928 pr_debug("retry flush\n"); 1929 goto retry_flush_work; 1930 } 1931 1932 static void svm_range_restore_work(struct work_struct *work) 1933 { 1934 struct delayed_work *dwork = to_delayed_work(work); 1935 struct amdkfd_process_info *process_info; 1936 struct svm_range_list *svms; 1937 struct svm_range *prange; 1938 struct kfd_process *p; 1939 struct mm_struct *mm; 1940 int evicted_ranges; 1941 int invalid; 1942 int r; 1943 1944 svms = container_of(dwork, struct svm_range_list, restore_work); 1945 evicted_ranges = atomic_read(&svms->evicted_ranges); 1946 if (!evicted_ranges) 1947 return; 1948 1949 pr_debug("restore svm ranges\n"); 1950 1951 p = container_of(svms, struct kfd_process, svms); 1952 process_info = p->kgd_process_info; 1953 1954 /* Keep mm reference when svm_range_validate_and_map ranges */ 1955 mm = get_task_mm(p->lead_thread); 1956 if (!mm) { 1957 pr_debug("svms 0x%p process mm gone\n", svms); 1958 return; 1959 } 1960 1961 mutex_lock(&process_info->lock); 1962 svm_range_list_lock_and_flush_work(svms, mm); 1963 mutex_lock(&svms->lock); 1964 1965 evicted_ranges = atomic_read(&svms->evicted_ranges); 1966 1967 list_for_each_entry(prange, &svms->list, list) { 1968 invalid = atomic_read(&prange->invalid); 1969 if (!invalid) 1970 continue; 1971 1972 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1973 prange->svms, prange, prange->start, prange->last, 1974 invalid); 1975 1976 /* 1977 * If range is migrating, wait for migration is done. 1978 */ 1979 mutex_lock(&prange->migrate_mutex); 1980 1981 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1982 MAX_GPU_INSTANCE, false, true, false); 1983 if (r) 1984 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1985 prange->start); 1986 1987 mutex_unlock(&prange->migrate_mutex); 1988 if (r) 1989 goto out_reschedule; 1990 1991 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1992 goto out_reschedule; 1993 } 1994 1995 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1996 evicted_ranges) 1997 goto out_reschedule; 1998 1999 evicted_ranges = 0; 2000 2001 r = kgd2kfd_resume_mm(mm); 2002 if (r) { 2003 /* No recovery from this failure. Probably the CP is 2004 * hanging. No point trying again. 2005 */ 2006 pr_debug("failed %d to resume KFD\n", r); 2007 } 2008 2009 pr_debug("restore svm ranges successfully\n"); 2010 2011 out_reschedule: 2012 mutex_unlock(&svms->lock); 2013 mmap_write_unlock(mm); 2014 mutex_unlock(&process_info->lock); 2015 2016 /* If validation failed, reschedule another attempt */ 2017 if (evicted_ranges) { 2018 pr_debug("reschedule to restore svm range\n"); 2019 queue_delayed_work(system_freezable_wq, &svms->restore_work, 2020 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 2021 2022 kfd_smi_event_queue_restore_rescheduled(mm); 2023 } 2024 mmput(mm); 2025 } 2026 2027 /** 2028 * svm_range_evict - evict svm range 2029 * @prange: svm range structure 2030 * @mm: current process mm_struct 2031 * @start: starting process queue number 2032 * @last: last process queue number 2033 * @event: mmu notifier event when range is evicted or migrated 2034 * 2035 * Stop all queues of the process to ensure GPU doesn't access the memory, then 2036 * return to let CPU evict the buffer and proceed CPU pagetable update. 2037 * 2038 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 2039 * If invalidation happens while restore work is running, restore work will 2040 * restart to ensure to get the latest CPU pages mapping to GPU, then start 2041 * the queues. 2042 */ 2043 static int 2044 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 2045 unsigned long start, unsigned long last, 2046 enum mmu_notifier_event event) 2047 { 2048 struct svm_range_list *svms = prange->svms; 2049 struct svm_range *pchild; 2050 struct kfd_process *p; 2051 int r = 0; 2052 2053 p = container_of(svms, struct kfd_process, svms); 2054 2055 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2056 svms, prange->start, prange->last, start, last); 2057 2058 if (!p->xnack_enabled || 2059 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 2060 int evicted_ranges; 2061 bool mapped = !bitmap_empty(prange->bitmap_mapped, MAX_GPU_INSTANCE); 2062 2063 list_for_each_entry(pchild, &prange->child_list, child_list) { 2064 if (bitmap_empty(pchild->bitmap_mapped, MAX_GPU_INSTANCE)) 2065 continue; 2066 mapped = true; 2067 mutex_lock_nested(&pchild->lock, 1); 2068 if (pchild->start <= last && pchild->last >= start) { 2069 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 2070 pchild->start, pchild->last); 2071 atomic_inc(&pchild->invalid); 2072 } 2073 mutex_unlock(&pchild->lock); 2074 } 2075 2076 if (!mapped) 2077 return r; 2078 2079 if (prange->start <= last && prange->last >= start) 2080 atomic_inc(&prange->invalid); 2081 2082 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 2083 if (evicted_ranges != 1) 2084 return r; 2085 2086 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 2087 prange->svms, prange->start, prange->last); 2088 2089 /* First eviction, stop the queues */ 2090 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2091 if (r) 2092 pr_debug("failed to quiesce KFD\n"); 2093 2094 pr_debug("schedule to restore svm %p ranges\n", svms); 2095 queue_delayed_work(system_freezable_wq, &svms->restore_work, 2096 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 2097 } else { 2098 unsigned long s, l; 2099 uint32_t trigger; 2100 2101 if (event == MMU_NOTIFY_MIGRATE) 2102 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 2103 else 2104 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 2105 2106 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 2107 prange->svms, start, last); 2108 list_for_each_entry(pchild, &prange->child_list, child_list) { 2109 mutex_lock_nested(&pchild->lock, 1); 2110 s = max(start, pchild->start); 2111 l = min(last, pchild->last); 2112 if (l >= s) 2113 svm_range_unmap_from_gpus(pchild, s, l, prange->bitmap_mapped, 2114 trigger); 2115 mutex_unlock(&pchild->lock); 2116 } 2117 s = max(start, prange->start); 2118 l = min(last, prange->last); 2119 if (l >= s) 2120 svm_range_unmap_from_gpus(prange, s, l, prange->bitmap_mapped, trigger); 2121 } 2122 2123 return r; 2124 } 2125 2126 static struct svm_range *svm_range_clone(struct svm_range *old) 2127 { 2128 struct svm_range *new; 2129 2130 new = svm_range_new(old->svms, old->start, old->last, false); 2131 if (!new) 2132 return NULL; 2133 if (svm_range_copy_dma_addrs(new, old)) { 2134 svm_range_free(new, false); 2135 return NULL; 2136 } 2137 if (old->svm_bo) { 2138 new->ttm_res = old->ttm_res; 2139 new->offset = old->offset; 2140 new->svm_bo = svm_range_bo_ref(old->svm_bo); 2141 spin_lock(&new->svm_bo->list_lock); 2142 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 2143 spin_unlock(&new->svm_bo->list_lock); 2144 } 2145 new->flags = old->flags; 2146 new->preferred_loc = old->preferred_loc; 2147 new->prefetch_loc = old->prefetch_loc; 2148 new->actual_loc = old->actual_loc; 2149 new->granularity = old->granularity; 2150 new->mapping_done = old->mapping_done; 2151 new->vram_pages = old->vram_pages; 2152 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2153 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2154 bitmap_copy(new->bitmap_mapped, old->bitmap_mapped, MAX_GPU_INSTANCE); 2155 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 2156 2157 return new; 2158 } 2159 2160 void svm_range_set_max_pages(struct amdgpu_device *adev) 2161 { 2162 uint64_t max_pages; 2163 uint64_t pages, _pages; 2164 uint64_t min_pages = 0; 2165 int i, id; 2166 2167 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2168 if (adev->kfd.dev->nodes[i]->xcp) 2169 id = adev->kfd.dev->nodes[i]->xcp->id; 2170 else 2171 id = -1; 2172 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2173 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2174 pages = rounddown_pow_of_two(pages); 2175 min_pages = min_not_zero(min_pages, pages); 2176 } 2177 2178 do { 2179 max_pages = READ_ONCE(max_svm_range_pages); 2180 _pages = min_not_zero(max_pages, min_pages); 2181 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2182 } 2183 2184 static int 2185 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2186 uint64_t max_pages, struct list_head *insert_list, 2187 struct list_head *update_list) 2188 { 2189 struct svm_range *prange; 2190 uint64_t l; 2191 2192 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2193 max_pages, start, last); 2194 2195 while (last >= start) { 2196 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2197 2198 prange = svm_range_new(svms, start, l, true); 2199 if (!prange) 2200 return -ENOMEM; 2201 list_add(&prange->list, insert_list); 2202 list_add(&prange->update_list, update_list); 2203 2204 start = l + 1; 2205 } 2206 return 0; 2207 } 2208 2209 /** 2210 * svm_range_add - add svm range and handle overlap 2211 * @p: the range add to this process svms 2212 * @start: page size aligned 2213 * @size: page size aligned 2214 * @nattr: number of attributes 2215 * @attrs: array of attributes 2216 * @update_list: output, the ranges need validate and update GPU mapping 2217 * @insert_list: output, the ranges need insert to svms 2218 * @remove_list: output, the ranges are replaced and need remove from svms 2219 * @remap_list: output, remap unaligned svm ranges 2220 * 2221 * Check if the virtual address range has overlap with any existing ranges, 2222 * split partly overlapping ranges and add new ranges in the gaps. All changes 2223 * should be applied to the range_list and interval tree transactionally. If 2224 * any range split or allocation fails, the entire update fails. Therefore any 2225 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2226 * unchanged. 2227 * 2228 * If the transaction succeeds, the caller can update and insert clones and 2229 * new ranges, then free the originals. 2230 * 2231 * Otherwise the caller can free the clones and new ranges, while the old 2232 * svm_ranges remain unchanged. 2233 * 2234 * Context: Process context, caller must hold svms->lock 2235 * 2236 * Return: 2237 * 0 - OK, otherwise error code 2238 */ 2239 static int 2240 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2241 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2242 struct list_head *update_list, struct list_head *insert_list, 2243 struct list_head *remove_list, struct list_head *remap_list) 2244 { 2245 unsigned long last = start + size - 1UL; 2246 struct svm_range_list *svms = &p->svms; 2247 struct interval_tree_node *node; 2248 struct svm_range *prange; 2249 struct svm_range *tmp; 2250 struct list_head new_list; 2251 int r = 0; 2252 2253 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2254 2255 INIT_LIST_HEAD(update_list); 2256 INIT_LIST_HEAD(insert_list); 2257 INIT_LIST_HEAD(remove_list); 2258 INIT_LIST_HEAD(&new_list); 2259 INIT_LIST_HEAD(remap_list); 2260 2261 node = interval_tree_iter_first(&svms->objects, start, last); 2262 while (node) { 2263 struct interval_tree_node *next; 2264 unsigned long next_start; 2265 2266 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2267 node->last); 2268 2269 prange = container_of(node, struct svm_range, it_node); 2270 next = interval_tree_iter_next(node, start, last); 2271 next_start = min(node->last, last) + 1; 2272 2273 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2274 prange->mapping_done) { 2275 /* nothing to do */ 2276 } else if (node->start < start || node->last > last) { 2277 /* node intersects the update range and its attributes 2278 * will change. Clone and split it, apply updates only 2279 * to the overlapping part 2280 */ 2281 struct svm_range *old = prange; 2282 2283 prange = svm_range_clone(old); 2284 if (!prange) { 2285 r = -ENOMEM; 2286 goto out; 2287 } 2288 2289 list_add(&old->update_list, remove_list); 2290 list_add(&prange->list, insert_list); 2291 list_add(&prange->update_list, update_list); 2292 2293 if (node->start < start) { 2294 pr_debug("change old range start\n"); 2295 r = svm_range_split_head(prange, start, 2296 insert_list, remap_list); 2297 if (r) 2298 goto out; 2299 } 2300 if (node->last > last) { 2301 pr_debug("change old range last\n"); 2302 r = svm_range_split_tail(prange, last, 2303 insert_list, remap_list); 2304 if (r) 2305 goto out; 2306 } 2307 } else { 2308 /* The node is contained within start..last, 2309 * just update it 2310 */ 2311 list_add(&prange->update_list, update_list); 2312 } 2313 2314 /* insert a new node if needed */ 2315 if (node->start > start) { 2316 r = svm_range_split_new(svms, start, node->start - 1, 2317 READ_ONCE(max_svm_range_pages), 2318 &new_list, update_list); 2319 if (r) 2320 goto out; 2321 } 2322 2323 node = next; 2324 start = next_start; 2325 } 2326 2327 /* add a final range at the end if needed */ 2328 if (start <= last) 2329 r = svm_range_split_new(svms, start, last, 2330 READ_ONCE(max_svm_range_pages), 2331 &new_list, update_list); 2332 2333 out: 2334 if (r) { 2335 list_for_each_entry_safe(prange, tmp, insert_list, list) 2336 svm_range_free(prange, false); 2337 list_for_each_entry_safe(prange, tmp, &new_list, list) 2338 svm_range_free(prange, true); 2339 } else { 2340 list_splice(&new_list, insert_list); 2341 } 2342 2343 return r; 2344 } 2345 2346 static void 2347 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2348 struct svm_range *prange) 2349 { 2350 unsigned long start; 2351 unsigned long last; 2352 2353 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2354 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2355 2356 if (prange->start == start && prange->last == last) 2357 return; 2358 2359 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2360 prange->svms, prange, start, last, prange->start, 2361 prange->last); 2362 2363 if (start != 0 && last != 0) { 2364 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2365 svm_range_remove_notifier(prange); 2366 } 2367 prange->it_node.start = prange->start; 2368 prange->it_node.last = prange->last; 2369 2370 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2371 svm_range_add_notifier_locked(mm, prange); 2372 } 2373 2374 static void 2375 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2376 struct mm_struct *mm) 2377 { 2378 switch (prange->work_item.op) { 2379 case SVM_OP_NULL: 2380 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2381 svms, prange, prange->start, prange->last); 2382 break; 2383 case SVM_OP_UNMAP_RANGE: 2384 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2385 svms, prange, prange->start, prange->last); 2386 svm_range_unlink(prange); 2387 svm_range_remove_notifier(prange); 2388 svm_range_free(prange, true); 2389 break; 2390 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2391 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2392 svms, prange, prange->start, prange->last); 2393 svm_range_update_notifier_and_interval_tree(mm, prange); 2394 break; 2395 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2396 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2397 svms, prange, prange->start, prange->last); 2398 svm_range_update_notifier_and_interval_tree(mm, prange); 2399 /* TODO: implement deferred validation and mapping */ 2400 break; 2401 case SVM_OP_ADD_RANGE: 2402 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2403 prange->start, prange->last); 2404 svm_range_add_to_svms(prange); 2405 svm_range_add_notifier_locked(mm, prange); 2406 break; 2407 case SVM_OP_ADD_RANGE_AND_MAP: 2408 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2409 prange, prange->start, prange->last); 2410 svm_range_add_to_svms(prange); 2411 svm_range_add_notifier_locked(mm, prange); 2412 /* TODO: implement deferred validation and mapping */ 2413 break; 2414 default: 2415 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2416 prange->work_item.op); 2417 } 2418 } 2419 2420 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2421 { 2422 struct kfd_process_device *pdd; 2423 struct kfd_process *p; 2424 uint32_t i; 2425 2426 p = container_of(svms, struct kfd_process, svms); 2427 2428 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2429 pdd = p->pdds[i]; 2430 if (!pdd) 2431 continue; 2432 2433 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2434 2435 if (!down_read_trylock(&pdd->dev->adev->reset_domain->sem)) 2436 continue; 2437 2438 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2439 pdd->dev->adev->irq.retry_cam_enabled ? 2440 &pdd->dev->adev->irq.ih : 2441 &pdd->dev->adev->irq.ih1); 2442 2443 if (pdd->dev->adev->irq.retry_cam_enabled) 2444 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2445 &pdd->dev->adev->irq.ih_soft); 2446 2447 up_read(&pdd->dev->adev->reset_domain->sem); 2448 2449 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2450 } 2451 } 2452 2453 static void svm_range_deferred_list_work(struct work_struct *work) 2454 { 2455 struct svm_range_list *svms; 2456 struct svm_range *prange; 2457 struct mm_struct *mm; 2458 2459 svms = container_of(work, struct svm_range_list, deferred_list_work); 2460 pr_debug("enter svms 0x%p\n", svms); 2461 2462 spin_lock(&svms->deferred_list_lock); 2463 while (!list_empty(&svms->deferred_range_list)) { 2464 prange = list_first_entry(&svms->deferred_range_list, 2465 struct svm_range, deferred_list); 2466 spin_unlock(&svms->deferred_list_lock); 2467 2468 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2469 prange->start, prange->last, prange->work_item.op); 2470 2471 mm = prange->work_item.mm; 2472 2473 mmap_write_lock(mm); 2474 2475 /* Remove from deferred_list must be inside mmap write lock, for 2476 * two race cases: 2477 * 1. unmap_from_cpu may change work_item.op and add the range 2478 * to deferred_list again, cause use after free bug. 2479 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2480 * lock and continue because deferred_list is empty, but 2481 * deferred_list work is actually waiting for mmap lock. 2482 */ 2483 spin_lock(&svms->deferred_list_lock); 2484 list_del_init(&prange->deferred_list); 2485 spin_unlock(&svms->deferred_list_lock); 2486 2487 mutex_lock(&svms->lock); 2488 mutex_lock(&prange->migrate_mutex); 2489 while (!list_empty(&prange->child_list)) { 2490 struct svm_range *pchild; 2491 2492 pchild = list_first_entry(&prange->child_list, 2493 struct svm_range, child_list); 2494 pr_debug("child prange 0x%p op %d\n", pchild, 2495 pchild->work_item.op); 2496 list_del_init(&pchild->child_list); 2497 svm_range_handle_list_op(svms, pchild, mm); 2498 } 2499 mutex_unlock(&prange->migrate_mutex); 2500 2501 svm_range_handle_list_op(svms, prange, mm); 2502 mutex_unlock(&svms->lock); 2503 mmap_write_unlock(mm); 2504 2505 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2506 * last mm refcount, schedule release work to avoid circular locking 2507 */ 2508 mmput_async(mm); 2509 2510 spin_lock(&svms->deferred_list_lock); 2511 } 2512 spin_unlock(&svms->deferred_list_lock); 2513 pr_debug("exit svms 0x%p\n", svms); 2514 } 2515 2516 void 2517 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2518 struct mm_struct *mm, enum svm_work_list_ops op) 2519 { 2520 spin_lock(&svms->deferred_list_lock); 2521 /* if prange is on the deferred list */ 2522 if (!list_empty(&prange->deferred_list)) { 2523 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2524 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2525 if (op != SVM_OP_NULL && 2526 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2527 prange->work_item.op = op; 2528 } else { 2529 /* Pairs with mmput in deferred_list_work. 2530 * If process is exiting and mm is gone, don't update mmu notifier. 2531 */ 2532 if (mmget_not_zero(mm)) { 2533 prange->work_item.mm = mm; 2534 prange->work_item.op = op; 2535 list_add_tail(&prange->deferred_list, 2536 &prange->svms->deferred_range_list); 2537 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2538 prange, prange->start, prange->last, op); 2539 } 2540 } 2541 spin_unlock(&svms->deferred_list_lock); 2542 } 2543 2544 void schedule_deferred_list_work(struct svm_range_list *svms) 2545 { 2546 spin_lock(&svms->deferred_list_lock); 2547 if (!list_empty(&svms->deferred_range_list)) 2548 schedule_work(&svms->deferred_list_work); 2549 spin_unlock(&svms->deferred_list_lock); 2550 } 2551 2552 static void 2553 svm_range_unmap_split(struct svm_range *parent, struct svm_range *prange, unsigned long start, 2554 unsigned long last) 2555 { 2556 struct svm_range *head; 2557 struct svm_range *tail; 2558 2559 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2560 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2561 prange->start, prange->last); 2562 return; 2563 } 2564 if (start > prange->last || last < prange->start) 2565 return; 2566 2567 head = tail = prange; 2568 if (start > prange->start) 2569 svm_range_split(prange, prange->start, start - 1, &tail); 2570 if (last < tail->last) 2571 svm_range_split(tail, last + 1, tail->last, &head); 2572 2573 if (head != prange && tail != prange) { 2574 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2575 svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE); 2576 } else if (tail != prange) { 2577 svm_range_add_child(parent, tail, SVM_OP_UNMAP_RANGE); 2578 } else if (head != prange) { 2579 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2580 } else if (parent != prange) { 2581 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2582 } 2583 } 2584 2585 static void 2586 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2587 unsigned long start, unsigned long last) 2588 { 2589 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2590 struct svm_range_list *svms; 2591 struct svm_range *pchild; 2592 struct kfd_process *p; 2593 unsigned long s, l; 2594 bool unmap_parent; 2595 2596 if (atomic_read(&prange->queue_refcount)) { 2597 int r; 2598 2599 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2600 prange->start << PAGE_SHIFT); 2601 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2602 if (r) 2603 pr_debug("failed %d to quiesce KFD queues\n", r); 2604 } 2605 2606 p = kfd_lookup_process_by_mm(mm); 2607 if (!p) 2608 return; 2609 svms = &p->svms; 2610 2611 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2612 prange, prange->start, prange->last, start, last); 2613 2614 svm_range_update_checkpoint_timestamp(p); 2615 2616 unmap_parent = start <= prange->start && last >= prange->last; 2617 2618 list_for_each_entry(pchild, &prange->child_list, child_list) { 2619 mutex_lock_nested(&pchild->lock, 1); 2620 s = max(start, pchild->start); 2621 l = min(last, pchild->last); 2622 if (l >= s) 2623 svm_range_unmap_from_gpus(pchild, s, l, prange->bitmap_mapped, trigger); 2624 svm_range_unmap_split(prange, pchild, start, last); 2625 mutex_unlock(&pchild->lock); 2626 } 2627 s = max(start, prange->start); 2628 l = min(last, prange->last); 2629 if (l >= s) 2630 svm_range_unmap_from_gpus(prange, s, l, prange->bitmap_mapped, trigger); 2631 svm_range_unmap_split(prange, prange, start, last); 2632 2633 if (unmap_parent) 2634 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2635 else 2636 svm_range_add_list_work(svms, prange, mm, 2637 SVM_OP_UPDATE_RANGE_NOTIFIER); 2638 schedule_deferred_list_work(svms); 2639 2640 kfd_unref_process(p); 2641 } 2642 2643 /** 2644 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2645 * @mni: mmu_interval_notifier struct 2646 * @range: mmu_notifier_range struct 2647 * @cur_seq: value to pass to mmu_interval_set_seq() 2648 * 2649 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2650 * is from migration, or CPU page invalidation callback. 2651 * 2652 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2653 * work thread, and split prange if only part of prange is unmapped. 2654 * 2655 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2656 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2657 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2658 * update GPU mapping to recover. 2659 * 2660 * Context: mmap lock, notifier_invalidate_start lock are held 2661 * for invalidate event, prange lock is held if this is from migration 2662 */ 2663 static bool 2664 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2665 const struct mmu_notifier_range *range, 2666 unsigned long cur_seq) 2667 { 2668 struct svm_range *prange; 2669 unsigned long start; 2670 unsigned long last; 2671 2672 if (range->event == MMU_NOTIFY_RELEASE) 2673 return true; 2674 2675 start = mni->interval_tree.start; 2676 last = mni->interval_tree.last; 2677 start = max(start, range->start) >> PAGE_SHIFT; 2678 last = min(last, range->end - 1) >> PAGE_SHIFT; 2679 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2680 start, last, range->start >> PAGE_SHIFT, 2681 (range->end - 1) >> PAGE_SHIFT, 2682 mni->interval_tree.start >> PAGE_SHIFT, 2683 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2684 2685 prange = container_of(mni, struct svm_range, notifier); 2686 2687 svm_range_lock(prange); 2688 mmu_interval_set_seq(mni, cur_seq); 2689 2690 switch (range->event) { 2691 case MMU_NOTIFY_UNMAP: 2692 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2693 break; 2694 default: 2695 svm_range_evict(prange, mni->mm, start, last, range->event); 2696 break; 2697 } 2698 2699 svm_range_unlock(prange); 2700 2701 return true; 2702 } 2703 2704 /** 2705 * svm_range_from_addr - find svm range from fault address 2706 * @svms: svm range list header 2707 * @addr: address to search range interval tree, in pages 2708 * @parent: parent range if range is on child list 2709 * 2710 * Context: The caller must hold svms->lock 2711 * 2712 * Return: the svm_range found or NULL 2713 */ 2714 struct svm_range * 2715 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2716 struct svm_range **parent) 2717 { 2718 struct interval_tree_node *node; 2719 struct svm_range *prange; 2720 struct svm_range *pchild; 2721 2722 node = interval_tree_iter_first(&svms->objects, addr, addr); 2723 if (!node) 2724 return NULL; 2725 2726 prange = container_of(node, struct svm_range, it_node); 2727 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2728 addr, prange->start, prange->last, node->start, node->last); 2729 2730 if (addr >= prange->start && addr <= prange->last) { 2731 if (parent) 2732 *parent = prange; 2733 return prange; 2734 } 2735 list_for_each_entry(pchild, &prange->child_list, child_list) 2736 if (addr >= pchild->start && addr <= pchild->last) { 2737 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2738 addr, pchild->start, pchild->last); 2739 if (parent) 2740 *parent = prange; 2741 return pchild; 2742 } 2743 2744 return NULL; 2745 } 2746 2747 /* svm_range_best_restore_location - decide the best fault restore location 2748 * @prange: svm range structure 2749 * @adev: the GPU on which vm fault happened 2750 * 2751 * This is only called when xnack is on, to decide the best location to restore 2752 * the range mapping after GPU vm fault. Caller uses the best location to do 2753 * migration if actual loc is not best location, then update GPU page table 2754 * mapping to the best location. 2755 * 2756 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2757 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2758 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2759 * if range actual loc is cpu, best_loc is cpu 2760 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2761 * range actual loc. 2762 * Otherwise, GPU no access, best_loc is -1. 2763 * 2764 * Return: 2765 * -1 means vm fault GPU no access 2766 * 0 for CPU or GPU id 2767 */ 2768 static int32_t 2769 svm_range_best_restore_location(struct svm_range *prange, 2770 struct kfd_node *node, 2771 int32_t *gpuidx) 2772 { 2773 struct kfd_node *bo_node, *preferred_node; 2774 struct kfd_process *p; 2775 uint32_t gpuid; 2776 int r; 2777 2778 p = container_of(prange->svms, struct kfd_process, svms); 2779 2780 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2781 if (r < 0) { 2782 pr_debug("failed to get gpuid from kgd\n"); 2783 return -1; 2784 } 2785 2786 if (node->adev->apu_prefer_gtt) 2787 return 0; 2788 2789 if (prange->preferred_loc == gpuid || 2790 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2791 return prange->preferred_loc; 2792 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2793 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2794 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2795 return prange->preferred_loc; 2796 /* fall through */ 2797 } 2798 2799 if (test_bit(*gpuidx, prange->bitmap_access)) 2800 return gpuid; 2801 2802 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2803 if (!prange->actual_loc) 2804 return 0; 2805 2806 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2807 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2808 return prange->actual_loc; 2809 else 2810 return 0; 2811 } 2812 2813 return -1; 2814 } 2815 2816 static int 2817 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2818 unsigned long *start, unsigned long *last, 2819 bool *is_heap_stack) 2820 { 2821 struct vm_area_struct *vma; 2822 struct interval_tree_node *node; 2823 struct rb_node *rb_node; 2824 unsigned long start_limit, end_limit; 2825 2826 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2827 if (!vma) { 2828 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2829 return -EFAULT; 2830 } 2831 2832 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2833 2834 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2835 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity)); 2836 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2837 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity)); 2838 2839 /* First range that starts after the fault address */ 2840 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2841 if (node) { 2842 end_limit = min(end_limit, node->start); 2843 /* Last range that ends before the fault address */ 2844 rb_node = rb_prev(&node->rb); 2845 } else { 2846 /* Last range must end before addr because 2847 * there was no range after addr 2848 */ 2849 rb_node = rb_last(&p->svms.objects.rb_root); 2850 } 2851 if (rb_node) { 2852 node = container_of(rb_node, struct interval_tree_node, rb); 2853 if (node->last >= addr) { 2854 WARN(1, "Overlap with prev node and page fault addr\n"); 2855 return -EFAULT; 2856 } 2857 start_limit = max(start_limit, node->last + 1); 2858 } 2859 2860 *start = start_limit; 2861 *last = end_limit - 1; 2862 2863 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2864 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2865 *start, *last, *is_heap_stack); 2866 2867 return 0; 2868 } 2869 2870 static int 2871 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2872 uint64_t *bo_s, uint64_t *bo_l) 2873 { 2874 struct amdgpu_bo_va_mapping *mapping; 2875 struct interval_tree_node *node; 2876 struct amdgpu_bo *bo = NULL; 2877 unsigned long userptr; 2878 uint32_t i; 2879 int r; 2880 2881 for (i = 0; i < p->n_pdds; i++) { 2882 struct amdgpu_vm *vm; 2883 2884 if (!p->pdds[i]->drm_priv) 2885 continue; 2886 2887 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2888 r = amdgpu_bo_reserve(vm->root.bo, false); 2889 if (r) 2890 return r; 2891 2892 /* Check userptr by searching entire vm->va interval tree */ 2893 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2894 while (node) { 2895 mapping = container_of((struct rb_node *)node, 2896 struct amdgpu_bo_va_mapping, rb); 2897 bo = mapping->bo_va->base.bo; 2898 2899 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2900 start << PAGE_SHIFT, 2901 last << PAGE_SHIFT, 2902 &userptr)) { 2903 node = interval_tree_iter_next(node, 0, ~0ULL); 2904 continue; 2905 } 2906 2907 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2908 start, last); 2909 if (bo_s && bo_l) { 2910 *bo_s = userptr >> PAGE_SHIFT; 2911 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2912 } 2913 amdgpu_bo_unreserve(vm->root.bo); 2914 return -EADDRINUSE; 2915 } 2916 amdgpu_bo_unreserve(vm->root.bo); 2917 } 2918 return 0; 2919 } 2920 2921 static struct 2922 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2923 struct kfd_process *p, 2924 struct mm_struct *mm, 2925 int64_t addr) 2926 { 2927 struct svm_range *prange = NULL; 2928 unsigned long start, last; 2929 uint32_t gpuid, gpuidx; 2930 bool is_heap_stack; 2931 uint64_t bo_s = 0; 2932 uint64_t bo_l = 0; 2933 int r; 2934 2935 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2936 &is_heap_stack)) 2937 return NULL; 2938 2939 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2940 if (r != -EADDRINUSE) 2941 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2942 2943 if (r == -EADDRINUSE) { 2944 if (addr >= bo_s && addr <= bo_l) 2945 return NULL; 2946 2947 /* Create one page svm range if 2MB range overlapping */ 2948 start = addr; 2949 last = addr; 2950 } 2951 2952 prange = svm_range_new(&p->svms, start, last, true); 2953 if (!prange) { 2954 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2955 return NULL; 2956 } 2957 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2958 pr_debug("failed to get gpuid from kgd\n"); 2959 svm_range_free(prange, true); 2960 return NULL; 2961 } 2962 2963 if (is_heap_stack) 2964 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2965 2966 svm_range_add_to_svms(prange); 2967 svm_range_add_notifier_locked(mm, prange); 2968 2969 return prange; 2970 } 2971 2972 /* svm_range_skip_recover - decide if prange can be recovered 2973 * @prange: svm range structure 2974 * 2975 * GPU vm retry fault handle skip recover the range for cases: 2976 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2977 * deferred list work will drain the stale fault before free the prange. 2978 * 2. prange is on deferred list to add interval notifier after split, or 2979 * 3. prange is child range, it is split from parent prange, recover later 2980 * after interval notifier is added. 2981 * 2982 * Return: true to skip recover, false to recover 2983 */ 2984 static bool svm_range_skip_recover(struct svm_range *prange) 2985 { 2986 struct svm_range_list *svms = prange->svms; 2987 2988 spin_lock(&svms->deferred_list_lock); 2989 if (list_empty(&prange->deferred_list) && 2990 list_empty(&prange->child_list)) { 2991 spin_unlock(&svms->deferred_list_lock); 2992 return false; 2993 } 2994 spin_unlock(&svms->deferred_list_lock); 2995 2996 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2997 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2998 svms, prange, prange->start, prange->last); 2999 return true; 3000 } 3001 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 3002 prange->work_item.op == SVM_OP_ADD_RANGE) { 3003 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 3004 svms, prange, prange->start, prange->last); 3005 return true; 3006 } 3007 return false; 3008 } 3009 3010 static void 3011 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 3012 int32_t gpuidx) 3013 { 3014 struct kfd_process_device *pdd; 3015 3016 /* fault is on different page of same range 3017 * or fault is skipped to recover later 3018 * or fault is on invalid virtual address 3019 */ 3020 if (gpuidx == MAX_GPU_INSTANCE) { 3021 uint32_t gpuid; 3022 int r; 3023 3024 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 3025 if (r < 0) 3026 return; 3027 } 3028 3029 /* fault is recovered 3030 * or fault cannot recover because GPU no access on the range 3031 */ 3032 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3033 if (pdd) 3034 WRITE_ONCE(pdd->faults, pdd->faults + 1); 3035 } 3036 3037 static bool 3038 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 3039 { 3040 unsigned long requested = VM_READ; 3041 3042 if (write_fault) 3043 requested |= VM_WRITE; 3044 3045 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 3046 vma->vm_flags); 3047 return (vma->vm_flags & requested) == requested; 3048 } 3049 3050 int 3051 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 3052 uint32_t vmid, uint32_t node_id, 3053 uint64_t addr, uint64_t ts, bool write_fault) 3054 { 3055 unsigned long start, last, size; 3056 struct mm_struct *mm = NULL; 3057 struct svm_range_list *svms; 3058 struct svm_range *prange; 3059 struct kfd_process *p; 3060 ktime_t timestamp = ktime_get_boottime(); 3061 uint64_t checkpoint_ts; 3062 struct kfd_node *node; 3063 int32_t best_loc; 3064 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 3065 bool write_locked = false; 3066 struct vm_area_struct *vma; 3067 bool migration = false; 3068 int r = 0; 3069 3070 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 3071 pr_debug("device does not support SVM\n"); 3072 return -EFAULT; 3073 } 3074 3075 p = kfd_lookup_process_by_pasid(pasid, NULL); 3076 if (!p) { 3077 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 3078 return 0; 3079 } 3080 svms = &p->svms; 3081 3082 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 3083 3084 if (atomic_read(&svms->drain_pagefaults)) { 3085 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 3086 r = 0; 3087 goto out; 3088 } 3089 3090 node = kfd_node_by_irq_ids(adev, node_id, vmid); 3091 if (!node) { 3092 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 3093 vmid); 3094 r = -EFAULT; 3095 goto out; 3096 } 3097 3098 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 3099 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 3100 r = -EFAULT; 3101 goto out; 3102 } 3103 3104 if (!p->xnack_enabled) { 3105 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 3106 r = -EFAULT; 3107 goto out; 3108 } 3109 3110 /* p->lead_thread is available as kfd_process_wq_release flush the work 3111 * before releasing task ref. 3112 */ 3113 mm = get_task_mm(p->lead_thread); 3114 if (!mm) { 3115 pr_debug("svms 0x%p failed to get mm\n", svms); 3116 r = 0; 3117 goto out; 3118 } 3119 3120 mmap_read_lock(mm); 3121 retry_write_locked: 3122 mutex_lock(&svms->lock); 3123 3124 checkpoint_ts = atomic64_read(&svms->checkpoint_ts[gpuidx]); 3125 3126 /* check if this page fault time stamp is before svms->checkpoint_ts */ 3127 if (checkpoint_ts) { 3128 if (amdgpu_ih_ts_after_or_equal(ts, checkpoint_ts)) { 3129 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 3130 if (write_locked) 3131 mmap_write_downgrade(mm); 3132 r = -EAGAIN; 3133 goto out_unlock_svms; 3134 } else { 3135 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 3136 * to zero to avoid following ts wrap around give wrong comparing 3137 */ 3138 atomic64_set(&svms->checkpoint_ts[gpuidx], 0); 3139 } 3140 } 3141 3142 prange = svm_range_from_addr(svms, addr, NULL); 3143 if (!prange) { 3144 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3145 svms, addr); 3146 if (!write_locked) { 3147 /* Need the write lock to create new range with MMU notifier. 3148 * Also flush pending deferred work to make sure the interval 3149 * tree is up to date before we add a new range 3150 */ 3151 mutex_unlock(&svms->lock); 3152 mmap_read_unlock(mm); 3153 mmap_write_lock(mm); 3154 write_locked = true; 3155 goto retry_write_locked; 3156 } 3157 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3158 if (!prange) { 3159 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3160 svms, addr); 3161 mmap_write_downgrade(mm); 3162 r = -EFAULT; 3163 goto out_unlock_svms; 3164 } 3165 } 3166 if (write_locked) 3167 mmap_write_downgrade(mm); 3168 3169 mutex_lock(&prange->migrate_mutex); 3170 3171 if (svm_range_skip_recover(prange)) { 3172 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3173 r = 0; 3174 goto out_unlock_range; 3175 } 3176 3177 /* skip duplicate vm fault on different pages of same range */ 3178 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3179 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3180 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3181 svms, prange->start, prange->last); 3182 r = 0; 3183 goto out_unlock_range; 3184 } 3185 3186 /* __do_munmap removed VMA, return success as we are handling stale 3187 * retry fault. 3188 */ 3189 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3190 if (!vma) { 3191 pr_debug("address 0x%llx VMA is removed\n", addr); 3192 r = 0; 3193 goto out_unlock_range; 3194 } 3195 3196 if (!svm_fault_allowed(vma, write_fault)) { 3197 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3198 write_fault ? "write" : "read"); 3199 r = -EPERM; 3200 goto out_unlock_range; 3201 } 3202 3203 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3204 if (best_loc == -1) { 3205 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3206 svms, prange->start, prange->last); 3207 r = -EACCES; 3208 goto out_unlock_range; 3209 } 3210 3211 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3212 svms, prange->start, prange->last, best_loc, 3213 prange->actual_loc); 3214 3215 kfd_smi_event_page_fault_start(node, p->lead_thread, addr, 3216 write_fault, timestamp); 3217 3218 /* Align migration range start and size to granularity size */ 3219 size = 1UL << prange->granularity; 3220 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3221 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3222 if (prange->actual_loc != 0 || best_loc != 0) { 3223 if (best_loc) { 3224 r = svm_migrate_to_vram(prange, best_loc, start, last, 3225 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3226 if (r) { 3227 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3228 r, addr); 3229 /* Fallback to system memory if migration to 3230 * VRAM failed 3231 */ 3232 if (prange->actual_loc && prange->actual_loc != best_loc) 3233 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3234 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3235 else 3236 r = 0; 3237 } 3238 } else { 3239 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3240 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3241 } 3242 if (r) { 3243 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3244 r, svms, start, last); 3245 goto out_migrate_fail; 3246 } else { 3247 migration = true; 3248 } 3249 } 3250 3251 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3252 false, false); 3253 if (r) 3254 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3255 r, svms, start, last); 3256 3257 out_migrate_fail: 3258 kfd_smi_event_page_fault_end(node, p->lead_thread, addr, 3259 migration); 3260 3261 out_unlock_range: 3262 mutex_unlock(&prange->migrate_mutex); 3263 out_unlock_svms: 3264 mutex_unlock(&svms->lock); 3265 mmap_read_unlock(mm); 3266 3267 if (r != -EAGAIN) 3268 svm_range_count_fault(node, p, gpuidx); 3269 3270 mmput(mm); 3271 out: 3272 kfd_unref_process(p); 3273 3274 if (r == -EAGAIN) { 3275 pr_debug("recover vm fault later\n"); 3276 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3277 r = 0; 3278 } 3279 return r; 3280 } 3281 3282 int 3283 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3284 { 3285 struct svm_range *prange, *pchild; 3286 uint64_t reserved_size = 0; 3287 uint64_t size; 3288 int r = 0; 3289 3290 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3291 3292 mutex_lock(&p->svms.lock); 3293 3294 list_for_each_entry(prange, &p->svms.list, list) { 3295 svm_range_lock(prange); 3296 list_for_each_entry(pchild, &prange->child_list, child_list) { 3297 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3298 if (xnack_enabled) { 3299 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3300 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3301 } else { 3302 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3303 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3304 if (r) 3305 goto out_unlock; 3306 reserved_size += size; 3307 } 3308 } 3309 3310 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3311 if (xnack_enabled) { 3312 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3313 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3314 } else { 3315 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3316 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3317 if (r) 3318 goto out_unlock; 3319 reserved_size += size; 3320 } 3321 out_unlock: 3322 svm_range_unlock(prange); 3323 if (r) 3324 break; 3325 } 3326 3327 if (r) 3328 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3329 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3330 else 3331 /* Change xnack mode must be inside svms lock, to avoid race with 3332 * svm_range_deferred_list_work unreserve memory in parallel. 3333 */ 3334 p->xnack_enabled = xnack_enabled; 3335 3336 mutex_unlock(&p->svms.lock); 3337 return r; 3338 } 3339 3340 void svm_range_list_fini(struct kfd_process *p) 3341 { 3342 struct svm_range *prange; 3343 struct svm_range *next; 3344 3345 pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid, 3346 &p->svms); 3347 3348 cancel_delayed_work_sync(&p->svms.restore_work); 3349 3350 /* Ensure list work is finished before process is destroyed */ 3351 flush_work(&p->svms.deferred_list_work); 3352 3353 /* 3354 * Ensure no retry fault comes in afterwards, as page fault handler will 3355 * not find kfd process and take mm lock to recover fault. 3356 * stop kfd page fault handing, then wait pending page faults got drained 3357 */ 3358 atomic_set(&p->svms.drain_pagefaults, 1); 3359 svm_range_drain_retry_fault(&p->svms); 3360 3361 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3362 svm_range_unlink(prange); 3363 svm_range_remove_notifier(prange); 3364 svm_range_free(prange, true); 3365 } 3366 3367 mutex_destroy(&p->svms.lock); 3368 3369 pr_debug("process pid %d svms 0x%p done\n", 3370 p->lead_thread->pid, &p->svms); 3371 } 3372 3373 int svm_range_list_init(struct kfd_process *p) 3374 { 3375 struct svm_range_list *svms = &p->svms; 3376 int i; 3377 3378 svms->objects = RB_ROOT_CACHED; 3379 mutex_init(&svms->lock); 3380 INIT_LIST_HEAD(&svms->list); 3381 atomic_set(&svms->evicted_ranges, 0); 3382 atomic_set(&svms->drain_pagefaults, 0); 3383 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3384 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3385 INIT_LIST_HEAD(&svms->deferred_range_list); 3386 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3387 spin_lock_init(&svms->deferred_list_lock); 3388 3389 for (i = 0; i < p->n_pdds; i++) 3390 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3391 bitmap_set(svms->bitmap_supported, i, 1); 3392 3393 /* Value of default granularity cannot exceed 0x1B, the 3394 * number of pages supported by a 4-level paging table 3395 */ 3396 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B); 3397 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity); 3398 3399 return 0; 3400 } 3401 3402 /** 3403 * svm_range_check_vm - check if virtual address range mapped already 3404 * @p: current kfd_process 3405 * @start: range start address, in pages 3406 * @last: range last address, in pages 3407 * @bo_s: mapping start address in pages if address range already mapped 3408 * @bo_l: mapping last address in pages if address range already mapped 3409 * 3410 * The purpose is to avoid virtual address ranges already allocated by 3411 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3412 * It looks for each pdd in the kfd_process. 3413 * 3414 * Context: Process context 3415 * 3416 * Return 0 - OK, if the range is not mapped. 3417 * Otherwise error code: 3418 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3419 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3420 * a signal. Release all buffer reservations and return to user-space. 3421 */ 3422 static int 3423 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3424 uint64_t *bo_s, uint64_t *bo_l) 3425 { 3426 struct amdgpu_bo_va_mapping *mapping; 3427 struct interval_tree_node *node; 3428 uint32_t i; 3429 int r; 3430 3431 for (i = 0; i < p->n_pdds; i++) { 3432 struct amdgpu_vm *vm; 3433 3434 if (!p->pdds[i]->drm_priv) 3435 continue; 3436 3437 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3438 r = amdgpu_bo_reserve(vm->root.bo, false); 3439 if (r) 3440 return r; 3441 3442 node = interval_tree_iter_first(&vm->va, start, last); 3443 if (node) { 3444 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3445 start, last); 3446 mapping = container_of((struct rb_node *)node, 3447 struct amdgpu_bo_va_mapping, rb); 3448 if (bo_s && bo_l) { 3449 *bo_s = mapping->start; 3450 *bo_l = mapping->last; 3451 } 3452 amdgpu_bo_unreserve(vm->root.bo); 3453 return -EADDRINUSE; 3454 } 3455 amdgpu_bo_unreserve(vm->root.bo); 3456 } 3457 3458 return 0; 3459 } 3460 3461 /** 3462 * svm_range_is_valid - check if virtual address range is valid 3463 * @p: current kfd_process 3464 * @start: range start address, in pages 3465 * @size: range size, in pages 3466 * 3467 * Valid virtual address range means it belongs to one or more VMAs 3468 * 3469 * Context: Process context 3470 * 3471 * Return: 3472 * 0 - OK, otherwise error code 3473 */ 3474 static int 3475 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3476 { 3477 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3478 struct vm_area_struct *vma; 3479 unsigned long end; 3480 unsigned long start_unchg = start; 3481 3482 start <<= PAGE_SHIFT; 3483 3484 if (size == 0) 3485 return -EINVAL; 3486 3487 if (check_add_overflow(start, size << PAGE_SHIFT, &end)) 3488 return -EOVERFLOW; 3489 3490 do { 3491 vma = vma_lookup(p->mm, start); 3492 if (!vma || (vma->vm_flags & device_vma)) 3493 return -EFAULT; 3494 start = min(end, vma->vm_end); 3495 } while (start < end); 3496 3497 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3498 NULL); 3499 } 3500 3501 /** 3502 * svm_range_best_prefetch_location - decide the best prefetch location 3503 * @prange: svm range structure 3504 * 3505 * For xnack off: 3506 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3507 * can be CPU or GPU. 3508 * 3509 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3510 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3511 * the best prefetch location is always CPU, because GPU can not have coherent 3512 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3513 * 3514 * For xnack on: 3515 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3516 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3517 * 3518 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3519 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3520 * prefetch location is always CPU. 3521 * 3522 * Context: Process context 3523 * 3524 * Return: 3525 * 0 for CPU or GPU id 3526 */ 3527 static uint32_t 3528 svm_range_best_prefetch_location(struct svm_range *prange) 3529 { 3530 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3531 uint32_t best_loc = prange->prefetch_loc; 3532 struct kfd_process_device *pdd; 3533 struct kfd_node *bo_node; 3534 struct kfd_process *p; 3535 uint32_t gpuidx; 3536 3537 p = container_of(prange->svms, struct kfd_process, svms); 3538 3539 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3540 goto out; 3541 3542 bo_node = svm_range_get_node_by_id(prange, best_loc); 3543 if (!bo_node) { 3544 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3545 best_loc = 0; 3546 goto out; 3547 } 3548 3549 if (bo_node->adev->apu_prefer_gtt) { 3550 best_loc = 0; 3551 goto out; 3552 } 3553 3554 if (p->xnack_enabled) 3555 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3556 else 3557 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3558 MAX_GPU_INSTANCE); 3559 3560 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3561 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3562 if (!pdd) { 3563 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3564 continue; 3565 } 3566 3567 if (pdd->dev->adev == bo_node->adev) 3568 continue; 3569 3570 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3571 best_loc = 0; 3572 break; 3573 } 3574 } 3575 3576 out: 3577 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3578 p->xnack_enabled, &p->svms, prange->start, prange->last, 3579 best_loc); 3580 3581 return best_loc; 3582 } 3583 3584 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3585 * @mm: current process mm_struct 3586 * @prange: svm range structure 3587 * @migrated: output, true if migration is triggered 3588 * 3589 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3590 * from ram to vram. 3591 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3592 * from vram to ram. 3593 * 3594 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3595 * and restore work: 3596 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3597 * stops all queues, schedule restore work 3598 * 2. svm_range_restore_work wait for migration is done by 3599 * a. svm_range_validate_vram takes prange->migrate_mutex 3600 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3601 * 3. restore work update mappings of GPU, resume all queues. 3602 * 3603 * Context: Process context 3604 * 3605 * Return: 3606 * 0 - OK, otherwise - error code of migration 3607 */ 3608 static int 3609 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3610 bool *migrated) 3611 { 3612 uint32_t best_loc; 3613 int r = 0; 3614 3615 *migrated = false; 3616 best_loc = svm_range_best_prefetch_location(prange); 3617 3618 /* when best_loc is a gpu node and same as prange->actual_loc 3619 * we still need do migration as prange->actual_loc !=0 does 3620 * not mean all pages in prange are vram. hmm migrate will pick 3621 * up right pages during migration. 3622 */ 3623 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3624 (best_loc == 0 && prange->actual_loc == 0)) 3625 return 0; 3626 3627 if (!best_loc) { 3628 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3629 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3630 *migrated = !r; 3631 return r; 3632 } 3633 3634 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3635 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3636 *migrated = !r; 3637 3638 return 0; 3639 } 3640 3641 int svm_range_evict_svm_bo(struct amdgpu_bo *bo) 3642 { 3643 struct svm_range_bo *svm_bo = to_svm_range_bo(bo); 3644 struct mm_struct *mm; 3645 int r = 0; 3646 3647 if (!svm_bo_ref_unless_zero(svm_bo)) 3648 return 0; 3649 3650 if (!mmget_not_zero(svm_bo->mm)) { 3651 svm_range_bo_unref(svm_bo); 3652 return 0; 3653 } 3654 mm = svm_bo->mm; 3655 3656 /* 3657 * Called with the BO reserved; lock order is mmap_lock -> BO 3658 * reservation. Only trylock mmap to invert that order safely: a 3659 * trylock never blocks, so it cannot deadlock against the reservation 3660 * and lockdep records no reverse dependency. On contention return 3661 * -EBUSY so TTM skips this BO. 3662 */ 3663 if (!mmap_read_trylock(mm)) { 3664 pr_debug("skip eviction, contended to take mmap_read lock\n"); 3665 mmput_async(mm); 3666 svm_range_bo_unref(svm_bo); 3667 return -EBUSY; 3668 } 3669 3670 WRITE_ONCE(svm_bo->evicting, 1); 3671 3672 spin_lock(&svm_bo->list_lock); 3673 while (!list_empty(&svm_bo->range_list) && !r) { 3674 struct svm_range *prange = 3675 list_first_entry(&svm_bo->range_list, 3676 struct svm_range, svm_bo_list); 3677 int retries = 3; 3678 3679 /* 3680 * Trylock migrate_mutex under list_lock, before unlinking the 3681 * range, so svm_range_free() cannot free it under us. On 3682 * contention the owner is migrating this range; skip the BO. 3683 */ 3684 if (!mutex_trylock(&prange->migrate_mutex)) { 3685 pr_debug("skip eviction, contended migrate_mutex\n"); 3686 /* Clear evicting so the BO keeps being reused. */ 3687 WRITE_ONCE(svm_bo->evicting, 0); 3688 r = -EBUSY; 3689 break; 3690 } 3691 list_del_init(&prange->svm_bo_list); 3692 spin_unlock(&svm_bo->list_lock); 3693 3694 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3695 prange->start, prange->last); 3696 3697 do { 3698 /* migrate all vram pages in this prange to sys ram 3699 * after that prange->actual_loc should be zero 3700 */ 3701 r = svm_migrate_vram_to_ram(prange, mm, 3702 prange->start, prange->last, 3703 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3704 } while (!r && prange->actual_loc && --retries); 3705 3706 if (!r && prange->actual_loc) 3707 pr_info_once("Migration failed during eviction"); 3708 3709 if (!prange->actual_loc) { 3710 mutex_lock(&prange->lock); 3711 prange->svm_bo = NULL; 3712 mutex_unlock(&prange->lock); 3713 } 3714 mutex_unlock(&prange->migrate_mutex); 3715 3716 spin_lock(&svm_bo->list_lock); 3717 } 3718 spin_unlock(&svm_bo->list_lock); 3719 mmap_read_unlock(mm); 3720 /* Defer mmput: exit_mmap() must not run under the BO reservation. */ 3721 mmput_async(mm); 3722 3723 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3724 * has been called in svm_migrate_vram_to_ram 3725 */ 3726 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3727 svm_range_bo_unref(svm_bo); 3728 3729 return r; 3730 } 3731 3732 static bool svm_range_needs_unmap(struct kfd_process *p, struct svm_range *prange) 3733 { 3734 if (bitmap_empty(prange->bitmap_needs_unmap, MAX_GPU_INSTANCE)) 3735 return false; 3736 3737 pr_debug("prange 0x%p no access set for [0x%lx 0x%lx]\n", 3738 prange, prange->start, prange->last); 3739 3740 svm_range_update_checkpoint_timestamp(p); 3741 3742 svm_range_unmap_from_gpus(prange, prange->start, 3743 prange->last, prange->bitmap_needs_unmap, 3744 KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU); 3745 3746 bitmap_clear(prange->bitmap_needs_unmap, 0, MAX_GPU_INSTANCE); 3747 3748 return bitmap_empty(prange->bitmap_mapped, MAX_GPU_INSTANCE); 3749 } 3750 3751 static int 3752 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3753 uint64_t start, uint64_t size, uint32_t nattr, 3754 struct kfd_ioctl_svm_attribute *attrs) 3755 { 3756 struct amdkfd_process_info *process_info = p->kgd_process_info; 3757 struct list_head update_list; 3758 struct list_head insert_list; 3759 struct list_head remove_list; 3760 struct list_head remap_list; 3761 struct svm_range_list *svms; 3762 struct svm_range *prange; 3763 struct svm_range *next; 3764 bool update_mapping = false; 3765 bool flush_tlb; 3766 int r, ret = 0; 3767 3768 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3769 p->lead_thread->pid, &p->svms, start, start + size - 1, size); 3770 3771 r = svm_range_check_attr(p, nattr, attrs); 3772 if (r) 3773 return r; 3774 3775 svms = &p->svms; 3776 3777 if (!process_info) 3778 return -EINVAL; 3779 3780 mutex_lock(&process_info->lock); 3781 3782 svm_range_list_lock_and_flush_work(svms, mm); 3783 3784 r = svm_range_is_valid(p, start, size); 3785 if (r) { 3786 pr_debug("invalid range r=%d\n", r); 3787 mmap_write_unlock(mm); 3788 goto out; 3789 } 3790 3791 mutex_lock(&svms->lock); 3792 3793 /* Add new range and split existing ranges as needed */ 3794 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3795 &insert_list, &remove_list, &remap_list); 3796 if (r) { 3797 mutex_unlock(&svms->lock); 3798 mmap_write_unlock(mm); 3799 goto out; 3800 } 3801 /* Apply changes as a transaction */ 3802 list_for_each_entry_safe(prange, next, &insert_list, list) { 3803 svm_range_add_to_svms(prange); 3804 svm_range_add_notifier_locked(mm, prange); 3805 } 3806 3807 list_for_each_entry(prange, &update_list, update_list) 3808 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3809 3810 update_mapping |= !p->xnack_enabled && !list_empty(&remap_list); 3811 3812 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3813 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3814 prange->svms, prange, prange->start, 3815 prange->last); 3816 svm_range_unlink(prange); 3817 svm_range_remove_notifier(prange); 3818 svm_range_free(prange, false); 3819 } 3820 3821 mmap_write_downgrade(mm); 3822 /* Trigger migrations and revalidate and map to GPUs as needed. If 3823 * this fails we may be left with partially completed actions. There 3824 * is no clean way of rolling back to the previous state in such a 3825 * case because the rollback wouldn't be guaranteed to work either. 3826 */ 3827 list_for_each_entry(prange, &update_list, update_list) { 3828 bool migrated; 3829 3830 if (svm_range_needs_unmap(p, prange)) 3831 continue; 3832 3833 mutex_lock(&prange->migrate_mutex); 3834 3835 r = svm_range_trigger_migration(mm, prange, &migrated); 3836 if (r) 3837 goto out_unlock_range; 3838 3839 if (migrated && (!p->xnack_enabled || 3840 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3841 !bitmap_empty(prange->bitmap_mapped, MAX_GPU_INSTANCE)) { 3842 pr_debug("restore_work will update mappings of GPUs\n"); 3843 mutex_unlock(&prange->migrate_mutex); 3844 continue; 3845 } 3846 3847 if (!migrated && !update_mapping) { 3848 mutex_unlock(&prange->migrate_mutex); 3849 continue; 3850 } 3851 3852 flush_tlb = !migrated && update_mapping && 3853 !bitmap_empty(prange->bitmap_mapped, MAX_GPU_INSTANCE); 3854 3855 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3856 MAX_GPU_INSTANCE, true, true, flush_tlb); 3857 if (r) 3858 pr_debug("failed %d to map svm range\n", r); 3859 3860 out_unlock_range: 3861 mutex_unlock(&prange->migrate_mutex); 3862 if (r) 3863 ret = r; 3864 } 3865 3866 list_for_each_entry(prange, &remap_list, update_list) { 3867 flush_tlb = !bitmap_empty(prange->bitmap_mapped, MAX_GPU_INSTANCE); 3868 3869 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3870 prange, prange->start, prange->last); 3871 mutex_lock(&prange->migrate_mutex); 3872 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3873 MAX_GPU_INSTANCE, true, true, flush_tlb); 3874 if (r) 3875 pr_debug("failed %d on remap svm range\n", r); 3876 mutex_unlock(&prange->migrate_mutex); 3877 if (r) 3878 ret = r; 3879 } 3880 3881 dynamic_svm_range_dump(svms); 3882 3883 mutex_unlock(&svms->lock); 3884 mmap_read_unlock(mm); 3885 out: 3886 mutex_unlock(&process_info->lock); 3887 3888 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n", 3889 p->lead_thread->pid, &p->svms, start, start + size - 1, r); 3890 3891 return ret ? ret : r; 3892 } 3893 3894 static int 3895 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3896 uint64_t start, uint64_t size, uint32_t nattr, 3897 struct kfd_ioctl_svm_attribute *attrs) 3898 { 3899 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3900 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3901 bool get_preferred_loc = false; 3902 bool get_prefetch_loc = false; 3903 bool get_granularity = false; 3904 bool get_accessible = false; 3905 bool get_flags = false; 3906 uint64_t last = start + size - 1UL; 3907 uint8_t granularity = 0xff; 3908 struct interval_tree_node *node; 3909 struct svm_range_list *svms; 3910 struct svm_range *prange; 3911 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3912 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3913 uint32_t flags_and = 0xffffffff; 3914 uint32_t flags_or = 0; 3915 int gpuidx; 3916 uint32_t i; 3917 int r = 0; 3918 3919 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3920 start + size - 1, nattr); 3921 3922 /* Flush pending deferred work to avoid racing with deferred actions from 3923 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3924 * can still race with get_attr because we don't hold the mmap lock. But that 3925 * would be a race condition in the application anyway, and undefined 3926 * behaviour is acceptable in that case. 3927 */ 3928 flush_work(&p->svms.deferred_list_work); 3929 3930 mmap_read_lock(mm); 3931 r = svm_range_is_valid(p, start, size); 3932 mmap_read_unlock(mm); 3933 if (r) { 3934 pr_debug("invalid range r=%d\n", r); 3935 return r; 3936 } 3937 3938 for (i = 0; i < nattr; i++) { 3939 switch (attrs[i].type) { 3940 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3941 get_preferred_loc = true; 3942 break; 3943 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3944 get_prefetch_loc = true; 3945 break; 3946 case KFD_IOCTL_SVM_ATTR_ACCESS: 3947 get_accessible = true; 3948 break; 3949 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3950 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3951 get_flags = true; 3952 break; 3953 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3954 get_granularity = true; 3955 break; 3956 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3957 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3958 fallthrough; 3959 default: 3960 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3961 return -EINVAL; 3962 } 3963 } 3964 3965 svms = &p->svms; 3966 3967 mutex_lock(&svms->lock); 3968 3969 node = interval_tree_iter_first(&svms->objects, start, last); 3970 if (!node) { 3971 pr_debug("range attrs not found return default values\n"); 3972 svm_range_set_default_attributes(svms, &location, &prefetch_loc, 3973 &granularity, &flags_and); 3974 flags_or = flags_and; 3975 if (p->xnack_enabled) 3976 bitmap_copy(bitmap_access, svms->bitmap_supported, 3977 MAX_GPU_INSTANCE); 3978 else 3979 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3980 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3981 goto fill_values; 3982 } 3983 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3984 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3985 3986 while (node) { 3987 struct interval_tree_node *next; 3988 3989 prange = container_of(node, struct svm_range, it_node); 3990 next = interval_tree_iter_next(node, start, last); 3991 3992 if (get_preferred_loc) { 3993 if (prange->preferred_loc == 3994 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3995 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3996 location != prange->preferred_loc)) { 3997 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3998 get_preferred_loc = false; 3999 } else { 4000 location = prange->preferred_loc; 4001 } 4002 } 4003 if (get_prefetch_loc) { 4004 if (prange->prefetch_loc == 4005 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 4006 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 4007 prefetch_loc != prange->prefetch_loc)) { 4008 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 4009 get_prefetch_loc = false; 4010 } else { 4011 prefetch_loc = prange->prefetch_loc; 4012 } 4013 } 4014 if (get_accessible) { 4015 bitmap_and(bitmap_access, bitmap_access, 4016 prange->bitmap_access, MAX_GPU_INSTANCE); 4017 bitmap_and(bitmap_aip, bitmap_aip, 4018 prange->bitmap_aip, MAX_GPU_INSTANCE); 4019 } 4020 if (get_flags) { 4021 flags_and &= prange->flags; 4022 flags_or |= prange->flags; 4023 } 4024 4025 if (get_granularity && prange->granularity < granularity) 4026 granularity = prange->granularity; 4027 4028 node = next; 4029 } 4030 fill_values: 4031 mutex_unlock(&svms->lock); 4032 4033 for (i = 0; i < nattr; i++) { 4034 switch (attrs[i].type) { 4035 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 4036 attrs[i].value = location; 4037 break; 4038 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 4039 attrs[i].value = prefetch_loc; 4040 break; 4041 case KFD_IOCTL_SVM_ATTR_ACCESS: 4042 gpuidx = kfd_process_gpuidx_from_gpuid(p, 4043 attrs[i].value); 4044 if (gpuidx < 0) { 4045 pr_debug("invalid gpuid %x\n", attrs[i].value); 4046 return -EINVAL; 4047 } 4048 if (test_bit(gpuidx, bitmap_access)) 4049 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 4050 else if (test_bit(gpuidx, bitmap_aip)) 4051 attrs[i].type = 4052 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 4053 else 4054 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 4055 break; 4056 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 4057 attrs[i].value = flags_and; 4058 break; 4059 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 4060 attrs[i].value = ~flags_or; 4061 break; 4062 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 4063 attrs[i].value = (uint32_t)granularity; 4064 break; 4065 } 4066 } 4067 4068 return 0; 4069 } 4070 4071 int kfd_criu_resume_svm(struct kfd_process *p) 4072 { 4073 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 4074 int nattr_common = 4, nattr_accessibility = 1; 4075 struct criu_svm_metadata *criu_svm_md = NULL; 4076 struct svm_range_list *svms = &p->svms; 4077 struct criu_svm_metadata *next = NULL; 4078 uint32_t set_flags = 0xffffffff; 4079 int i, j, num_attrs, ret = 0; 4080 uint64_t set_attr_size; 4081 struct mm_struct *mm; 4082 4083 if (list_empty(&svms->criu_svm_metadata_list)) { 4084 pr_debug("No SVM data from CRIU restore stage 2\n"); 4085 return ret; 4086 } 4087 4088 mm = get_task_mm(p->lead_thread); 4089 if (!mm) { 4090 pr_err("failed to get mm for the target process\n"); 4091 return -ESRCH; 4092 } 4093 4094 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 4095 4096 i = j = 0; 4097 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 4098 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 4099 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 4100 4101 for (j = 0; j < num_attrs; j++) { 4102 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 4103 i, j, criu_svm_md->data.attrs[j].type, 4104 i, j, criu_svm_md->data.attrs[j].value); 4105 switch (criu_svm_md->data.attrs[j].type) { 4106 /* During Checkpoint operation, the query for 4107 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 4108 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 4109 * not used by the range which was checkpointed. Care 4110 * must be taken to not restore with an invalid value 4111 * otherwise the gpuidx value will be invalid and 4112 * set_attr would eventually fail so just replace those 4113 * with another dummy attribute such as 4114 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 4115 */ 4116 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 4117 if (criu_svm_md->data.attrs[j].value == 4118 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 4119 criu_svm_md->data.attrs[j].type = 4120 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4121 criu_svm_md->data.attrs[j].value = 0; 4122 } 4123 break; 4124 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 4125 set_flags = criu_svm_md->data.attrs[j].value; 4126 break; 4127 default: 4128 break; 4129 } 4130 } 4131 4132 /* CLR_FLAGS is not available via get_attr during checkpoint but 4133 * it needs to be inserted before restoring the ranges so 4134 * allocate extra space for it before calling set_attr 4135 */ 4136 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4137 (num_attrs + 1); 4138 set_attr_new = krealloc(set_attr, set_attr_size, 4139 GFP_KERNEL); 4140 if (!set_attr_new) { 4141 ret = -ENOMEM; 4142 goto exit; 4143 } 4144 set_attr = set_attr_new; 4145 4146 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 4147 sizeof(struct kfd_ioctl_svm_attribute)); 4148 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 4149 set_attr[num_attrs].value = ~set_flags; 4150 4151 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 4152 criu_svm_md->data.size, num_attrs + 1, 4153 set_attr); 4154 if (ret) { 4155 pr_err("CRIU: failed to set range attributes\n"); 4156 goto exit; 4157 } 4158 4159 i++; 4160 } 4161 exit: 4162 kfree(set_attr); 4163 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 4164 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 4165 criu_svm_md->data.start_addr); 4166 list_del(&criu_svm_md->list); 4167 kfree(criu_svm_md); 4168 } 4169 4170 mmput(mm); 4171 return ret; 4172 4173 } 4174 4175 int kfd_criu_restore_svm(struct kfd_process *p, 4176 uint8_t __user *user_priv_ptr, 4177 uint64_t *priv_data_offset, 4178 uint64_t max_priv_data_size) 4179 { 4180 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 4181 int nattr_common = 4, nattr_accessibility = 1; 4182 struct criu_svm_metadata *criu_svm_md = NULL; 4183 struct svm_range_list *svms = &p->svms; 4184 uint32_t num_devices; 4185 int ret = 0; 4186 4187 num_devices = p->n_pdds; 4188 /* Handle one SVM range object at a time, also the number of gpus are 4189 * assumed to be same on the restore node, checking must be done while 4190 * evaluating the topology earlier 4191 */ 4192 4193 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 4194 (nattr_common + nattr_accessibility * num_devices); 4195 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 4196 4197 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4198 svm_attrs_size; 4199 4200 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4201 if (!criu_svm_md) { 4202 pr_err("failed to allocate memory to store svm metadata\n"); 4203 return -ENOMEM; 4204 } 4205 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4206 ret = -EINVAL; 4207 goto exit; 4208 } 4209 4210 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4211 svm_priv_data_size); 4212 if (ret) { 4213 ret = -EFAULT; 4214 goto exit; 4215 } 4216 *priv_data_offset += svm_priv_data_size; 4217 4218 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4219 4220 return 0; 4221 4222 4223 exit: 4224 kfree(criu_svm_md); 4225 return ret; 4226 } 4227 4228 void svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4229 uint64_t *svm_priv_data_size) 4230 { 4231 uint64_t total_size, accessibility_size, common_attr_size; 4232 int nattr_common = 4, nattr_accessibility = 1; 4233 int num_devices = p->n_pdds; 4234 struct svm_range_list *svms; 4235 struct svm_range *prange; 4236 uint32_t count = 0; 4237 4238 *svm_priv_data_size = 0; 4239 4240 svms = &p->svms; 4241 4242 mutex_lock(&svms->lock); 4243 list_for_each_entry(prange, &svms->list, list) { 4244 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4245 prange, prange->start, prange->npages, 4246 prange->start + prange->npages - 1); 4247 count++; 4248 } 4249 mutex_unlock(&svms->lock); 4250 4251 *num_svm_ranges = count; 4252 /* Only the accessbility attributes need to be queried for all the gpus 4253 * individually, remaining ones are spanned across the entire process 4254 * regardless of the various gpu nodes. Of the remaining attributes, 4255 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4256 * 4257 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4258 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4259 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4260 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4261 * 4262 * ** ACCESSBILITY ATTRIBUTES ** 4263 * (Considered as one, type is altered during query, value is gpuid) 4264 * KFD_IOCTL_SVM_ATTR_ACCESS 4265 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4266 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4267 */ 4268 if (*num_svm_ranges > 0) { 4269 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4270 nattr_common; 4271 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4272 nattr_accessibility * num_devices; 4273 4274 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4275 common_attr_size + accessibility_size; 4276 4277 *svm_priv_data_size = *num_svm_ranges * total_size; 4278 } 4279 4280 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4281 *svm_priv_data_size); 4282 } 4283 4284 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4285 uint8_t __user *user_priv_data, 4286 uint64_t *priv_data_offset) 4287 { 4288 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4289 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4290 uint64_t svm_priv_data_size, query_attr_size = 0; 4291 int index, nattr_common = 4, ret = 0; 4292 struct svm_range_list *svms; 4293 int num_devices = p->n_pdds; 4294 struct svm_range *prange; 4295 struct mm_struct *mm; 4296 4297 svms = &p->svms; 4298 4299 mm = get_task_mm(p->lead_thread); 4300 if (!mm) { 4301 pr_err("failed to get mm for the target process\n"); 4302 return -ESRCH; 4303 } 4304 4305 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4306 (nattr_common + num_devices); 4307 4308 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4309 if (!query_attr) { 4310 ret = -ENOMEM; 4311 goto exit; 4312 } 4313 4314 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4315 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4316 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4317 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4318 4319 for (index = 0; index < num_devices; index++) { 4320 struct kfd_process_device *pdd = p->pdds[index]; 4321 4322 query_attr[index + nattr_common].type = 4323 KFD_IOCTL_SVM_ATTR_ACCESS; 4324 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4325 } 4326 4327 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4328 4329 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4330 if (!svm_priv) { 4331 ret = -ENOMEM; 4332 goto exit_query; 4333 } 4334 4335 index = 0; 4336 list_for_each_entry(prange, &svms->list, list) { 4337 4338 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4339 svm_priv->start_addr = prange->start; 4340 svm_priv->size = prange->npages; 4341 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4342 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4343 prange, prange->start, prange->npages, 4344 prange->start + prange->npages - 1, 4345 prange->npages * PAGE_SIZE); 4346 4347 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4348 svm_priv->size, 4349 (nattr_common + num_devices), 4350 svm_priv->attrs); 4351 if (ret) { 4352 pr_err("CRIU: failed to obtain range attributes\n"); 4353 goto exit_priv; 4354 } 4355 4356 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4357 svm_priv_data_size)) { 4358 pr_err("Failed to copy svm priv to user\n"); 4359 ret = -EFAULT; 4360 goto exit_priv; 4361 } 4362 4363 *priv_data_offset += svm_priv_data_size; 4364 4365 } 4366 4367 4368 exit_priv: 4369 kfree(svm_priv); 4370 exit_query: 4371 kfree(query_attr); 4372 exit: 4373 mmput(mm); 4374 return ret; 4375 } 4376 4377 int 4378 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4379 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4380 { 4381 struct mm_struct *mm = current->mm; 4382 int r; 4383 4384 start >>= PAGE_SHIFT; 4385 size >>= PAGE_SHIFT; 4386 4387 switch (op) { 4388 case KFD_IOCTL_SVM_OP_SET_ATTR: 4389 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4390 break; 4391 case KFD_IOCTL_SVM_OP_GET_ATTR: 4392 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4393 break; 4394 default: 4395 r = -EINVAL; 4396 break; 4397 } 4398 4399 return r; 4400 } 4401