| 8a7d4b19 | 17-Jul-2026 |
Troy Mitchell <troy.mitchell@linux.spacemit.com> |
clk: spacemit: k3: fix missing /2 factor in i2s sysclk dividers
The i2s{0,2,3,4,5}_sysclk_div DDNs have an additional fixed 1/2 divider in the hardware IP after the configurable divider, so the real
clk: spacemit: k3: fix missing /2 factor in i2s sysclk dividers
The i2s{0,2,3,4,5}_sysclk_div DDNs have an additional fixed 1/2 divider in the hardware IP after the configurable divider, so the real output rate is:
rate = parent_rate * den / (num * 2)
Set pre_div to 2 to account for it.
Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree") Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://patch.msgid.link/20260717-k3-clk-fix-i2s-v1-3-e95001a692ee@linux.spacemit.com Signed-off-by: Yixun Lan <dlan@kernel.org>
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| e6b17a69 | 17-Jul-2026 |
Troy Mitchell <troy.mitchell@linux.spacemit.com> |
clk: spacemit: k3: fix i2s clock topology
The K3 i2s clocks were modelled as a single path behind one MPMU register:
pll1_d96_25p6 / i2s_153p6_base `-- i2s_sysclk_src (mux+gate, MPMU_ISCC
clk: spacemit: k3: fix i2s clock topology
The K3 i2s clocks were modelled as a single path behind one MPMU register:
pll1_d96_25p6 / i2s_153p6_base `-- i2s_sysclk_src (mux+gate, MPMU_ISCCR) `-- i2s1_sysclk (DDN, MPMU_ISCCR) |-- i2s_bclk (div+gate, MPMU_ISCCR) `-- i2s2_sysclk (mux, parent 0)
The hardware actually has two i2s clock control registers, ISCCR0 (0x0040) and ISCCR1 (0x0044): ISCCR1 drives the common sysclk shared by i2s0/2/3/4/5 and the common bclk, whose divider always implies a fixed 1/2 factor in front, while ISCCR0 drives a dedicated path for i2s1:
pll1_d96_25p6 / i2s_153p6_base |-- i2s_sysclk_src (mux+gate, MPMU_ISCCR1) | `-- i2s_sysclk (DDN, MPMU_ISCCR1) | |-- i2s_bclk_factor (fixed factor, /2) | | `-- i2s_bclk (div+gate, MPMU_ISCCR1) | `-- i2s2_sysclk (mux, parent 0) `-- i2s1_sysclk_src (mux+gate, MPMU_ISCCR0) `-- i2s1_sysclk (DDN, MPMU_ISCCR0)
Because of this mismatch, i2s_bclk reported twice the real rate, and the dedicated i2s1 clock path could not be described in DT at all.
Model the tree as above: split the MPMU_ISCCR register macro into MPMU_ISCCR0 and MPMU_ISCCR1 to match the hardware register names, rename the common DDN to i2s_sysclk, insert the fixed 1/2 factor i2s_bclk_factor in front of i2s_bclk, and add the i2s1_sysclk_src mux and i2s1_sysclk DDN backed by MPMU_ISCCR0. CLK_MPMU_I2S1_SYSCLK now refers to the dedicated i2s1 clock; no in-tree user references this ID, so nothing is affected by the change of meaning.
Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree") Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://patch.msgid.link/20260717-k3-clk-fix-i2s-v1-2-e95001a692ee@linux.spacemit.com Signed-off-by: Yixun Lan <dlan@kernel.org>
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| 8abba78d | 30-Jun-2026 |
Yixun Lan <dlan@kernel.org> |
clk: spacemit: k3: Add UFS refclk clock
Add the UFS reference clock for SpacemiT K3 SoC.
Link: https://patch.msgid.link/20260630-06-clk-ufs-support-v1-3-cf7521d1d0fe@kernel.org Signed-off-by: Yixun
clk: spacemit: k3: Add UFS refclk clock
Add the UFS reference clock for SpacemiT K3 SoC.
Link: https://patch.msgid.link/20260630-06-clk-ufs-support-v1-3-cf7521d1d0fe@kernel.org Signed-off-by: Yixun Lan <dlan@kernel.org>
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| eb525edd | 30-Jun-2026 |
Yixun Lan <dlan@kernel.org> |
clk: spacemit: k3: set hdma clock as critical
HDMA clock is responsible for the internal TCM access path of X100 RISC-V core, so set the clock flag as critical to prevent it from being shut off, oth
clk: spacemit: k3: set hdma clock as critical
HDMA clock is responsible for the internal TCM access path of X100 RISC-V core, so set the clock flag as critical to prevent it from being shut off, otherwise the Linux system will hang, for example in the case of a vector instruction access generates a page fault.
Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree") Reported-by: Han Gao <gaohan@iscas.ac.cn> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Link: https://patch.msgid.link/20260630-06-clk-hdma-critial-v1-1-443c0ac88c5f@kernel.org Signed-off-by: Yixun Lan <dlan@kernel.org>
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| a37c75d7 | 11-May-2026 |
Yixun Lan <dlan@kernel.org> |
clk: spacemit: k3: Add PCIe DBI clock
Add PCIe DBI (Data Bus Interface) clock which was missing, This will support PCIe driver to explicitly request and enable all clocks that needed.
Link: https:/
clk: spacemit: k3: Add PCIe DBI clock
Add PCIe DBI (Data Bus Interface) clock which was missing, This will support PCIe driver to explicitly request and enable all clocks that needed.
Link: https://patch.msgid.link/20260511-06-pci-clk-fix-v2-4-c9a5e563bab3@kernel.org Signed-off-by: Yixun Lan <dlan@kernel.org>
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| e371a772 | 02-Nov-2025 |
Yixun Lan <dlan@gentoo.org> |
clk: spacemit: k3: add the clock tree
Add clock support to SpacemiT K3 SoC, the clock tree consist of several blocks which are APBC, APBS, APMU, DCIU, MPUM.
Link: https://lore.kernel.org/r/20260108
clk: spacemit: k3: add the clock tree
Add clock support to SpacemiT K3 SoC, the clock tree consist of several blocks which are APBC, APBS, APMU, DCIU, MPUM.
Link: https://lore.kernel.org/r/20260108-k3-clk-v5-5-42a11b74ad58@gentoo.org Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 3a086236 | 27-Oct-2025 |
Yixun Lan <dlan@gentoo.org> |
clk: spacemit: ccu_pll: add plla type clock
Introduce a new clock PLLA for SpacemiT's K3 SoC which has a different register layout comparing to previous PPL type. And, It is configured by swcr1, swc
clk: spacemit: ccu_pll: add plla type clock
Introduce a new clock PLLA for SpacemiT's K3 SoC which has a different register layout comparing to previous PPL type. And, It is configured by swcr1, swcr3 and swcr2 BIT[15:8].
Link: https://lore.kernel.org/r/20260108-k3-clk-v5-3-42a11b74ad58@gentoo.org Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| ace73b7e | 31-Oct-2025 |
Yixun Lan <dlan@gentoo.org> |
clk: spacemit: ccu_mix: add inverted enable gate clock
K3 SoC has the clock IP which support to write value 0 for enabling the clock, while write 1 for disabling it, thus the enable BIT is inverted.
clk: spacemit: ccu_mix: add inverted enable gate clock
K3 SoC has the clock IP which support to write value 0 for enabling the clock, while write 1 for disabling it, thus the enable BIT is inverted. So, introduce a flag to support the inverted gate clock.
Link: https://lore.kernel.org/r/20260108-k3-clk-v5-2-42a11b74ad58@gentoo.org Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 0664a46f | 03-Jan-2026 |
Yixun Lan <dlan@gentoo.org> |
clk: spacemit: add platform SoC prefix to reset name
This change is needed for adding future new SpacemiT K3 reset driver.
Since both K1 and K3 reset code register via the same module which its nam
clk: spacemit: add platform SoC prefix to reset name
This change is needed for adding future new SpacemiT K3 reset driver.
Since both K1 and K3 reset code register via the same module which its name changed to spacemit_ccu, it's necessary to encode the platform/SoC in the reset auxiliary device name to distinguish them, otherwise two reset drivers will claim to support same "compatible" auxiliary device even in the case of only one CCU clock driver got registered, which in the end lead to a broken reset driver.
This change will introduce a runtime break to reset driver, and will be fixed in follow-up commit: ecff77f7c041 ("reset: spacemit: fix auxiliary device id")
Link: https://lore.kernel.org/r/20260108-06-k1-clk-common-v4-3-badf635993d3@gentoo.org Reviewed-by: Alex Elder <elder@riscstar.com> Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 99669468 | 19-Dec-2025 |
Yixun Lan <dlan@gentoo.org> |
clk: spacemit: extract common ccu functions
Refactor the probe function of SpacemiT's clock, and extract a common ccu file, so new clock driver added in the future can share the same code, which wou
clk: spacemit: extract common ccu functions
Refactor the probe function of SpacemiT's clock, and extract a common ccu file, so new clock driver added in the future can share the same code, which would lower the burden of maintenance. Since this commit changes the module name from spacemit_ccu_k1 to spacemit_ccu where the auxiliary device registered, the auxiliary device id need to be adjusted. Idea of the patch comes from the review of K3 clock driver, please refer to this disucssion[1] for more detail.
This change will introduce a runtime break to reset driver, and will be fixed in follow-up commit: ecff77f7c041 ("reset: spacemit: fix auxiliary device id")
Link: https://lore.kernel.org/all/aTo8sCPpVM1o9PKX@pie/ [1] Link: https://lore.kernel.org/r/20260108-06-k1-clk-common-v4-2-badf635993d3@gentoo.org Suggested-by: Yao Zi <me@ziyao.cc> Reviewed-by: Alex Elder <elder@riscstar.com> Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 99735a74 | 19-Dec-2025 |
Inochi Amaoto <inochiama@gmail.com> |
clk: spacemit: Hide common clock driver from user controller
Since the common clock driver is only a dependency for other spacemit clock driver, it should not be enabled individually, so hide this i
clk: spacemit: Hide common clock driver from user controller
Since the common clock driver is only a dependency for other spacemit clock driver, it should not be enabled individually, so hide this in the Kconfig UI and let other spacemit clock driver select it.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251219012819.440972-3-inochiama@gmail.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 23b2d2fb | 17-Nov-2025 |
Charles Mirabile <cmirabil@redhat.com> |
clk: spacemit: Set clk_hw_onecell_data::num before using flex array
When booting with KASAN enabled the following splat is encountered during probe of the k1 clock driver:
UBSAN: array-index-out-of
clk: spacemit: Set clk_hw_onecell_data::num before using flex array
When booting with KASAN enabled the following splat is encountered during probe of the k1 clock driver:
UBSAN: array-index-out-of-bounds in drivers/clk/spacemit/ccu-k1.c:1044:16 index 0 is out of range for type 'clk_hw *[*]' CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.18.0-rc5+ #1 PREEMPT(lazy) Hardware name: Unknown Unknown Product/Unknown Product, BIOS 2022.10spacemit 10/01/2022 Call Trace: [<ffffffff8002b628>] dump_backtrace+0x28/0x38 [<ffffffff800027d2>] show_stack+0x3a/0x50 [<ffffffff800220c2>] dump_stack_lvl+0x5a/0x80 [<ffffffff80022100>] dump_stack+0x18/0x20 [<ffffffff800164b8>] ubsan_epilogue+0x10/0x48 [<ffffffff8099034e>] __ubsan_handle_out_of_bounds+0xa6/0xa8 [<ffffffff80acbfa6>] k1_ccu_probe+0x37e/0x420 [<ffffffff80b79e6e>] platform_probe+0x56/0x98 [<ffffffff80b76a7e>] really_probe+0x9e/0x350 [<ffffffff80b76db0>] __driver_probe_device+0x80/0x138 [<ffffffff80b76f52>] driver_probe_device+0x3a/0xd0 [<ffffffff80b771c4>] __driver_attach+0xac/0x1b8 [<ffffffff80b742fc>] bus_for_each_dev+0x6c/0xc8 [<ffffffff80b76296>] driver_attach+0x26/0x38 [<ffffffff80b759ae>] bus_add_driver+0x13e/0x268 [<ffffffff80b7836a>] driver_register+0x52/0x100 [<ffffffff80b79a78>] __platform_driver_register+0x28/0x38 [<ffffffff814585da>] k1_ccu_driver_init+0x22/0x38 [<ffffffff80023a8a>] do_one_initcall+0x62/0x2a0 [<ffffffff81401c60>] do_initcalls+0x170/0x1a8 [<ffffffff81401e7a>] kernel_init_freeable+0x16a/0x1e0 [<ffffffff811f7534>] kernel_init+0x2c/0x180 [<ffffffff80025f56>] ret_from_fork_kernel+0x16/0x1d8 [<ffffffff81205336>] ret_from_fork_kernel_asm+0x16/0x18 ---[ end trace ]---
This is bogus and is simply a result of KASAN consulting the `.num` member of the struct for bounds information (as it should due to `__counted_by`) and finding 0 set by kzalloc() because it has not been initialized before the loop that fills in the array. The easy fix is to just move the line that sets `num` to before the loop that fills the array so that KASAN has the information it needs to accurately conclude that the access is valid.
Fixes: 1b72c59db0add ("clk: spacemit: Add clock support for SpacemiT K1 SoC") Tested-by: Yanko Kaneti <yaneti@declera.com> Signed-off-by: Charles Mirabile <cmirabil@redhat.com> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| 519cff1d | 11-Sep-2025 |
Troy Mitchell <troy.mitchell@linux.spacemit.com> |
clk: spacemit: fix i2s clock
Defining i2s_bclk and i2s_sysclk as fixed-rate clocks is insufficient for real I2S use cases.
Moreover, the current I2S clock configuration does not work as expected du
clk: spacemit: fix i2s clock
Defining i2s_bclk and i2s_sysclk as fixed-rate clocks is insufficient for real I2S use cases.
Moreover, the current I2S clock configuration does not work as expected due to missing parent clocks.
This patch adds the missing parent clocks, defines i2s_sysclk as a DDN clock, and i2s_bclk as a DIV clock.
A special note for i2s_bclk:
From the register definition, the i2s_bclk divider always implies an additional 1/2 factor.
The following table shows the correspondence between index and frequency division coefficients:
| index | div | |-------|-------| | 0 | 2 | | 1 | 4 | | 2 | 6 | | 3 | 8 |
From a software perspective, introducing i2s_bclk_factor as the parent of i2s_bclk is sufficient to address the issue.
The I2S-related clock registers can be found here [1].
Link: https://developer.spacemit.com/documentation?token=LCrKwWDasiJuROkVNusc2pWTnEb [1]
Fixes: 1b72c59db0add ("clk: spacemit: Add clock support for SpacemiT K1 SoC") Co-developer: Jinmei Wei <weijinmei@linux.spacemit.com> Suggested-by: Haylen Chu <heylenay@4d2.org> Signed-off-by: Jinmei Wei <weijinmei@linux.spacemit.com> Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| 74246a82 | 11-Sep-2025 |
Troy Mitchell <troy.mitchell@linux.spacemit.com> |
clk: spacemit: introduce pre-div for ddn clock
The original DDN operations applied an implicit divide-by-2, which should not be a default behavior.
This patch removes that assumption, letting each
clk: spacemit: introduce pre-div for ddn clock
The original DDN operations applied an implicit divide-by-2, which should not be a default behavior.
This patch removes that assumption, letting each clock define its actual behavior explicitly.
Reviewed-by: Haylen Chu <heylenay@4d2.org> Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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