| 13793c7f | 12-Jun-2026 |
David E. Box <david.e.box@linux.intel.com> |
platform/x86/intel/pmt: Unify header fetch and add ACPI source
Allow the PMT class to read discovery headers from either PCI MMIO or
ACPI-provided entries, depending on the discovery source. The new
platform/x86/intel/pmt: Unify header fetch and add ACPI source
Allow the PMT class to read discovery headers from either PCI MMIO or
ACPI-provided entries, depending on the discovery source. The new
source-aware fetch helper caches the canonical discovery header for both
paths, capping PCI MMIO reads to the mapped resource size, while keeping
the mapped PCI discovery table available for users such as crashlog.
Split intel_pmt_populate_entry() into source-specific resolvers:
- pmt_resolve_access_pci(): handles both ACCESS_LOCAL and ACCESS_BARID
for PCI-backed devices and sets entry->pcidev. Same existing
functionality.
- pmt_resolve_access_acpi(): handles only ACCESS_BARID for ACPI-backed
devices, rejecting ACCESS_LOCAL which has no valid semantics without
a physical discovery resource.
This maintains existing PCI behavior and makes no functional changes
for PCI devices.
Assisted-by: GitHub-Copilot:claude-opus-4.7
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Link: https://patch.msgid.link/4b33b04ffaf0943b67d330f48b5d1dfcb6d1be5d.1781294741.git.david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 4dfc7dca | 12-Jun-2026 |
David E. Box <david.e.box@linux.intel.com> |
platform/x86/intel/pmt: Cache the telemetry discovery header
pmt_telem_header_decode() only needs the discovery header dwords, but it
currently decodes them by reading directly from entry->disc_tabl
platform/x86/intel/pmt: Cache the telemetry discovery header
pmt_telem_header_decode() only needs the discovery header dwords, but it
currently decodes them by reading directly from entry->disc_table.
Cache the discovery header in intel_pmt_entry when the device is created
and have telemetry decode use the cached values instead of performing MMIO
reads at decode time.
The DVSEC discovery resource for a namespace is sized by its per-entry
entry_size (in dwords), which can be less than the 4-dword cache (e.g.
telemetry uses entry_size = 3, i.e. 12 bytes). Cap the memcpy_fromio()
to resource_size(disc_res) so the new cache does not read past the
mapped region. Any unread dwords stay zero from the zero-initialized
allocation of the containing struct.
This keeps the telemetry header decode path independent of how the
discovery data is backed and avoids baking a direct MMIO assumption into
the feature-specific decode logic.
Assisted-by: GitHub-Copilot:claude-opus-4.7
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Link: https://patch.msgid.link/f805e2ada52dc0661761cda7f692e76e6ea2d257.1781294741.git.david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 4a87492c | 12-Jun-2026 |
David E. Box <david.e.box@linux.intel.com> |
platform/x86/intel/pmt: Pass discovery index instead of resource
Change PMT class code to pass a discovery index rather than a direct struct
resource when creating entries. This allows the class to
platform/x86/intel/pmt: Pass discovery index instead of resource
Change PMT class code to pass a discovery index rather than a direct struct
resource when creating entries. This allows the class to identify the
discovery source generically without assuming PCI BAR resources. For PCI
devices, the index still resolves to a resource in the intel_vsec_device.
Other discovery sources, such as ACPI, can use the same index without
needing a struct resource.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Link: https://patch.msgid.link/8e785902c6a3ac1b5a9c3f0f65096553dc5acd4f.1781294741.git.david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 521460e6 | 12-Jun-2026 |
David E. Box <david.e.box@linux.intel.com> |
platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook
Update the telemetry namespace to use the new PMT class pre/post decode
interface. The overlap check, which previously occurr
platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook
Update the telemetry namespace to use the new PMT class pre/post decode
interface. The overlap check, which previously occurred during header
decode, is now performed in the post-decode hook once header fields are
populated. This preserves existing behavior while reusing the same header
decode logic across PMT drivers.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://patch.msgid.link/2f5e429a38e22eb45fcfaaca4e037fa395d4f199.1781294741.git.david.e.box@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| b3de79d9 | 12-Jun-2026 |
David E. Box <david.e.box@linux.intel.com> |
platform/x86/intel/pmt/crashlog: Split init into pre-decode
Refactor crashlog initialization to use the PMT namespace pre-decode hook:
- Add pmt_crashlog_pre_decode() to parse type/version, selec
platform/x86/intel/pmt/crashlog: Split init into pre-decode
Refactor crashlog initialization to use the PMT namespace pre-decode hook:
- Add pmt_crashlog_pre_decode() to parse type/version, select the
crashlog_info, initialize the control mutex, and set entry->attr_grp.
- Simplify pmt_crashlog_header_decode() to only read header fields from
the discovery table.
- Wire the namespace with .pmt_pre_decode = pmt_crashlog_pre_decode.
This separates structural initialization from header parsing, aligning
crashlog with the PMT class pre/post decode flow.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://patch.msgid.link/ed8cda8456c97132cf2d2b4ff6a5cffb1ce3a666.1781294741.git.david.e.box@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 66e245db | 24-Dec-2025 |
Alok Tiwari <alok.a.tiwari@oracle.com> |
platform/x86/intel/pmt/discovery: use valid device pointer in dev_err_probe
The PMT feature probe creates a child device with device_create().
If device creation fail, the code pass priv->dev (which
platform/x86/intel/pmt/discovery: use valid device pointer in dev_err_probe
The PMT feature probe creates a child device with device_create().
If device creation fail, the code pass priv->dev (which is an ERR_PTR)
to dev_err_probe(), which is not a valid device pointer.
This patch change the dev_err_probe() call to use the parent auxiliary
device (&auxdev->dev) and update the error message to reference the
parent device name. It ensure correct error reporting and avoid
passing an invalid device pointer.
Fixes: d9a078809356 ("platform/x86/intel/pmt: Add PMT Discovery driver")
Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
Link: https://patch.msgid.link/20251224095133.115678-1-alok.a.tiwari@oracle.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 2c402a80 | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: support BMG crashlog
The Battlemage GPU has the type 1 version 2 crashlog feature.
Update the crashlog driver to support this crashlog version.
Signed-off-by: Michael J. Ru
platform/x86/intel/pmt: support BMG crashlog
The Battlemage GPU has the type 1 version 2 crashlog feature.
Update the crashlog driver to support this crashlog version.
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-14-michael.j.ruhl@intel.com
[ij: make crashlog_type1_ver2 static]
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 5623fa68 | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: use a version struct
In preparation for supporting multiple crashlog versions, use a struct
to keep bit offset info for the status and control bits.
Reviewed-by: Ilpo Järvin
platform/x86/intel/pmt: use a version struct
In preparation for supporting multiple crashlog versions, use a struct
to keep bit offset info for the status and control bits.
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-13-michael.j.ruhl@intel.com
[ij: move crashlog_type1_ver0 to its final place & add consts to crashlog_info]
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 66df9fa7 | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: refactor base parameter
To support an upcoming crashlog change, use the parent of
struct intel_pmt_entry, struct crashlog_entry, as a main parameter.
Using struct crashlog_e
platform/x86/intel/pmt: refactor base parameter
To support an upcoming crashlog change, use the parent of
struct intel_pmt_entry, struct crashlog_entry, as a main parameter.
Using struct crashlog_entry will allow for a more flexible interface
to control the crashlog feature.
- Refactor to use struct crashlog_entry in place of
struct intel_pmt_entry
- Rename variables from "entry" to "crashlog"
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-12-michael.j.ruhl@intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| f57b32cb | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: add register access helpers
The control register is used in a read/modify/write pattern.
The status register is used in a read/check bit pattern.
Add helpers to eliminate co
platform/x86/intel/pmt: add register access helpers
The control register is used in a read/modify/write pattern.
The status register is used in a read/check bit pattern.
Add helpers to eliminate common code.
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-11-michael.j.ruhl@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 8ab4f88d | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: decouple sysfs and namespace
The PMT namespace includes the crashlog sysfs attribute information.
Other crashlog version/types may need different sysfs attributes.
Coupling t
platform/x86/intel/pmt: decouple sysfs and namespace
The PMT namespace includes the crashlog sysfs attribute information.
Other crashlog version/types may need different sysfs attributes.
Coupling the attributes with the namespace blocks this usage.
Decouple sysfs attributes from the name space and add them to the
specific entry.
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-10-michael.j.ruhl@intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 5c7bfa10 | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: correct types
A couple of local variables do not match the return types of some of
the functions.
Update the mismatched types to match.
Reviewed-by: Ilpo Järvinen <ilpo.jar
platform/x86/intel/pmt: correct types
A couple of local variables do not match the return types of some of
the functions.
Update the mismatched types to match.
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-9-michael.j.ruhl@intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 147c18d8 | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: re-order trigger logic
Setting the clear bit or checking the complete bit before checking to
see if crashlog is disabled seems incorrect.
Check disable before accessing any
platform/x86/intel/pmt: re-order trigger logic
Setting the clear bit or checking the complete bit before checking to
see if crashlog is disabled seems incorrect.
Check disable before accessing any other bits.
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-8-michael.j.ruhl@intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 4f8fa22d | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: use guard(mutex)
Update the mutex paths to use the new guard() mechanism.
With the removal of goto, do some minor cleanup of the current logic
path.
Reviewed-by: David E. B
platform/x86/intel/pmt: use guard(mutex)
Update the mutex paths to use the new guard() mechanism.
With the removal of goto, do some minor cleanup of the current logic
path.
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-7-michael.j.ruhl@intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 75a496aa | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: mutex clean up
The header file for mutex usage and mutex_destroy() cleanup code is
absent from the crashlog.c module.
Add the header file and mutex_destroy().
Reviewed-by:
platform/x86/intel/pmt: mutex clean up
The header file for mutex usage and mutex_destroy() cleanup code is
absent from the crashlog.c module.
Add the header file and mutex_destroy().
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-6-michael.j.ruhl@intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| ba22fe0c | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: white space cleanup
Noticed two white space issues; cleaned them.
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.int
platform/x86/intel/pmt: white space cleanup
Noticed two white space issues; cleaned them.
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-5-michael.j.ruhl@intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|
| 54d5cd47 | 13-Jul-2025 |
Michael J. Ruhl <michael.j.ruhl@intel.com> |
platform/x86/intel/pmt: fix a crashlog NULL pointer access
Usage of the intel_pmt_read() for binary sysfs, requires a pcidev. The
current use of the endpoint value is only valid for telemetry endpoi
platform/x86/intel/pmt: fix a crashlog NULL pointer access
Usage of the intel_pmt_read() for binary sysfs, requires a pcidev. The
current use of the endpoint value is only valid for telemetry endpoint
usage.
Without the ep, the crashlog usage causes the following NULL pointer
exception:
BUG: kernel NULL pointer dereference, address: 0000000000000000
Oops: Oops: 0000 [#1] SMP NOPTI
RIP: 0010:intel_pmt_read+0x3b/0x70 [pmt_class]
Code:
Call Trace:
<TASK>
? sysfs_kf_bin_read+0xc0/0xe0
kernfs_fop_read_iter+0xac/0x1a0
vfs_read+0x26d/0x350
ksys_read+0x6b/0xe0
__x64_sys_read+0x1d/0x30
x64_sys_call+0x1bc8/0x1d70
do_syscall_64+0x6d/0x110
Augment struct intel_pmt_entry with a pointer to the pcidev to avoid
the NULL pointer exception.
Fixes: 045a513040cc ("platform/x86/intel/pmt: Use PMT callbacks")
Cc: stable@vger.kernel.org
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20250713172943.7335-2-michael.j.ruhl@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
show more ...
|