| e371a772 | 02-Nov-2025 |
Yixun Lan <dlan@gentoo.org> |
clk: spacemit: k3: add the clock tree
Add clock support to SpacemiT K3 SoC, the clock tree consist of several blocks which are APBC, APBS, APMU, DCIU, MPUM.
Link: https://lore.kernel.org/r/20260108
clk: spacemit: k3: add the clock tree
Add clock support to SpacemiT K3 SoC, the clock tree consist of several blocks which are APBC, APBS, APMU, DCIU, MPUM.
Link: https://lore.kernel.org/r/20260108-k3-clk-v5-5-42a11b74ad58@gentoo.org Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 3a086236 | 27-Oct-2025 |
Yixun Lan <dlan@gentoo.org> |
clk: spacemit: ccu_pll: add plla type clock
Introduce a new clock PLLA for SpacemiT's K3 SoC which has a different register layout comparing to previous PPL type. And, It is configured by swcr1, swc
clk: spacemit: ccu_pll: add plla type clock
Introduce a new clock PLLA for SpacemiT's K3 SoC which has a different register layout comparing to previous PPL type. And, It is configured by swcr1, swcr3 and swcr2 BIT[15:8].
Link: https://lore.kernel.org/r/20260108-k3-clk-v5-3-42a11b74ad58@gentoo.org Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| ace73b7e | 31-Oct-2025 |
Yixun Lan <dlan@gentoo.org> |
clk: spacemit: ccu_mix: add inverted enable gate clock
K3 SoC has the clock IP which support to write value 0 for enabling the clock, while write 1 for disabling it, thus the enable BIT is inverted.
clk: spacemit: ccu_mix: add inverted enable gate clock
K3 SoC has the clock IP which support to write value 0 for enabling the clock, while write 1 for disabling it, thus the enable BIT is inverted. So, introduce a flag to support the inverted gate clock.
Link: https://lore.kernel.org/r/20260108-k3-clk-v5-2-42a11b74ad58@gentoo.org Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 0664a46f | 03-Jan-2026 |
Yixun Lan <dlan@gentoo.org> |
clk: spacemit: add platform SoC prefix to reset name
This change is needed for adding future new SpacemiT K3 reset driver.
Since both K1 and K3 reset code register via the same module which its nam
clk: spacemit: add platform SoC prefix to reset name
This change is needed for adding future new SpacemiT K3 reset driver.
Since both K1 and K3 reset code register via the same module which its name changed to spacemit_ccu, it's necessary to encode the platform/SoC in the reset auxiliary device name to distinguish them, otherwise two reset drivers will claim to support same "compatible" auxiliary device even in the case of only one CCU clock driver got registered, which in the end lead to a broken reset driver.
This change will introduce a runtime break to reset driver, and will be fixed in follow-up commit: ecff77f7c041 ("reset: spacemit: fix auxiliary device id")
Link: https://lore.kernel.org/r/20260108-06-k1-clk-common-v4-3-badf635993d3@gentoo.org Reviewed-by: Alex Elder <elder@riscstar.com> Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 99669468 | 19-Dec-2025 |
Yixun Lan <dlan@gentoo.org> |
clk: spacemit: extract common ccu functions
Refactor the probe function of SpacemiT's clock, and extract a common ccu file, so new clock driver added in the future can share the same code, which wou
clk: spacemit: extract common ccu functions
Refactor the probe function of SpacemiT's clock, and extract a common ccu file, so new clock driver added in the future can share the same code, which would lower the burden of maintenance. Since this commit changes the module name from spacemit_ccu_k1 to spacemit_ccu where the auxiliary device registered, the auxiliary device id need to be adjusted. Idea of the patch comes from the review of K3 clock driver, please refer to this disucssion[1] for more detail.
This change will introduce a runtime break to reset driver, and will be fixed in follow-up commit: ecff77f7c041 ("reset: spacemit: fix auxiliary device id")
Link: https://lore.kernel.org/all/aTo8sCPpVM1o9PKX@pie/ [1] Link: https://lore.kernel.org/r/20260108-06-k1-clk-common-v4-2-badf635993d3@gentoo.org Suggested-by: Yao Zi <me@ziyao.cc> Reviewed-by: Alex Elder <elder@riscstar.com> Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 99735a74 | 19-Dec-2025 |
Inochi Amaoto <inochiama@gmail.com> |
clk: spacemit: Hide common clock driver from user controller
Since the common clock driver is only a dependency for other spacemit clock driver, it should not be enabled individually, so hide this i
clk: spacemit: Hide common clock driver from user controller
Since the common clock driver is only a dependency for other spacemit clock driver, it should not be enabled individually, so hide this in the Kconfig UI and let other spacemit clock driver select it.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251219012819.440972-3-inochiama@gmail.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 23b2d2fb | 17-Nov-2025 |
Charles Mirabile <cmirabil@redhat.com> |
clk: spacemit: Set clk_hw_onecell_data::num before using flex array
When booting with KASAN enabled the following splat is encountered during probe of the k1 clock driver:
UBSAN: array-index-out-of
clk: spacemit: Set clk_hw_onecell_data::num before using flex array
When booting with KASAN enabled the following splat is encountered during probe of the k1 clock driver:
UBSAN: array-index-out-of-bounds in drivers/clk/spacemit/ccu-k1.c:1044:16 index 0 is out of range for type 'clk_hw *[*]' CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.18.0-rc5+ #1 PREEMPT(lazy) Hardware name: Unknown Unknown Product/Unknown Product, BIOS 2022.10spacemit 10/01/2022 Call Trace: [<ffffffff8002b628>] dump_backtrace+0x28/0x38 [<ffffffff800027d2>] show_stack+0x3a/0x50 [<ffffffff800220c2>] dump_stack_lvl+0x5a/0x80 [<ffffffff80022100>] dump_stack+0x18/0x20 [<ffffffff800164b8>] ubsan_epilogue+0x10/0x48 [<ffffffff8099034e>] __ubsan_handle_out_of_bounds+0xa6/0xa8 [<ffffffff80acbfa6>] k1_ccu_probe+0x37e/0x420 [<ffffffff80b79e6e>] platform_probe+0x56/0x98 [<ffffffff80b76a7e>] really_probe+0x9e/0x350 [<ffffffff80b76db0>] __driver_probe_device+0x80/0x138 [<ffffffff80b76f52>] driver_probe_device+0x3a/0xd0 [<ffffffff80b771c4>] __driver_attach+0xac/0x1b8 [<ffffffff80b742fc>] bus_for_each_dev+0x6c/0xc8 [<ffffffff80b76296>] driver_attach+0x26/0x38 [<ffffffff80b759ae>] bus_add_driver+0x13e/0x268 [<ffffffff80b7836a>] driver_register+0x52/0x100 [<ffffffff80b79a78>] __platform_driver_register+0x28/0x38 [<ffffffff814585da>] k1_ccu_driver_init+0x22/0x38 [<ffffffff80023a8a>] do_one_initcall+0x62/0x2a0 [<ffffffff81401c60>] do_initcalls+0x170/0x1a8 [<ffffffff81401e7a>] kernel_init_freeable+0x16a/0x1e0 [<ffffffff811f7534>] kernel_init+0x2c/0x180 [<ffffffff80025f56>] ret_from_fork_kernel+0x16/0x1d8 [<ffffffff81205336>] ret_from_fork_kernel_asm+0x16/0x18 ---[ end trace ]---
This is bogus and is simply a result of KASAN consulting the `.num` member of the struct for bounds information (as it should due to `__counted_by`) and finding 0 set by kzalloc() because it has not been initialized before the loop that fills in the array. The easy fix is to just move the line that sets `num` to before the loop that fills the array so that KASAN has the information it needs to accurately conclude that the access is valid.
Fixes: 1b72c59db0add ("clk: spacemit: Add clock support for SpacemiT K1 SoC") Tested-by: Yanko Kaneti <yaneti@declera.com> Signed-off-by: Charles Mirabile <cmirabil@redhat.com> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| 519cff1d | 11-Sep-2025 |
Troy Mitchell <troy.mitchell@linux.spacemit.com> |
clk: spacemit: fix i2s clock
Defining i2s_bclk and i2s_sysclk as fixed-rate clocks is insufficient for real I2S use cases.
Moreover, the current I2S clock configuration does not work as expected du
clk: spacemit: fix i2s clock
Defining i2s_bclk and i2s_sysclk as fixed-rate clocks is insufficient for real I2S use cases.
Moreover, the current I2S clock configuration does not work as expected due to missing parent clocks.
This patch adds the missing parent clocks, defines i2s_sysclk as a DDN clock, and i2s_bclk as a DIV clock.
A special note for i2s_bclk:
From the register definition, the i2s_bclk divider always implies an additional 1/2 factor.
The following table shows the correspondence between index and frequency division coefficients:
| index | div | |-------|-------| | 0 | 2 | | 1 | 4 | | 2 | 6 | | 3 | 8 |
From a software perspective, introducing i2s_bclk_factor as the parent of i2s_bclk is sufficient to address the issue.
The I2S-related clock registers can be found here [1].
Link: https://developer.spacemit.com/documentation?token=LCrKwWDasiJuROkVNusc2pWTnEb [1]
Fixes: 1b72c59db0add ("clk: spacemit: Add clock support for SpacemiT K1 SoC") Co-developer: Jinmei Wei <weijinmei@linux.spacemit.com> Suggested-by: Haylen Chu <heylenay@4d2.org> Signed-off-by: Jinmei Wei <weijinmei@linux.spacemit.com> Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| 74246a82 | 11-Sep-2025 |
Troy Mitchell <troy.mitchell@linux.spacemit.com> |
clk: spacemit: introduce pre-div for ddn clock
The original DDN operations applied an implicit divide-by-2, which should not be a default behavior.
This patch removes that assumption, letting each
clk: spacemit: introduce pre-div for ddn clock
The original DDN operations applied an implicit divide-by-2, which should not be a default behavior.
This patch removes that assumption, letting each clock define its actual behavior explicitly.
Reviewed-by: Haylen Chu <heylenay@4d2.org> Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| d02c71cb | 11-Aug-2025 |
Brian Masney <bmasney@redhat.com> |
clk: spacemit: ccu_pll: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semant
clk: spacemit: ccu_pll: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://lore.kernel.org/r/20250811-clk-for-stephen-round-rate-v1-51-b3bf97b038dc@redhat.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 56737edd | 11-Aug-2025 |
Brian Masney <bmasney@redhat.com> |
clk: spacemit: ccu_mix: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semant
clk: spacemit: ccu_mix: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://lore.kernel.org/r/20250811-clk-for-stephen-round-rate-v1-50-b3bf97b038dc@redhat.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| b4a7b0d2 | 11-Aug-2025 |
Brian Masney <bmasney@redhat.com> |
clk: spacemit: ccu_ddn: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semant
clk: spacemit: ccu_ddn: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://lore.kernel.org/r/20250811-clk-for-stephen-round-rate-v1-49-b3bf97b038dc@redhat.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| c60b9538 | 23-Jul-2025 |
Akhilesh Patil <akhilesh@ee.iitb.ac.in> |
clk: spacemit: ccu_pll: fix error return value in recalc_rate callback
Return 0 instead of -EINVAL if function ccu_pll_recalc_rate() fails to get correct rate entry. Follow .recalc_rate callback doc
clk: spacemit: ccu_pll: fix error return value in recalc_rate callback
Return 0 instead of -EINVAL if function ccu_pll_recalc_rate() fails to get correct rate entry. Follow .recalc_rate callback documentation as mentioned in include/linux/clk-provider.h for error return value.
Signed-off-by: Akhilesh Patil <akhilesh@ee.iitb.ac.in> Fixes: 1b72c59db0add ("clk: spacemit: Add clock support for SpacemiT K1 SoC") Reviewed-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Alex Elder <elder@riscstar.com> Link: https://lore.kernel.org/r/aIBzVClNQOBrjIFG@bhairav-test.ee.iitb.ac.in Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| c79550f6 | 07-Jul-2025 |
Yixun Lan <dlan@gentoo.org> |
Merge tag 'spacemit-reset-for-6.17-1' of https://github.com/spacemit-com/linux
RISC-V SpacemiT Reset for 6.17
- Add reset driver support for K1 SoC
* tag 'spacemit-reset-for-6.17-1': reset: spac
Merge tag 'spacemit-reset-for-6.17-1' of https://github.com/spacemit-com/linux
RISC-V SpacemiT Reset for 6.17
- Add reset driver support for K1 SoC
* tag 'spacemit-reset-for-6.17-1': reset: spacemit: add support for SpacemiT CCU resets clk: spacemit: define three reset-only CCUs clk: spacemit: set up reset auxiliary devices soc: spacemit: create a header for clock/reset registers dt-bindings: soc: spacemit: define spacemit,k1-ccu resets
Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 024b84f6 | 02-Jul-2025 |
Alex Elder <elder@riscstar.com> |
clk: spacemit: define three reset-only CCUs
Three CCUs on the SpacemiT K1 SoC implement only resets, not clocks. Define the CCU data for these resets so their auxiliary devices get created.
Signed-
clk: spacemit: define three reset-only CCUs
Three CCUs on the SpacemiT K1 SoC implement only resets, not clocks. Define the CCU data for these resets so their auxiliary devices get created.
Signed-off-by: Alex Elder <elder@riscstar.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250702113709.291748-5-elder@riscstar.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 98854352 | 02-Jul-2025 |
Alex Elder <elder@riscstar.com> |
clk: spacemit: set up reset auxiliary devices
Add a new reset_name field to the spacemit_ccu_data structure. If it is non-null, the CCU implements a reset controller, and the name will be used in t
clk: spacemit: set up reset auxiliary devices
Add a new reset_name field to the spacemit_ccu_data structure. If it is non-null, the CCU implements a reset controller, and the name will be used in the name for the auxiliary device that implements it.
Define a new type to hold an auxiliary device as well as the regmap pointer that will be needed by CCU reset controllers. Set up code to initialize and add an auxiliary device for any CCU that implements reset functionality.
Make it optional for a CCU to implement a clock controller. This doesn't apply to any of the existing CCUs but will for some new ones that will be added soon.
Signed-off-by: Alex Elder <elder@riscstar.com> Reviewed-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250702113709.291748-4-elder@riscstar.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
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| 49625c6e | 16-Apr-2025 |
Haylen Chu <heylenay@4d2.org> |
clk: spacemit: k1: Add TWSI8 bus and function clocks
The control register for TWSI8 clocks, APBC_TWSI8_CLK_RST, contains mux selection bits, reset assertion bit and enable bits for function and bus
clk: spacemit: k1: Add TWSI8 bus and function clocks
The control register for TWSI8 clocks, APBC_TWSI8_CLK_RST, contains mux selection bits, reset assertion bit and enable bits for function and bus clocks. It has a quirk that reading always results in zero.
As a workaround, let's hardcode the mux value as zero to select pll1_d78_31p5 as parent and treat twsi8_clk as a gate, whose enable mask is combined from the real bus and function clocks to avoid the write-only register being shared between two clk_hws, in which case updates of one clk_hw zero the other's bits.
With a 1:1 factor serving as placeholder for the bus clock, the I2C-8 controller could be brought up, which is essential for boards attaching power-management chips to it.
Signed-off-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250416135406.16284-5-heylenay@4d2.org Signed-off-by: Yixun Lan <dlan@gentoo.org>
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