| c1224569 | 26-May-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: make frequency monitor a per-device attribute
The frequency monitoring feature uses shared hardware registers that measure input reference frequencies independently of individual DPLL
dpll: zl3073x: make frequency monitor a per-device attribute
The frequency monitoring feature uses shared hardware registers that measure input reference frequencies independently of individual DPLL channels. However, the freq_monitor flag was incorrectly placed in the per-DPLL structure, causing each channel to track its own enable/disable state independently.
Since the DPLL core calls measured_freq_get() only for the first pin registration, the measured_freq_check() in the periodic worker was gated by the per-DPLL freq_monitor flag of whichever channel happens to be checked. If the first DPLL channel had frequency monitoring disabled while another had it enabled, measurements were never reported.
Move freq_monitor from struct zl3073x_dpll to struct zl3073x_dev so all DPLL channels share a single flag, matching the hardware behavior. Update freq_monitor_set() to notify other DPLL devices about the change (like phase_offset_avg_factor_set() already does) and remove the mode-dependent guard in zl3073x_dpll_changes_check() since all input pin monitoring (pin state, phase offset, FFO, and measured frequency) works correctly in all DPLL modes.
Fixes: bfc923b642874 ("dpll: zl3073x: implement frequency monitoring") Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260526074525.1451008-4-ivecera@redhat.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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| 14f269ae | 08-Apr-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: add ref-sync pair support
Add support for ref-sync pair registration using the 'ref-sync-sources' phandle property from device tree. A ref-sync pair consists of a clock reference and
dpll: zl3073x: add ref-sync pair support
Add support for ref-sync pair registration using the 'ref-sync-sources' phandle property from device tree. A ref-sync pair consists of a clock reference and a low-frequency sync signal where the DPLL locks to the clock reference but phase-aligns to the sync reference.
The implementation: - Stores fwnode handle in zl3073x_dpll_pin during pin registration - Adds ref_sync_get/set callbacks to read and write the sync control mode and pair registers - Validates ref-sync frequency constraints: sync signal must be 8 kHz or less, clock reference must be 1 kHz or more and higher than sync - Excludes sync source from automatic reference selection by setting its priority to NONE on connect; on disconnect the priority is left as NONE and the user must explicitly make the pin selectable again - Iterates ref-sync-sources phandles to register declared pairings via dpll_pin_ref_sync_pair_add()
Reviewed-by: Petr Oros <poros@redhat.com> Reviewed-by: Prathosh Satish <Prathosh.Satish@microchip.com> Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260408102716.443099-6-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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| 63009eb9 | 08-Apr-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: add ref sync and output clock type helpers
Add ZL_REF_SYNC_CTRL_MODE_REFSYNC_PAIR and ZL_REF_SYNC_CTRL_PAIR register definitions.
Add inline helpers to get and set the sync control m
dpll: zl3073x: add ref sync and output clock type helpers
Add ZL_REF_SYNC_CTRL_MODE_REFSYNC_PAIR and ZL_REF_SYNC_CTRL_PAIR register definitions.
Add inline helpers to get and set the sync control mode and sync pair fields of the reference sync control register:
zl3073x_ref_sync_mode_get/set() - ZL_REF_SYNC_CTRL_MODE field zl3073x_ref_sync_pair_get/set() - ZL_REF_SYNC_CTRL_PAIR field
Add inline helpers to get and set the clock type field of the output mode register:
zl3073x_out_clock_type_get/set() - ZL_OUTPUT_MODE_CLOCK_TYPE field
Convert existing esync callbacks to use the new helpers.
Reviewed-by: Petr Oros <poros@redhat.com> Reviewed-by: Prathosh Satish <Prathosh.Satish@microchip.com> Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260408102716.443099-4-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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| 737cb619 | 08-Apr-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: use FIELD_MODIFY() for clear-and-set patterns
Replace open-coded clear-and-set bitfield operations with FIELD_MODIFY().
Reviewed-by: Petr Oros <poros@redhat.com> Reviewed-by: Prathos
dpll: zl3073x: use FIELD_MODIFY() for clear-and-set patterns
Replace open-coded clear-and-set bitfield operations with FIELD_MODIFY().
Reviewed-by: Petr Oros <poros@redhat.com> Reviewed-by: Prathosh Satish <Prathosh.Satish@microchip.com> Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260408102716.443099-3-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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| acee049a | 15-Mar-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: drop selected and simplify connected ref getter
The HW reports the currently selected reference in the dpll_refsel_status register regardless of the DPLL mode. Use this to delete zl30
dpll: zl3073x: drop selected and simplify connected ref getter
The HW reports the currently selected reference in the dpll_refsel_status register regardless of the DPLL mode. Use this to delete zl3073x_dpll_selected_ref_get() and have callers read the register directly via the cached channel state.
Simplify zl3073x_dpll_connected_ref_get() to check refsel_state for LOCK directly and return the reference index, changing the return type from int to u8. The redundant ref_is_status_ok check is removed since the DPLL cannot be in LOCK state with a failed reference.
In zl3073x_dpll_mode_set(), replace the selected_ref_get() call with zl3073x_chan_refsel_ref_get() to read the currently selected reference directly from the cached channel state.
Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260315174224.399074-7-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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| f6b075bc | 15-Mar-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: add reference priority to zl3073x_chan
Cache the ZL_REG_DPLL_REF_PRIO registers in the zl3073x_chan cfg group. These mailbox-based registers store per-reference priority values (4 bit
dpll: zl3073x: add reference priority to zl3073x_chan
Cache the ZL_REG_DPLL_REF_PRIO registers in the zl3073x_chan cfg group. These mailbox-based registers store per-reference priority values (4 bits each, P/N packed) used for automatic reference selection.
Add ref_prio[] array to struct zl3073x_chan and provide inline helpers zl3073x_chan_ref_prio_get(), zl3073x_chan_ref_prio_set(), and zl3073x_chan_ref_is_selectable() for nibble-level access and priority queries. Extend state_fetch and state_set with DPLL mailbox operations to read and write the priority registers.
Replace the ad-hoc zl3073x_dpll_ref_prio_get/set functions in dpll.c with the cached state pattern, removing direct mailbox access from the DPLL layer. This also simplifies pin registration since reading priority from cached state cannot fail.
Remove the pin->selectable flag from struct zl3073x_dpll_pin and derive the selectable state from the cached ref priority via zl3073x_chan_ref_is_selectable(), eliminating a redundant cache.
Inline zl3073x_dpll_selected_ref_set() into zl3073x_dpll_input_pin_state_on_dpll_set(), unifying all manual and automatic mode paths to commit changes through a single zl3073x_chan_state_set() call at the end of the function.
Move hardware limit constants from core.h to regs.h so that chan.h can reference ZL3073X_NUM_REFS for the ref_prio array size.
Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260315174224.399074-6-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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| 41bab554 | 15-Mar-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: add DPLL channel status fields to zl3073x_chan
Add mon_status and refsel_status fields to struct zl3073x_chan in a stat group to cache the 'dpll_mon_status' and 'dpll_refsel_status' r
dpll: zl3073x: add DPLL channel status fields to zl3073x_chan
Add mon_status and refsel_status fields to struct zl3073x_chan in a stat group to cache the 'dpll_mon_status' and 'dpll_refsel_status' registers.
Add zl3073x_chan_lock_state_get(), zl3073x_chan_is_ho_ready(), zl3073x_chan_refsel_state_get() and zl3073x_chan_refsel_ref_get() inline helpers for reading cached state, and zl3073x_chan_state_update() for refreshing both registers from hardware. Call it from zl3073x_chan_state_fetch() as well so that channel status is initialized at device startup.
Call zl3073x_dev_chan_states_update() from the periodic work to keep the cached state up to date and convert zl3073x_dpll_lock_status_get() and zl3073x_dpll_selected_ref_get() to use the cached state via the new helpers instead of direct register reads.
Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260315174224.399074-5-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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| 3032e959 | 15-Mar-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: introduce zl3073x_chan for DPLL channel state
Extract DPLL channel state management into a dedicated zl3073x_chan module, following the pattern already established by zl3073x_ref, zl3
dpll: zl3073x: introduce zl3073x_chan for DPLL channel state
Extract DPLL channel state management into a dedicated zl3073x_chan module, following the pattern already established by zl3073x_ref, zl3073x_out and zl3073x_synth.
The new struct zl3073x_chan caches the raw mode_refsel register value in a cfg group with inline getters and setters to extract and update the bitfields. Three standard state management functions are provided:
- zl3073x_chan_state_fetch: read the mode_refsel register from HW - zl3073x_chan_state_get: return cached channel state - zl3073x_chan_state_set: write changed state to HW, skip if unchanged
The channel state array chan[ZL3073X_MAX_CHANNELS] is added to struct zl3073x_dev. Channel state is fetched as part of zl3073x_dev_state_fetch, using the chip-specific channel count.
The refsel_mode and forced_ref fields are removed from struct zl3073x_dpll and all direct register accesses in dpll.c are replaced with the new chan state operations.
Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260315174224.399074-4-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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| 05ea2ab3 | 15-Mar-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: add zl3073x_ref_state_update helper
Extract the per-reference monitor status HW read into a dedicated zl3073x_ref_state_update() helper in the ref module. Rename zl3073x_dev_ref_statu
dpll: zl3073x: add zl3073x_ref_state_update helper
Extract the per-reference monitor status HW read into a dedicated zl3073x_ref_state_update() helper in the ref module. Rename zl3073x_dev_ref_status_update() to zl3073x_dev_ref_states_update() and use the new helper in it. Call it from zl3073x_ref_state_fetch() as well so that mon_status is initialized at device startup. This keeps direct register access and struct field writes behind the ref module's interface, consistent with the state management pattern used for other ref operations.
Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260315174224.399074-3-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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| 3a97e02b | 27-Feb-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: add die temperature reporting for supported chips
Some zl3073x chip variants (0x1Exx, 0x2Exx and 0x3FC4) provide a die temperature status register with 0.1 C resolution.
Add a ZL3073
dpll: zl3073x: add die temperature reporting for supported chips
Some zl3073x chip variants (0x1Exx, 0x2Exx and 0x3FC4) provide a die temperature status register with 0.1 C resolution.
Add a ZL3073X_FLAG_DIE_TEMP chip flag to identify these variants and implement zl3073x_dpll_temp_get() as the dpll_device_ops.temp_get callback. The register value is converted from 0.1 C units to millidegrees as expected by the DPLL subsystem.
To support per-instance ops selection, copy the base dpll_device_ops into struct zl3073x_dpll and conditionally set .temp_get during device registration based on the chip flag.
Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260227105300.710272-3-ivecera@redhat.com Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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| 85a9aaac | 05-Feb-2026 |
Ivan Vecera <ivecera@redhat.com> |
dpll: zl3073x: Include current frequency in supported frequencies list
Ensure the current pin frequency is always present in the list of supported frequencies reported to userspace. Previously, if t
dpll: zl3073x: Include current frequency in supported frequencies list
Ensure the current pin frequency is always present in the list of supported frequencies reported to userspace. Previously, if the firmware node was missing or didn't include the current operating frequency in the supported-frequencies-hz property, the pin would report a frequency that wasn't in its supported list.
Get the current frequency early in zl3073x_pin_props_get(): - For input pins: use zl3073x_dev_ref_freq_get() - For output pins: use zl3073x_dev_output_pin_freq_get()
Place the current frequency at index 0 of the supported frequencies array, then append frequencies from the firmware node (if present), skipping any duplicate of the current frequency.
Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260205154350.3180465-3-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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