1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2018 Exceet Electronics GmbH 4 * Copyright (C) 2018 Bootlin 5 * 6 * Author: 7 * Peter Pan <peterpandong@micron.com> 8 * Boris Brezillon <boris.brezillon@bootlin.com> 9 */ 10 11 #ifndef __LINUX_SPI_MEM_H 12 #define __LINUX_SPI_MEM_H 13 14 #include <linux/spi/spi.h> 15 16 #define SPI_MEM_OP_CMD(__opcode, __buswidth) \ 17 { \ 18 .nbytes = 1, \ 19 .buswidth = __buswidth, \ 20 .opcode = __opcode, \ 21 } 22 23 #define SPI_MEM_DTR_OP_RPT_CMD(__opcode, __buswidth) \ 24 { \ 25 .nbytes = 2, \ 26 .opcode = __opcode | __opcode << 8, \ 27 .buswidth = __buswidth, \ 28 .dtr = true, \ 29 } 30 31 #define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth) \ 32 { \ 33 .nbytes = __nbytes, \ 34 .buswidth = __buswidth, \ 35 .val = __val, \ 36 } 37 38 #define SPI_MEM_DTR_OP_ADDR(__nbytes, __val, __buswidth) \ 39 { \ 40 .nbytes = __nbytes, \ 41 .val = __val, \ 42 .buswidth = __buswidth, \ 43 .dtr = true, \ 44 } 45 46 #define SPI_MEM_DTR_OP_RPT_ADDR(__val, __buswidth) \ 47 { \ 48 .nbytes = 2, \ 49 .val = __val | __val << 8, \ 50 .buswidth = __buswidth, \ 51 .dtr = true, \ 52 } 53 54 #define SPI_MEM_OP_NO_ADDR { } 55 56 #define SPI_MEM_OP_DUMMY(__nbytes, __buswidth) \ 57 { \ 58 .nbytes = __nbytes, \ 59 .buswidth = __buswidth, \ 60 } 61 62 #define SPI_MEM_DTR_OP_DUMMY(__nbytes, __buswidth) \ 63 { \ 64 .nbytes = __nbytes, \ 65 .buswidth = __buswidth, \ 66 .dtr = true, \ 67 } 68 69 #define SPI_MEM_OP_NO_DUMMY { } 70 71 #define SPI_MEM_OP_DATA_IN(__nbytes, __buf, __buswidth) \ 72 { \ 73 .buswidth = __buswidth, \ 74 .dir = SPI_MEM_DATA_IN, \ 75 .nbytes = __nbytes, \ 76 .buf.in = __buf, \ 77 } 78 79 #define SPI_MEM_DTR_OP_DATA_IN(__nbytes, __buf, __buswidth) \ 80 { \ 81 .dir = SPI_MEM_DATA_IN, \ 82 .nbytes = __nbytes, \ 83 .buf.in = __buf, \ 84 .buswidth = __buswidth, \ 85 .dtr = true, \ 86 } 87 88 #define SPI_MEM_OP_DATA_OUT(__nbytes, __buf, __buswidth) \ 89 { \ 90 .buswidth = __buswidth, \ 91 .dir = SPI_MEM_DATA_OUT, \ 92 .nbytes = __nbytes, \ 93 .buf.out = __buf, \ 94 } 95 96 #define SPI_MEM_DTR_OP_DATA_OUT(__nbytes, __buf, __buswidth) \ 97 { \ 98 .dir = SPI_MEM_DATA_OUT, \ 99 .nbytes = __nbytes, \ 100 .buf.out = __buf, \ 101 .buswidth = __buswidth, \ 102 .dtr = true, \ 103 } 104 105 #define SPI_MEM_OP_NO_DATA { } 106 107 /** 108 * enum spi_mem_data_dir - describes the direction of a SPI memory data 109 * transfer from the controller perspective 110 * @SPI_MEM_NO_DATA: no data transferred 111 * @SPI_MEM_DATA_IN: data coming from the SPI memory 112 * @SPI_MEM_DATA_OUT: data sent to the SPI memory 113 */ 114 enum spi_mem_data_dir { 115 SPI_MEM_NO_DATA, 116 SPI_MEM_DATA_IN, 117 SPI_MEM_DATA_OUT, 118 }; 119 120 #define SPI_MEM_OP_MAX_FREQ(__freq) \ 121 .max_freq = __freq 122 123 /** 124 * struct spi_mem_op - describes a SPI memory operation 125 * @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid). The opcode is 126 * sent MSB-first. 127 * @cmd.buswidth: number of IO lines used to transmit the command 128 * @cmd.opcode: operation opcode 129 * @cmd.dtr: whether the command opcode should be sent in DTR mode or not 130 * @addr.nbytes: number of address bytes to send. Can be zero if the operation 131 * does not need to send an address 132 * @addr.buswidth: number of IO lines used to transmit the address cycles 133 * @addr.dtr: whether the address should be sent in DTR mode or not 134 * @addr.val: address value. This value is always sent MSB first on the bus. 135 * Note that only @addr.nbytes are taken into account in this 136 * address value, so users should make sure the value fits in the 137 * assigned number of bytes. 138 * @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can 139 * be zero if the operation does not require dummy bytes 140 * @dummy.buswidth: number of IO lanes used to transmit the dummy bytes 141 * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not 142 * @data.buswidth: number of IO lanes used to send/receive the data 143 * @data.dtr: whether the data should be sent in DTR mode or not 144 * @data.ecc: whether error correction is required or not 145 * @data.swap16: whether the byte order of 16-bit words is swapped when read 146 * or written in Octal DTR mode compared to STR mode. 147 * @data.dir: direction of the transfer 148 * @data.nbytes: number of data bytes to send/receive. Can be zero if the 149 * operation does not involve transferring data 150 * @data.buf.in: input buffer (must be DMA-able) 151 * @data.buf.out: output buffer (must be DMA-able) 152 * @max_freq: frequency limitation wrt this operation. 0 means there is no 153 * specific constraint and the highest achievable frequency can be 154 * attempted. 155 */ 156 struct spi_mem_op { 157 struct { 158 u8 nbytes; 159 u8 buswidth; 160 u8 dtr : 1; 161 u8 __pad : 7; 162 u16 opcode; 163 } cmd; 164 165 struct { 166 u8 nbytes; 167 u8 buswidth; 168 u8 dtr : 1; 169 u8 __pad : 7; 170 u64 val; 171 } addr; 172 173 struct { 174 u8 nbytes; 175 u8 buswidth; 176 u8 dtr : 1; 177 u8 __pad : 7; 178 } dummy; 179 180 struct { 181 u8 buswidth; 182 u8 dtr : 1; 183 u8 ecc : 1; 184 u8 swap16 : 1; 185 u8 __pad : 5; 186 enum spi_mem_data_dir dir; 187 unsigned int nbytes; 188 union { 189 void *in; 190 const void *out; 191 } buf; 192 } data; 193 194 unsigned int max_freq; 195 }; 196 197 #define SPI_MEM_OP(__cmd, __addr, __dummy, __data, ...) \ 198 { \ 199 .cmd = __cmd, \ 200 .addr = __addr, \ 201 .dummy = __dummy, \ 202 .data = __data, \ 203 __VA_ARGS__ \ 204 } 205 206 /** 207 * struct spi_mem_dirmap_info - Direct mapping information 208 * @op_tmpl: operation template that should be used by the direct mapping when 209 * the memory device is accessed 210 * @offset: absolute offset this direct mapping is pointing to 211 * @length: length in byte of this direct mapping 212 * 213 * These information are used by the controller specific implementation to know 214 * the portion of memory that is directly mapped and the spi_mem_op that should 215 * be used to access the device. 216 * A direct mapping is only valid for one direction (read or write) and this 217 * direction is directly encoded in the ->op_tmpl.data.dir field. 218 */ 219 struct spi_mem_dirmap_info { 220 struct spi_mem_op op_tmpl; 221 u64 offset; 222 u64 length; 223 }; 224 225 /** 226 * struct spi_mem_dirmap_desc - Direct mapping descriptor 227 * @mem: the SPI memory device this direct mapping is attached to 228 * @info: information passed at direct mapping creation time 229 * @nodirmap: set to 1 if the SPI controller does not implement 230 * ->mem_ops->dirmap_create() or when this function returned an 231 * error. If @nodirmap is true, all spi_mem_dirmap_{read,write}() 232 * calls will use spi_mem_exec_op() to access the memory. This is a 233 * degraded mode that allows spi_mem drivers to use the same code 234 * no matter whether the controller supports direct mapping or not 235 * @priv: field pointing to controller specific data 236 * 237 * Common part of a direct mapping descriptor. This object is created by 238 * spi_mem_dirmap_create() and controller implementation of ->create_dirmap() 239 * can create/attach direct mapping resources to the descriptor in the ->priv 240 * field. 241 */ 242 struct spi_mem_dirmap_desc { 243 struct spi_mem *mem; 244 struct spi_mem_dirmap_info info; 245 unsigned int nodirmap; 246 void *priv; 247 }; 248 249 /** 250 * struct spi_mem - describes a SPI memory device 251 * @spi: the underlying SPI device 252 * @drvpriv: spi_mem_driver private data 253 * @name: name of the SPI memory device 254 * 255 * Extra information that describe the SPI memory device and may be needed by 256 * the controller to properly handle this device should be placed here. 257 * 258 * One example would be the device size since some controller expose their SPI 259 * mem devices through a io-mapped region. 260 */ 261 struct spi_mem { 262 struct spi_device *spi; 263 void *drvpriv; 264 const char *name; 265 }; 266 267 /** 268 * struct spi_mem_set_drvdata() - attach driver private data to a SPI mem 269 * device 270 * @mem: memory device 271 * @data: data to attach to the memory device 272 */ 273 static inline void spi_mem_set_drvdata(struct spi_mem *mem, void *data) 274 { 275 mem->drvpriv = data; 276 } 277 278 /** 279 * struct spi_mem_get_drvdata() - get driver private data attached to a SPI mem 280 * device 281 * @mem: memory device 282 * 283 * Return: the data attached to the mem device. 284 */ 285 static inline void *spi_mem_get_drvdata(struct spi_mem *mem) 286 { 287 return mem->drvpriv; 288 } 289 290 /** 291 * struct spi_controller_mem_ops - SPI memory operations 292 * @adjust_op_size: shrink the data xfer of an operation to match controller's 293 * limitations (can be alignment or max RX/TX size 294 * limitations) 295 * @supports_op: check if an operation is supported by the controller 296 * @exec_op: execute a SPI memory operation 297 * not all driver provides supports_op(), so it can return -EOPNOTSUPP 298 * if the op is not supported by the driver/controller 299 * @get_name: get a custom name for the SPI mem device from the controller. 300 * This might be needed if the controller driver has been ported 301 * to use the SPI mem layer and a custom name is used to keep 302 * mtdparts compatible. 303 * Note that if the implementation of this function allocates memory 304 * dynamically, then it should do so with devm_xxx(), as we don't 305 * have a ->free_name() function. 306 * @dirmap_create: create a direct mapping descriptor that can later be used to 307 * access the memory device. This method is optional 308 * @dirmap_destroy: destroy a memory descriptor previous created by 309 * ->dirmap_create() 310 * @dirmap_read: read data from the memory device using the direct mapping 311 * created by ->dirmap_create(). The function can return less 312 * data than requested (for example when the request is crossing 313 * the currently mapped area), and the caller of 314 * spi_mem_dirmap_read() is responsible for calling it again in 315 * this case. 316 * @dirmap_write: write data to the memory device using the direct mapping 317 * created by ->dirmap_create(). The function can return less 318 * data than requested (for example when the request is crossing 319 * the currently mapped area), and the caller of 320 * spi_mem_dirmap_write() is responsible for calling it again in 321 * this case. 322 * @poll_status: poll memory device status until (status & mask) == match or 323 * when the timeout has expired. It fills the data buffer with 324 * the last status value. 325 * 326 * This interface should be implemented by SPI controllers providing an 327 * high-level interface to execute SPI memory operation, which is usually the 328 * case for QSPI controllers. 329 * 330 * Note on ->dirmap_{read,write}(): drivers should avoid accessing the direct 331 * mapping from the CPU because doing that can stall the CPU waiting for the 332 * SPI mem transaction to finish, and this will make real-time maintainers 333 * unhappy and might make your system less reactive. Instead, drivers should 334 * use DMA to access this direct mapping. 335 */ 336 struct spi_controller_mem_ops { 337 int (*adjust_op_size)(struct spi_mem *mem, struct spi_mem_op *op); 338 bool (*supports_op)(struct spi_mem *mem, 339 const struct spi_mem_op *op); 340 int (*exec_op)(struct spi_mem *mem, 341 const struct spi_mem_op *op); 342 const char *(*get_name)(struct spi_mem *mem); 343 int (*dirmap_create)(struct spi_mem_dirmap_desc *desc); 344 void (*dirmap_destroy)(struct spi_mem_dirmap_desc *desc); 345 ssize_t (*dirmap_read)(struct spi_mem_dirmap_desc *desc, 346 u64 offs, size_t len, void *buf); 347 ssize_t (*dirmap_write)(struct spi_mem_dirmap_desc *desc, 348 u64 offs, size_t len, const void *buf); 349 int (*poll_status)(struct spi_mem *mem, 350 const struct spi_mem_op *op, 351 u16 mask, u16 match, 352 unsigned long initial_delay_us, 353 unsigned long polling_rate_us, 354 unsigned long timeout_ms); 355 }; 356 357 /** 358 * struct spi_controller_mem_caps - SPI memory controller capabilities 359 * @dtr: Supports DTR operations 360 * @ecc: Supports operations with error correction 361 * @swap16: Supports swapping bytes on a 16 bit boundary when configured in 362 * Octal DTR 363 * @per_op_freq: Supports per operation frequency switching 364 */ 365 struct spi_controller_mem_caps { 366 bool dtr; 367 bool ecc; 368 bool swap16; 369 bool per_op_freq; 370 }; 371 372 #define spi_mem_controller_is_capable(ctlr, cap) \ 373 ((ctlr)->mem_caps && (ctlr)->mem_caps->cap) 374 375 /** 376 * struct spi_mem_driver - SPI memory driver 377 * @spidrv: inherit from a SPI driver 378 * @probe: probe a SPI memory. Usually where detection/initialization takes 379 * place 380 * @remove: remove a SPI memory 381 * @shutdown: take appropriate action when the system is shutdown 382 * 383 * This is just a thin wrapper around a spi_driver. The core takes care of 384 * allocating the spi_mem object and forwarding the probe/remove/shutdown 385 * request to the spi_mem_driver. The reason we use this wrapper is because 386 * we might have to stuff more information into the spi_mem struct to let 387 * SPI controllers know more about the SPI memory they interact with, and 388 * having this intermediate layer allows us to do that without adding more 389 * useless fields to the spi_device object. 390 */ 391 struct spi_mem_driver { 392 struct spi_driver spidrv; 393 int (*probe)(struct spi_mem *mem); 394 int (*remove)(struct spi_mem *mem); 395 void (*shutdown)(struct spi_mem *mem); 396 }; 397 398 #if IS_ENABLED(CONFIG_SPI_MEM) 399 int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr, 400 const struct spi_mem_op *op, 401 struct sg_table *sg); 402 403 void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, 404 const struct spi_mem_op *op, 405 struct sg_table *sg); 406 407 bool spi_mem_default_supports_op(struct spi_mem *mem, 408 const struct spi_mem_op *op); 409 #else 410 static inline int 411 spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr, 412 const struct spi_mem_op *op, 413 struct sg_table *sg) 414 { 415 return -ENOTSUPP; 416 } 417 418 static inline void 419 spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, 420 const struct spi_mem_op *op, 421 struct sg_table *sg) 422 { 423 } 424 425 static inline 426 bool spi_mem_default_supports_op(struct spi_mem *mem, 427 const struct spi_mem_op *op) 428 { 429 return false; 430 } 431 #endif /* CONFIG_SPI_MEM */ 432 433 int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op); 434 void spi_mem_adjust_op_freq(struct spi_mem *mem, struct spi_mem_op *op); 435 u64 spi_mem_calc_op_duration(struct spi_mem *mem, struct spi_mem_op *op); 436 437 bool spi_mem_supports_op(struct spi_mem *mem, 438 const struct spi_mem_op *op); 439 440 int spi_mem_exec_op(struct spi_mem *mem, 441 const struct spi_mem_op *op); 442 443 const char *spi_mem_get_name(struct spi_mem *mem); 444 445 struct spi_mem_dirmap_desc * 446 spi_mem_dirmap_create(struct spi_mem *mem, 447 const struct spi_mem_dirmap_info *info); 448 void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc); 449 ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc, 450 u64 offs, size_t len, void *buf); 451 ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc, 452 u64 offs, size_t len, const void *buf); 453 struct spi_mem_dirmap_desc * 454 devm_spi_mem_dirmap_create(struct device *dev, struct spi_mem *mem, 455 const struct spi_mem_dirmap_info *info); 456 void devm_spi_mem_dirmap_destroy(struct device *dev, 457 struct spi_mem_dirmap_desc *desc); 458 459 int spi_mem_poll_status(struct spi_mem *mem, 460 const struct spi_mem_op *op, 461 u16 mask, u16 match, 462 unsigned long initial_delay_us, 463 unsigned long polling_delay_us, 464 u16 timeout_ms); 465 466 int spi_mem_driver_register_with_owner(struct spi_mem_driver *drv, 467 struct module *owner); 468 469 void spi_mem_driver_unregister(struct spi_mem_driver *drv); 470 471 #define spi_mem_driver_register(__drv) \ 472 spi_mem_driver_register_with_owner(__drv, THIS_MODULE) 473 474 #define module_spi_mem_driver(__drv) \ 475 module_driver(__drv, spi_mem_driver_register, \ 476 spi_mem_driver_unregister) 477 478 #endif /* __LINUX_SPI_MEM_H */ 479