drm/amd/display: Make dcn401_dsc_funcs staticThe sparse tool complains as follows:drivers/gpu/drm/amd/amdgpu/../display/dc/dsc/dcn401/dcn401_dsc.c:30:24: warning: symbol 'dcn401_dsc_funcs' was n
drm/amd/display: Make dcn401_dsc_funcs staticThe sparse tool complains as follows:drivers/gpu/drm/amd/amdgpu/../display/dc/dsc/dcn401/dcn401_dsc.c:30:24: warning: symbol 'dcn401_dsc_funcs' was not declared. Should it be static?This symbol is not used outside of dcn401_dsc.c, so marks it static.Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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drm/amd/display: Adjust reg field for DSC wait for disconnect[WHY]DSC was waiting for the wrong field to disconnect cleanly.[HOW]Changed field the DSC disconnect was waiting on.Reviewed-by: W
drm/amd/display: Adjust reg field for DSC wait for disconnect[WHY]DSC was waiting for the wrong field to disconnect cleanly.[HOW]Changed field the DSC disconnect was waiting on.Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>Cc: Mario Limonciello <mario.limonciello@amd.com>Cc: Alex Deucher <alexander.deucher@amd.com>Cc: stable@vger.kernel.orgSigned-off-by: Alex Hung <alex.hung@amd.com>Signed-off-by: Ryan Seto <ryanseto@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Allow higher DSC slice support for small timings on dcn401[WHY]DML2.1 has added the support to determine ODM combine based on DSC slicecount limitation. This support would allow
drm/amd/display: Allow higher DSC slice support for small timings on dcn401[WHY]DML2.1 has added the support to determine ODM combine based on DSC slicecount limitation. This support would allow us to support DSC slice higherthan 4 on small timings. The change will allow higher DSC slice supportindependent from pixel clock in use.[HOW]Add a DCN401 get_enc_caps function to allow the support for DSC slice counthigher than 4.Reviewed-by: Dillon Varone <dillon.varone@amd.com>Acked-by: Alex Hung <alex.hung@amd.com>Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: reset DSC clock in post unlock update[why]Switching between DSC clock or disable DSC block are not double buffered update.Corruption is observed if these updates happen before DS
drm/amd/display: reset DSC clock in post unlock update[why]Switching between DSC clock or disable DSC block are not double buffered update.Corruption is observed if these updates happen before DSC double buffereddisconnection.[how]Move DSC disable and refclk reset to post unlock update. Wait for DSC double buffereddisconnection and all mpccs are disconnected before reset DSC clock.Reviewed-by: Samson Tam <samson.tam@amd.com>Acked-by: Tom Chung <chiahsuan.chung@amd.com>Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add new DCN401 sourcesAdd initial support for DCN 4.0.1.Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>Signed-of
drm/amd/display: Add new DCN401 sourcesAdd initial support for DCN 4.0.1.Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>