1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct mall_stream_config { 42 /* MALL stream config to indicate if the stream is phantom or not. 43 * We will use a phantom stream to indicate that the pipe is phantom. 44 */ 45 enum mall_stream_type type; 46 struct dc_stream_state *paired_stream; // master / slave stream 47 }; 48 49 struct dc_stream_status { 50 int primary_otg_inst; 51 int stream_enc_inst; 52 53 /** 54 * @plane_count: Total of planes attached to a single stream 55 */ 56 int plane_count; 57 int audio_inst; 58 struct timing_sync_info timing_sync_info; 59 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 60 bool is_abm_supported; 61 struct mall_stream_config mall_stream_config; 62 bool fpo_in_use; 63 }; 64 65 enum hubp_dmdata_mode { 66 DMDATA_SW_MODE, 67 DMDATA_HW_MODE 68 }; 69 70 struct dc_dmdata_attributes { 71 /* Specifies whether dynamic meta data will be updated by software 72 * or has to be fetched by hardware (DMA mode) 73 */ 74 enum hubp_dmdata_mode dmdata_mode; 75 /* Specifies if current dynamic meta data is to be used only for the current frame */ 76 bool dmdata_repeat; 77 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 78 uint32_t dmdata_size; 79 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 80 bool dmdata_updated; 81 /* If hardware mode is used, the base address where DMDATA surface is located */ 82 PHYSICAL_ADDRESS_LOC address; 83 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 84 bool dmdata_qos_mode; 85 /* If qos_mode = 1, this is the QOS value to be used: */ 86 uint32_t dmdata_qos_level; 87 /* Specifies the value in unit of REFCLK cycles to be added to the 88 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 89 */ 90 uint32_t dmdata_dl_delta; 91 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 92 uint32_t *dmdata_sw_data; 93 }; 94 95 struct dc_writeback_info { 96 bool wb_enabled; 97 int dwb_pipe_inst; 98 struct dc_dwb_params dwb_params; 99 struct mcif_buf_params mcif_buf_params; 100 struct mcif_warmup_params mcif_warmup_params; 101 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 102 struct dc_plane_state *writeback_source_plane; 103 /* source MPCC instance. for use by internally by dc */ 104 int mpcc_inst; 105 }; 106 107 struct dc_writeback_update { 108 unsigned int num_wb_info; 109 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 110 }; 111 112 enum vertical_interrupt_ref_point { 113 START_V_UPDATE = 0, 114 START_V_SYNC, 115 INVALID_POINT 116 117 //For now, only v_update interrupt is used. 118 //START_V_BLANK, 119 //START_V_ACTIVE 120 }; 121 122 struct periodic_interrupt_config { 123 enum vertical_interrupt_ref_point ref_point; 124 int lines_offset; 125 }; 126 127 struct dc_mst_stream_bw_update { 128 bool is_increase; // is bandwidth reduced or increased 129 uint32_t mst_stream_bw; // new mst bandwidth in kbps 130 }; 131 132 union stream_update_flags { 133 struct { 134 uint32_t scaling:1; 135 uint32_t out_tf:1; 136 uint32_t out_csc:1; 137 uint32_t abm_level:1; 138 uint32_t dpms_off:1; 139 uint32_t gamut_remap:1; 140 uint32_t wb_update:1; 141 uint32_t dsc_changed : 1; 142 uint32_t mst_bw : 1; 143 uint32_t crtc_timing_adjust : 1; 144 uint32_t fams_changed : 1; 145 } bits; 146 147 uint32_t raw; 148 }; 149 150 struct test_pattern { 151 enum dp_test_pattern type; 152 enum dp_test_pattern_color_space color_space; 153 struct link_training_settings const *p_link_settings; 154 unsigned char const *p_custom_pattern; 155 unsigned int cust_pattern_size; 156 }; 157 158 #define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR) 159 160 struct dc_stream_debug_options { 161 char force_odm_combine_segments; 162 /* 163 * When force_odm_combine_segments is non zero, allow dc to 164 * temporarily transition to ODM bypass when minimal transition state 165 * is required to prevent visual glitches showing on the screen 166 */ 167 char allow_transition_for_forced_odm; 168 }; 169 170 #define LUMINANCE_DATA_TABLE_SIZE 10 171 172 struct luminance_data { 173 bool is_valid; 174 int refresh_rate_hz[LUMINANCE_DATA_TABLE_SIZE]; 175 int luminance_millinits[LUMINANCE_DATA_TABLE_SIZE]; 176 int flicker_criteria_milli_nits_GAMING; 177 int flicker_criteria_milli_nits_STATIC; 178 int nominal_refresh_rate; 179 int dm_max_decrease_from_nominal; 180 }; 181 182 struct dc_stream_state { 183 // sink is deprecated, new code should not reference 184 // this pointer 185 struct dc_sink *sink; 186 187 struct dc_link *link; 188 /* For dynamic link encoder assignment, update the link encoder assigned to 189 * a stream via the volatile dc_state rather than the static dc_link. 190 */ 191 struct link_encoder *link_enc; 192 struct dc_stream_debug_options debug; 193 struct dc_panel_patch sink_patches; 194 struct dc_crtc_timing timing; 195 struct dc_crtc_timing_adjust adjust; 196 struct dc_info_packet vrr_infopacket; 197 struct dc_info_packet vsc_infopacket; 198 struct dc_info_packet vsp_infopacket; 199 struct dc_info_packet hfvsif_infopacket; 200 struct dc_info_packet vtem_infopacket; 201 struct dc_info_packet adaptive_sync_infopacket; 202 uint8_t dsc_packed_pps[128]; 203 struct rect src; /* composition area */ 204 struct rect dst; /* stream addressable area */ 205 206 struct audio_info audio_info; 207 208 struct dc_info_packet hdr_static_metadata; 209 PHYSICAL_ADDRESS_LOC dmdata_address; 210 bool use_dynamic_meta; 211 212 struct dc_transfer_func out_transfer_func; 213 struct colorspace_transform gamut_remap_matrix; 214 struct dc_csc_transform csc_color_matrix; 215 216 enum dc_color_space output_color_space; 217 enum display_content_type content_type; 218 enum dc_dither_option dither_option; 219 220 enum view_3d_format view_format; 221 222 bool use_vsc_sdp_for_colorimetry; 223 bool ignore_msa_timing_param; 224 225 /** 226 * @allow_freesync: 227 * 228 * It say if Freesync is enabled or not. 229 */ 230 bool allow_freesync; 231 232 /** 233 * @vrr_active_variable: 234 * 235 * It describes if VRR is in use. 236 */ 237 bool vrr_active_variable; 238 bool freesync_on_desktop; 239 bool vrr_active_fixed; 240 241 bool converter_disable_audio; 242 uint8_t qs_bit; 243 uint8_t qy_bit; 244 245 /* TODO: custom INFO packets */ 246 /* TODO: ABM info (DMCU) */ 247 /* TODO: CEA VIC */ 248 249 /* DMCU info */ 250 unsigned int abm_level; 251 252 struct periodic_interrupt_config periodic_interrupt; 253 254 /* from core_stream struct */ 255 struct dc_context *ctx; 256 257 /* used by DCP and FMT */ 258 struct bit_depth_reduction_params bit_depth_params; 259 struct clamping_and_pixel_encoding_params clamping; 260 261 int phy_pix_clk; 262 enum signal_type signal; 263 bool dpms_off; 264 265 void *dm_stream_context; 266 267 struct dc_cursor_attributes cursor_attributes; 268 struct dc_cursor_position cursor_position; 269 bool hw_cursor_req; 270 271 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 272 273 /* from stream struct */ 274 struct kref refcount; 275 276 struct crtc_trigger_info triggered_crtc_reset; 277 278 /* writeback */ 279 unsigned int num_wb_info; 280 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 281 const struct dc_transfer_func *func_shaper; 282 const struct dc_3dlut *lut3d_func; 283 /* Computed state bits */ 284 bool mode_changed : 1; 285 286 /* Output from DC when stream state is committed or altered 287 * DC may only access these values during: 288 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 289 * values may not change outside of those calls 290 */ 291 struct { 292 // For interrupt management, some hardware instance 293 // offsets need to be exposed to DM 294 uint8_t otg_offset; 295 } out; 296 297 bool apply_edp_fast_boot_optimization; 298 bool apply_seamless_boot_optimization; 299 uint32_t apply_boot_odm_mode; 300 301 uint32_t stream_id; 302 303 struct test_pattern test_pattern; 304 union stream_update_flags update_flags; 305 306 bool has_non_synchronizable_pclk; 307 bool vblank_synchronized; 308 bool is_phantom; 309 310 struct luminance_data lumin_data; 311 }; 312 313 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 314 315 struct dc_stream_update { 316 struct dc_stream_state *stream; 317 318 struct rect src; 319 struct rect dst; 320 struct dc_transfer_func *out_transfer_func; 321 struct dc_info_packet *hdr_static_metadata; 322 unsigned int *abm_level; 323 324 struct periodic_interrupt_config *periodic_interrupt; 325 326 struct dc_info_packet *vrr_infopacket; 327 struct dc_info_packet *vsc_infopacket; 328 struct dc_info_packet *vsp_infopacket; 329 struct dc_info_packet *hfvsif_infopacket; 330 struct dc_info_packet *vtem_infopacket; 331 struct dc_info_packet *adaptive_sync_infopacket; 332 bool *dpms_off; 333 bool integer_scaling_update; 334 bool *allow_freesync; 335 bool *vrr_active_variable; 336 bool *vrr_active_fixed; 337 338 struct colorspace_transform *gamut_remap; 339 enum dc_color_space *output_color_space; 340 enum dc_dither_option *dither_option; 341 342 struct dc_csc_transform *output_csc_transform; 343 344 struct dc_writeback_update *wb_update; 345 struct dc_dsc_config *dsc_config; 346 struct dc_mst_stream_bw_update *mst_bw_update; 347 struct dc_transfer_func *func_shaper; 348 struct dc_3dlut *lut3d_func; 349 350 struct test_pattern *pending_test_pattern; 351 struct dc_crtc_timing_adjust *crtc_timing_adjust; 352 353 struct dc_cursor_attributes *cursor_attributes; 354 struct dc_cursor_position *cursor_position; 355 bool *hw_cursor_req; 356 }; 357 358 bool dc_is_stream_unchanged( 359 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 360 bool dc_is_stream_scaling_unchanged( 361 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 362 363 /* 364 * Setup stream attributes if no stream updates are provided 365 * there will be no impact on the stream parameters 366 * 367 * Set up surface attributes and associate to a stream 368 * The surfaces parameter is an absolute set of all surface active for the stream. 369 * If no surfaces are provided, the stream will be blanked; no memory read. 370 * Any flip related attribute changes must be done through this interface. 371 * 372 * After this call: 373 * Surfaces attributes are programmed and configured to be composed into stream. 374 * This does not trigger a flip. No surface address is programmed. 375 * 376 */ 377 bool dc_update_planes_and_stream(struct dc *dc, 378 struct dc_surface_update *surface_updates, int surface_count, 379 struct dc_stream_state *dc_stream, 380 struct dc_stream_update *stream_update); 381 382 /* 383 * Set up surface attributes and associate to a stream 384 * The surfaces parameter is an absolute set of all surface active for the stream. 385 * If no surfaces are provided, the stream will be blanked; no memory read. 386 * Any flip related attribute changes must be done through this interface. 387 * 388 * After this call: 389 * Surfaces attributes are programmed and configured to be composed into stream. 390 * This does not trigger a flip. No surface address is programmed. 391 */ 392 void dc_commit_updates_for_stream(struct dc *dc, 393 struct dc_surface_update *srf_updates, 394 int surface_count, 395 struct dc_stream_state *stream, 396 struct dc_stream_update *stream_update, 397 struct dc_state *state); 398 /* 399 * Log the current stream state. 400 */ 401 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 402 403 uint8_t dc_get_current_stream_count(struct dc *dc); 404 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 405 406 /* 407 * Return the current frame counter. 408 */ 409 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 410 411 /* 412 * Send dp sdp message. 413 */ 414 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 415 const uint8_t *custom_sdp_message, 416 unsigned int sdp_message_size); 417 418 /* TODO: Return parsed values rather than direct register read 419 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 420 * being refactored properly to be dce-specific 421 */ 422 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 423 uint32_t *v_blank_start, 424 uint32_t *v_blank_end, 425 uint32_t *h_position, 426 uint32_t *v_position); 427 428 bool dc_stream_add_writeback(struct dc *dc, 429 struct dc_stream_state *stream, 430 struct dc_writeback_info *wb_info); 431 432 bool dc_stream_fc_disable_writeback(struct dc *dc, 433 struct dc_stream_state *stream, 434 uint32_t dwb_pipe_inst); 435 436 bool dc_stream_remove_writeback(struct dc *dc, 437 struct dc_stream_state *stream, 438 uint32_t dwb_pipe_inst); 439 440 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 441 struct dc_state *state, 442 struct dc_stream_state *stream); 443 444 bool dc_stream_warmup_writeback(struct dc *dc, 445 int num_dwb, 446 struct dc_writeback_info *wb_info); 447 448 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 449 450 bool dc_stream_set_dynamic_metadata(struct dc *dc, 451 struct dc_stream_state *stream, 452 struct dc_dmdata_attributes *dmdata_attr); 453 454 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 455 456 /* 457 * Enable stereo when commit_streams is not required, 458 * for example, frame alternate. 459 */ 460 void dc_enable_stereo( 461 struct dc *dc, 462 struct dc_state *context, 463 struct dc_stream_state *streams[], 464 uint8_t stream_count); 465 466 /* Triggers multi-stream synchronization. */ 467 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 468 469 enum surface_update_type dc_check_update_surfaces_for_stream( 470 struct dc *dc, 471 struct dc_surface_update *updates, 472 int surface_count, 473 struct dc_stream_update *stream_update, 474 const struct dc_stream_status *stream_status); 475 476 /** 477 * Create a new default stream for the requested sink 478 */ 479 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 480 481 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 482 483 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 484 485 void dc_stream_retain(struct dc_stream_state *dc_stream); 486 void dc_stream_release(struct dc_stream_state *dc_stream); 487 488 struct dc_stream_status *dc_stream_get_status( 489 struct dc_stream_state *dc_stream); 490 491 /******************************************************************************* 492 * Cursor interfaces - To manages the cursor within a stream 493 ******************************************************************************/ 494 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 495 496 void program_cursor_attributes( 497 struct dc *dc, 498 struct dc_stream_state *stream); 499 500 void program_cursor_position( 501 struct dc *dc, 502 struct dc_stream_state *stream); 503 504 bool dc_stream_set_cursor_attributes( 505 struct dc_stream_state *stream, 506 const struct dc_cursor_attributes *attributes); 507 508 bool dc_stream_program_cursor_attributes( 509 struct dc_stream_state *stream, 510 const struct dc_cursor_attributes *attributes); 511 512 bool dc_stream_set_cursor_position( 513 struct dc_stream_state *stream, 514 const struct dc_cursor_position *position); 515 516 bool dc_stream_program_cursor_position( 517 struct dc_stream_state *stream, 518 const struct dc_cursor_position *position); 519 520 521 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 522 struct dc_stream_state *stream, 523 struct dc_crtc_timing_adjust *adjust); 524 525 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 526 struct dc_stream_state *stream, 527 uint32_t *refresh_rate); 528 529 bool dc_stream_get_crtc_position(struct dc *dc, 530 struct dc_stream_state **stream, 531 int num_streams, 532 unsigned int *v_pos, 533 unsigned int *nom_v_pos); 534 535 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 536 bool dc_stream_forward_crc_window(struct dc_stream_state *stream, 537 struct rect *rect, 538 bool is_stop); 539 #endif 540 541 bool dc_stream_configure_crc(struct dc *dc, 542 struct dc_stream_state *stream, 543 struct crc_params *crc_window, 544 bool enable, 545 bool continuous); 546 547 bool dc_stream_get_crc(struct dc *dc, 548 struct dc_stream_state *stream, 549 uint32_t *r_cr, 550 uint32_t *g_y, 551 uint32_t *b_cb); 552 553 void dc_stream_set_static_screen_params(struct dc *dc, 554 struct dc_stream_state **stream, 555 int num_streams, 556 const struct dc_static_screen_params *params); 557 558 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 559 enum dc_dynamic_expansion option); 560 561 void dc_stream_set_dither_option(struct dc_stream_state *stream, 562 enum dc_dither_option option); 563 564 bool dc_stream_set_gamut_remap(struct dc *dc, 565 const struct dc_stream_state *stream); 566 567 bool dc_stream_program_csc_matrix(struct dc *dc, 568 struct dc_stream_state *stream); 569 570 bool dc_stream_get_crtc_position(struct dc *dc, 571 struct dc_stream_state **stream, 572 int num_streams, 573 unsigned int *v_pos, 574 unsigned int *nom_v_pos); 575 576 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 577 578 void dc_dmub_update_dirty_rect(struct dc *dc, 579 int surface_count, 580 struct dc_stream_state *stream, 581 struct dc_surface_update *srf_updates, 582 struct dc_state *context); 583 #endif /* DC_STREAM_H_ */ 584