| e096c24e | 15-Jun-2026 |
Fu Hao <fuhao@open-hieco.net> |
ALSA: hda: Fix single byte writing issue for Hygon family 18h model 5h
On Hygon family 18h model 5h controller, some registers such as
GCTL, SD_CTL and SD_CTL_3B should be accessed in dword, or the
ALSA: hda: Fix single byte writing issue for Hygon family 18h model 5h
On Hygon family 18h model 5h controller, some registers such as
GCTL, SD_CTL and SD_CTL_3B should be accessed in dword, or the
writing will fail.
Signed-off-by: Fu Hao <fuhao@open-hieco.net>
Link: https://patch.msgid.link/dd4a0b6743751dfb495a371c135ac052191e99f6.1781523812.git.fuhao@open-hieco.net
Signed-off-by: Takashi Iwai <tiwai@suse.de>
show more ...
|
| 33d3b6f0 | 19-May-2026 |
Takashi Iwai <tiwai@suse.de> |
ALSA: hda/intel: Make sure to cancel irq-pending work at closing PCM stream
The pending irq work might be still floating while the assigned stream
has been already closed, which may lead to UAF, esp
ALSA: hda/intel: Make sure to cancel irq-pending work at closing PCM stream
The pending irq work might be still floating while the assigned stream
has been already closed, which may lead to UAF, especially when
another async work for fasync is involved.
For addressing this, extend the hda_controller_ops for allowing the
extra cleanup procedure that is specific to the controller driver, and
make sure to cancel and sync the pending irq work at each PCM close
before releasing the resources.
Reported-by: Jake Lamberson <lamberson.jake@gmail.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20260519121157.28477-2-tiwai@suse.de
show more ...
|
| 696b0a9b | 27-Mar-2026 |
Stuart Hayhurst <stuart.a.hayhurst@gmail.com> |
ALSA: hda/intel: Add MSI X870E Tomahawk to denylist by DMI ID
This motherboard uses USB audio instead, causing this driver to complain
about "no codecs found!".
Add it to the denylist to silence the
ALSA: hda/intel: Add MSI X870E Tomahawk to denylist by DMI ID
This motherboard uses USB audio instead, causing this driver to complain
about "no codecs found!".
Add it to the denylist to silence the warning.
The first attempt only matched on the PCI device, but this caused issues
for some laptops, so DMI match against the board as well.
Signed-off-by: Stuart Hayhurst <stuart.a.hayhurst@gmail.com>
Link: https://patch.msgid.link/20260327155737.21818-2-stuart.a.hayhurst@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
show more ...
|
| cb9b6f9d | 29-Jan-2026 |
Vivian Wang <wangruikang@iscas.ac.cn> |
ALSA: hda/intel: Make MSI address limit based on the device DMA limit
The hda/intel driver restricts the MSI message address for devices which do
not advertise full 64-bit DMA address space support
ALSA: hda/intel: Make MSI address limit based on the device DMA limit
The hda/intel driver restricts the MSI message address for devices which do
not advertise full 64-bit DMA address space support to 32-bit due to the
former restrictions of the PCI/MSI code which only allowed either 32-bit or
a full 64-bit address range.
This does not work on platforms which have a MSI doorbell address above the
32-bit boundary but do not support the full 64 bit address range.
The PCI/MSI core converted this binary decision to a DMA_BIT_MASK() based
decision, which allows to describe the device limitations precisely.
Convert the driver to provide the exact DMA address limitations to the
PCI/MSI core. That allows devices which do not support the full 64-bit
address space to work on platforms which have a MSI doorbell address above
the 32-bit limit as long as it is within the hardware's addressable range.
[ tglx: Massage changelog ]
Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Acked-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20260129-pci-msi-addr-mask-v4-4-70da998f2750@iscas.ac.cn
show more ...
|