1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * MAX44000 Ambient and Infrared Proximity Sensor 4 * 5 * Copyright (c) 2016, Intel Corporation. 6 * 7 * Data sheet: https://datasheets.maximintegrated.com/en/ds/MAX44000.pdf 8 * 9 * 7-bit I2C slave address 0x4a 10 */ 11 12 #include <linux/module.h> 13 #include <linux/init.h> 14 #include <linux/i2c.h> 15 #include <linux/regmap.h> 16 #include <linux/util_macros.h> 17 #include <linux/iio/iio.h> 18 #include <linux/iio/sysfs.h> 19 #include <linux/iio/buffer.h> 20 #include <linux/iio/trigger_consumer.h> 21 #include <linux/iio/triggered_buffer.h> 22 23 #define MAX44000_DRV_NAME "max44000" 24 25 /* Registers in datasheet order */ 26 #define MAX44000_REG_STATUS 0x00 27 #define MAX44000_REG_CFG_MAIN 0x01 28 #define MAX44000_REG_CFG_RX 0x02 29 #define MAX44000_REG_CFG_TX 0x03 30 #define MAX44000_REG_ALS_DATA_HI 0x04 31 #define MAX44000_REG_ALS_DATA_LO 0x05 32 #define MAX44000_REG_PRX_DATA 0x16 33 #define MAX44000_REG_ALS_UPTHR_HI 0x06 34 #define MAX44000_REG_ALS_UPTHR_LO 0x07 35 #define MAX44000_REG_ALS_LOTHR_HI 0x08 36 #define MAX44000_REG_ALS_LOTHR_LO 0x09 37 #define MAX44000_REG_PST 0x0a 38 #define MAX44000_REG_PRX_IND 0x0b 39 #define MAX44000_REG_PRX_THR 0x0c 40 #define MAX44000_REG_TRIM_GAIN_GREEN 0x0f 41 #define MAX44000_REG_TRIM_GAIN_IR 0x10 42 43 /* REG_CFG bits */ 44 #define MAX44000_CFG_ALSINTE 0x01 45 #define MAX44000_CFG_PRXINTE 0x02 46 #define MAX44000_CFG_MASK 0x1c 47 #define MAX44000_CFG_MODE_SHUTDOWN 0x00 48 #define MAX44000_CFG_MODE_ALS_GIR 0x04 49 #define MAX44000_CFG_MODE_ALS_G 0x08 50 #define MAX44000_CFG_MODE_ALS_IR 0x0c 51 #define MAX44000_CFG_MODE_ALS_PRX 0x10 52 #define MAX44000_CFG_MODE_PRX 0x14 53 #define MAX44000_CFG_TRIM 0x20 54 55 /* 56 * Upper 4 bits are not documented but start as 1 on powerup 57 * Setting them to 0 causes proximity to misbehave so set them to 1 58 */ 59 #define MAX44000_REG_CFG_RX_DEFAULT 0xf0 60 61 /* REG_RX bits */ 62 #define MAX44000_CFG_RX_ALSTIM_MASK 0x0c 63 #define MAX44000_CFG_RX_ALSTIM_SHIFT 2 64 #define MAX44000_CFG_RX_ALSPGA_MASK 0x03 65 #define MAX44000_CFG_RX_ALSPGA_SHIFT 0 66 67 /* REG_TX bits */ 68 #define MAX44000_LED_CURRENT_MASK 0xf 69 #define MAX44000_LED_CURRENT_MAX 11 70 #define MAX44000_LED_CURRENT_DEFAULT 6 71 72 #define MAX44000_ALSDATA_OVERFLOW 0x4000 73 74 struct max44000_data { 75 struct mutex lock; 76 struct regmap *regmap; 77 }; 78 79 /* Default scale is set to the minimum of 0.03125 or 1 / (1 << 5) lux */ 80 #define MAX44000_ALS_TO_LUX_DEFAULT_FRACTION_LOG2 5 81 82 /* Scale can be multiplied by up to 128x via ALSPGA for measurement gain */ 83 static const int max44000_alspga_shift[] = {0, 2, 4, 7}; 84 #define MAX44000_ALSPGA_MAX_SHIFT 7 85 86 /* 87 * Scale can be multiplied by up to 64x via ALSTIM because of lost resolution 88 * 89 * This scaling factor is hidden from userspace and instead accounted for when 90 * reading raw values from the device. 91 * 92 * This makes it possible to cleanly expose ALSPGA as IIO_CHAN_INFO_SCALE and 93 * ALSTIM as IIO_CHAN_INFO_INT_TIME without the values affecting each other. 94 * 95 * Handling this internally is also required for buffer support because the 96 * channel's scan_type can't be modified dynamically. 97 */ 98 #define MAX44000_ALSTIM_SHIFT(alstim) (2 * (alstim)) 99 100 /* Available integration times with pretty manual alignment: */ 101 static const int max44000_int_time_avail_ns_array[] = { 102 100000000, 103 25000000, 104 6250000, 105 1562500, 106 }; 107 static const char max44000_int_time_avail_str[] = 108 "0.100 " 109 "0.025 " 110 "0.00625 " 111 "0.0015625"; 112 113 /* Available scales (internal to ulux) with pretty manual alignment: */ 114 static const int max44000_scale_avail_ulux_array[] = { 115 31250, 116 125000, 117 500000, 118 4000000, 119 }; 120 static const char max44000_scale_avail_str[] = 121 "0.03125 " 122 "0.125 " 123 "0.5 " 124 "4"; 125 126 #define MAX44000_SCAN_INDEX_ALS 0 127 #define MAX44000_SCAN_INDEX_PRX 1 128 129 static const struct iio_chan_spec max44000_channels[] = { 130 { 131 .type = IIO_LIGHT, 132 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 133 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | 134 BIT(IIO_CHAN_INFO_INT_TIME), 135 .scan_index = MAX44000_SCAN_INDEX_ALS, 136 .scan_type = { 137 .sign = 'u', 138 .realbits = 14, 139 .storagebits = 16, 140 } 141 }, 142 { 143 .type = IIO_PROXIMITY, 144 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 145 .scan_index = MAX44000_SCAN_INDEX_PRX, 146 .scan_type = { 147 .sign = 'u', 148 .realbits = 8, 149 .storagebits = 16, 150 } 151 }, 152 IIO_CHAN_SOFT_TIMESTAMP(2), 153 { 154 .type = IIO_CURRENT, 155 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 156 BIT(IIO_CHAN_INFO_SCALE), 157 .extend_name = "led", 158 .output = 1, 159 .scan_index = -1, 160 }, 161 }; 162 163 static int max44000_read_alstim(struct max44000_data *data) 164 { 165 unsigned int val; 166 int ret; 167 168 ret = regmap_read(data->regmap, MAX44000_REG_CFG_RX, &val); 169 if (ret < 0) 170 return ret; 171 return (val & MAX44000_CFG_RX_ALSTIM_MASK) >> MAX44000_CFG_RX_ALSTIM_SHIFT; 172 } 173 174 static int max44000_write_alstim(struct max44000_data *data, int val) 175 { 176 return regmap_write_bits(data->regmap, MAX44000_REG_CFG_RX, 177 MAX44000_CFG_RX_ALSTIM_MASK, 178 val << MAX44000_CFG_RX_ALSTIM_SHIFT); 179 } 180 181 static int max44000_read_alspga(struct max44000_data *data) 182 { 183 unsigned int val; 184 int ret; 185 186 ret = regmap_read(data->regmap, MAX44000_REG_CFG_RX, &val); 187 if (ret < 0) 188 return ret; 189 return (val & MAX44000_CFG_RX_ALSPGA_MASK) >> MAX44000_CFG_RX_ALSPGA_SHIFT; 190 } 191 192 static int max44000_write_alspga(struct max44000_data *data, int val) 193 { 194 return regmap_write_bits(data->regmap, MAX44000_REG_CFG_RX, 195 MAX44000_CFG_RX_ALSPGA_MASK, 196 val << MAX44000_CFG_RX_ALSPGA_SHIFT); 197 } 198 199 static int max44000_read_alsval(struct max44000_data *data) 200 { 201 u16 regval; 202 __be16 val; 203 int alstim, ret; 204 205 ret = regmap_bulk_read(data->regmap, MAX44000_REG_ALS_DATA_HI, 206 &val, sizeof(val)); 207 if (ret < 0) 208 return ret; 209 alstim = ret = max44000_read_alstim(data); 210 if (ret < 0) 211 return ret; 212 213 regval = be16_to_cpu(val); 214 215 /* 216 * Overflow is explained on datasheet page 17. 217 * 218 * It's a warning that either the G or IR channel has become saturated 219 * and that the value in the register is likely incorrect. 220 * 221 * The recommendation is to change the scale (ALSPGA). 222 * The driver just returns the max representable value. 223 */ 224 if (regval & MAX44000_ALSDATA_OVERFLOW) 225 return 0x3FFF; 226 227 return regval << MAX44000_ALSTIM_SHIFT(alstim); 228 } 229 230 static int max44000_write_led_current_raw(struct max44000_data *data, int val) 231 { 232 /* Maybe we should clamp the value instead? */ 233 if (val < 0 || val > MAX44000_LED_CURRENT_MAX) 234 return -ERANGE; 235 if (val >= 8) 236 val += 4; 237 return regmap_write_bits(data->regmap, MAX44000_REG_CFG_TX, 238 MAX44000_LED_CURRENT_MASK, val); 239 } 240 241 static int max44000_read_led_current_raw(struct max44000_data *data) 242 { 243 unsigned int regval; 244 int ret; 245 246 ret = regmap_read(data->regmap, MAX44000_REG_CFG_TX, ®val); 247 if (ret < 0) 248 return ret; 249 regval &= MAX44000_LED_CURRENT_MASK; 250 if (regval >= 8) 251 regval -= 4; 252 return regval; 253 } 254 255 static int max44000_read_raw(struct iio_dev *indio_dev, 256 struct iio_chan_spec const *chan, 257 int *val, int *val2, long mask) 258 { 259 struct max44000_data *data = iio_priv(indio_dev); 260 int alstim, alspga; 261 unsigned int regval; 262 int ret; 263 264 switch (mask) { 265 case IIO_CHAN_INFO_RAW: 266 switch (chan->type) { 267 case IIO_LIGHT: 268 mutex_lock(&data->lock); 269 ret = max44000_read_alsval(data); 270 mutex_unlock(&data->lock); 271 if (ret < 0) 272 return ret; 273 *val = ret; 274 return IIO_VAL_INT; 275 276 case IIO_PROXIMITY: 277 mutex_lock(&data->lock); 278 ret = regmap_read(data->regmap, MAX44000_REG_PRX_DATA, ®val); 279 mutex_unlock(&data->lock); 280 if (ret < 0) 281 return ret; 282 *val = regval; 283 return IIO_VAL_INT; 284 285 case IIO_CURRENT: 286 mutex_lock(&data->lock); 287 ret = max44000_read_led_current_raw(data); 288 mutex_unlock(&data->lock); 289 if (ret < 0) 290 return ret; 291 *val = ret; 292 return IIO_VAL_INT; 293 294 default: 295 return -EINVAL; 296 } 297 298 case IIO_CHAN_INFO_SCALE: 299 switch (chan->type) { 300 case IIO_CURRENT: 301 /* Output register is in 10s of miliamps */ 302 *val = 10; 303 return IIO_VAL_INT; 304 305 case IIO_LIGHT: 306 mutex_lock(&data->lock); 307 alspga = ret = max44000_read_alspga(data); 308 mutex_unlock(&data->lock); 309 if (ret < 0) 310 return ret; 311 312 /* Avoid negative shifts */ 313 *val = (1 << MAX44000_ALSPGA_MAX_SHIFT); 314 *val2 = MAX44000_ALS_TO_LUX_DEFAULT_FRACTION_LOG2 315 + MAX44000_ALSPGA_MAX_SHIFT 316 - max44000_alspga_shift[alspga]; 317 return IIO_VAL_FRACTIONAL_LOG2; 318 319 default: 320 return -EINVAL; 321 } 322 323 case IIO_CHAN_INFO_INT_TIME: 324 mutex_lock(&data->lock); 325 alstim = ret = max44000_read_alstim(data); 326 mutex_unlock(&data->lock); 327 328 if (ret < 0) 329 return ret; 330 *val = 0; 331 *val2 = max44000_int_time_avail_ns_array[alstim]; 332 return IIO_VAL_INT_PLUS_NANO; 333 334 default: 335 return -EINVAL; 336 } 337 } 338 339 static int max44000_write_raw(struct iio_dev *indio_dev, 340 struct iio_chan_spec const *chan, 341 int val, int val2, long mask) 342 { 343 struct max44000_data *data = iio_priv(indio_dev); 344 int ret; 345 346 if (mask == IIO_CHAN_INFO_RAW && chan->type == IIO_CURRENT) { 347 mutex_lock(&data->lock); 348 ret = max44000_write_led_current_raw(data, val); 349 mutex_unlock(&data->lock); 350 return ret; 351 } else if (mask == IIO_CHAN_INFO_INT_TIME && chan->type == IIO_LIGHT) { 352 s64 valns = val * NSEC_PER_SEC + val2; 353 int alstim = find_closest_descending(valns, 354 max44000_int_time_avail_ns_array, 355 ARRAY_SIZE(max44000_int_time_avail_ns_array)); 356 mutex_lock(&data->lock); 357 ret = max44000_write_alstim(data, alstim); 358 mutex_unlock(&data->lock); 359 return ret; 360 } else if (mask == IIO_CHAN_INFO_SCALE && chan->type == IIO_LIGHT) { 361 s64 valus = val * USEC_PER_SEC + val2; 362 int alspga = find_closest(valus, 363 max44000_scale_avail_ulux_array, 364 ARRAY_SIZE(max44000_scale_avail_ulux_array)); 365 mutex_lock(&data->lock); 366 ret = max44000_write_alspga(data, alspga); 367 mutex_unlock(&data->lock); 368 return ret; 369 } 370 371 return -EINVAL; 372 } 373 374 static int max44000_write_raw_get_fmt(struct iio_dev *indio_dev, 375 struct iio_chan_spec const *chan, 376 long mask) 377 { 378 if (mask == IIO_CHAN_INFO_INT_TIME && chan->type == IIO_LIGHT) 379 return IIO_VAL_INT_PLUS_NANO; 380 else if (mask == IIO_CHAN_INFO_SCALE && chan->type == IIO_LIGHT) 381 return IIO_VAL_INT_PLUS_MICRO; 382 else 383 return IIO_VAL_INT; 384 } 385 386 static IIO_CONST_ATTR(illuminance_integration_time_available, max44000_int_time_avail_str); 387 static IIO_CONST_ATTR(illuminance_scale_available, max44000_scale_avail_str); 388 389 static struct attribute *max44000_attributes[] = { 390 &iio_const_attr_illuminance_integration_time_available.dev_attr.attr, 391 &iio_const_attr_illuminance_scale_available.dev_attr.attr, 392 NULL 393 }; 394 395 static const struct attribute_group max44000_attribute_group = { 396 .attrs = max44000_attributes, 397 }; 398 399 static const struct iio_info max44000_info = { 400 .read_raw = max44000_read_raw, 401 .write_raw = max44000_write_raw, 402 .write_raw_get_fmt = max44000_write_raw_get_fmt, 403 .attrs = &max44000_attribute_group, 404 }; 405 406 static bool max44000_readable_reg(struct device *dev, unsigned int reg) 407 { 408 switch (reg) { 409 case MAX44000_REG_STATUS: 410 case MAX44000_REG_CFG_MAIN: 411 case MAX44000_REG_CFG_RX: 412 case MAX44000_REG_CFG_TX: 413 case MAX44000_REG_ALS_DATA_HI: 414 case MAX44000_REG_ALS_DATA_LO: 415 case MAX44000_REG_PRX_DATA: 416 case MAX44000_REG_ALS_UPTHR_HI: 417 case MAX44000_REG_ALS_UPTHR_LO: 418 case MAX44000_REG_ALS_LOTHR_HI: 419 case MAX44000_REG_ALS_LOTHR_LO: 420 case MAX44000_REG_PST: 421 case MAX44000_REG_PRX_IND: 422 case MAX44000_REG_PRX_THR: 423 case MAX44000_REG_TRIM_GAIN_GREEN: 424 case MAX44000_REG_TRIM_GAIN_IR: 425 return true; 426 default: 427 return false; 428 } 429 } 430 431 static bool max44000_writeable_reg(struct device *dev, unsigned int reg) 432 { 433 switch (reg) { 434 case MAX44000_REG_CFG_MAIN: 435 case MAX44000_REG_CFG_RX: 436 case MAX44000_REG_CFG_TX: 437 case MAX44000_REG_ALS_UPTHR_HI: 438 case MAX44000_REG_ALS_UPTHR_LO: 439 case MAX44000_REG_ALS_LOTHR_HI: 440 case MAX44000_REG_ALS_LOTHR_LO: 441 case MAX44000_REG_PST: 442 case MAX44000_REG_PRX_IND: 443 case MAX44000_REG_PRX_THR: 444 case MAX44000_REG_TRIM_GAIN_GREEN: 445 case MAX44000_REG_TRIM_GAIN_IR: 446 return true; 447 default: 448 return false; 449 } 450 } 451 452 static bool max44000_volatile_reg(struct device *dev, unsigned int reg) 453 { 454 switch (reg) { 455 case MAX44000_REG_STATUS: 456 case MAX44000_REG_ALS_DATA_HI: 457 case MAX44000_REG_ALS_DATA_LO: 458 case MAX44000_REG_PRX_DATA: 459 return true; 460 default: 461 return false; 462 } 463 } 464 465 static bool max44000_precious_reg(struct device *dev, unsigned int reg) 466 { 467 return reg == MAX44000_REG_STATUS; 468 } 469 470 static const struct regmap_config max44000_regmap_config = { 471 .reg_bits = 8, 472 .val_bits = 8, 473 474 .max_register = MAX44000_REG_PRX_DATA, 475 .readable_reg = max44000_readable_reg, 476 .writeable_reg = max44000_writeable_reg, 477 .volatile_reg = max44000_volatile_reg, 478 .precious_reg = max44000_precious_reg, 479 480 .use_single_read = true, 481 .use_single_write = true, 482 .cache_type = REGCACHE_RBTREE, 483 }; 484 485 static irqreturn_t max44000_trigger_handler(int irq, void *p) 486 { 487 struct iio_poll_func *pf = p; 488 struct iio_dev *indio_dev = pf->indio_dev; 489 struct max44000_data *data = iio_priv(indio_dev); 490 int index = 0; 491 unsigned int regval; 492 int ret; 493 struct { 494 u16 channels[2]; 495 aligned_s64 ts; 496 } scan = { }; 497 498 499 mutex_lock(&data->lock); 500 if (test_bit(MAX44000_SCAN_INDEX_ALS, indio_dev->active_scan_mask)) { 501 ret = max44000_read_alsval(data); 502 if (ret < 0) 503 goto out_unlock; 504 scan.channels[index++] = ret; 505 } 506 if (test_bit(MAX44000_SCAN_INDEX_PRX, indio_dev->active_scan_mask)) { 507 ret = regmap_read(data->regmap, MAX44000_REG_PRX_DATA, ®val); 508 if (ret < 0) 509 goto out_unlock; 510 scan.channels[index] = regval; 511 } 512 mutex_unlock(&data->lock); 513 514 iio_push_to_buffers_with_ts(indio_dev, &scan, sizeof(scan), 515 iio_get_time_ns(indio_dev)); 516 iio_trigger_notify_done(indio_dev->trig); 517 return IRQ_HANDLED; 518 519 out_unlock: 520 mutex_unlock(&data->lock); 521 iio_trigger_notify_done(indio_dev->trig); 522 return IRQ_HANDLED; 523 } 524 525 static int max44000_probe(struct i2c_client *client) 526 { 527 struct max44000_data *data; 528 struct iio_dev *indio_dev; 529 int ret, reg; 530 531 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 532 if (!indio_dev) 533 return -ENOMEM; 534 data = iio_priv(indio_dev); 535 data->regmap = devm_regmap_init_i2c(client, &max44000_regmap_config); 536 if (IS_ERR(data->regmap)) { 537 dev_err(&client->dev, "regmap_init failed!\n"); 538 return PTR_ERR(data->regmap); 539 } 540 541 mutex_init(&data->lock); 542 indio_dev->info = &max44000_info; 543 indio_dev->name = MAX44000_DRV_NAME; 544 indio_dev->channels = max44000_channels; 545 indio_dev->num_channels = ARRAY_SIZE(max44000_channels); 546 547 /* 548 * The device doesn't have a reset function so we just clear some 549 * important bits at probe time to ensure sane operation. 550 * 551 * Since we don't support interrupts/events the threshold values are 552 * not important. We also don't touch trim values. 553 */ 554 555 /* Reset ALS scaling bits */ 556 ret = regmap_write(data->regmap, MAX44000_REG_CFG_RX, 557 MAX44000_REG_CFG_RX_DEFAULT); 558 if (ret < 0) { 559 dev_err(&client->dev, "failed to write default CFG_RX: %d\n", 560 ret); 561 return ret; 562 } 563 564 /* 565 * By default the LED pulse used for the proximity sensor is disabled. 566 * Set a middle value so that we get some sort of valid data by default. 567 */ 568 ret = max44000_write_led_current_raw(data, MAX44000_LED_CURRENT_DEFAULT); 569 if (ret < 0) { 570 dev_err(&client->dev, "failed to write init config: %d\n", ret); 571 return ret; 572 } 573 574 /* Reset CFG bits to ALS_PRX mode which allows easy reading of both values. */ 575 reg = MAX44000_CFG_TRIM | MAX44000_CFG_MODE_ALS_PRX; 576 ret = regmap_write(data->regmap, MAX44000_REG_CFG_MAIN, reg); 577 if (ret < 0) { 578 dev_err(&client->dev, "failed to write init config: %d\n", ret); 579 return ret; 580 } 581 582 /* Read status at least once to clear any stale interrupt bits. */ 583 ret = regmap_read(data->regmap, MAX44000_REG_STATUS, ®); 584 if (ret < 0) { 585 dev_err(&client->dev, "failed to read init status: %d\n", ret); 586 return ret; 587 } 588 589 ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev, NULL, 590 max44000_trigger_handler, NULL); 591 if (ret < 0) { 592 dev_err(&client->dev, "iio triggered buffer setup failed\n"); 593 return ret; 594 } 595 596 return devm_iio_device_register(&client->dev, indio_dev); 597 } 598 599 static const struct i2c_device_id max44000_id[] = { 600 { .name = "max44000" }, 601 { } 602 }; 603 MODULE_DEVICE_TABLE(i2c, max44000_id); 604 605 static const struct acpi_device_id max44000_acpi_match[] = { 606 {"MAX44000", 0}, 607 { } 608 }; 609 MODULE_DEVICE_TABLE(acpi, max44000_acpi_match); 610 611 static struct i2c_driver max44000_driver = { 612 .driver = { 613 .name = MAX44000_DRV_NAME, 614 .acpi_match_table = max44000_acpi_match, 615 }, 616 .probe = max44000_probe, 617 .id_table = max44000_id, 618 }; 619 620 module_i2c_driver(max44000_driver); 621 622 MODULE_AUTHOR("Crestez Dan Leonard <leonard.crestez@intel.com>"); 623 MODULE_DESCRIPTION("MAX44000 Ambient and Infrared Proximity Sensor"); 624 MODULE_LICENSE("GPL v2"); 625