1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Serial Port driver for Open Firmware platform devices 4 * 5 * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp. 6 */ 7 8 #include <linux/bits.h> 9 #include <linux/console.h> 10 #include <linux/math.h> 11 #include <linux/module.h> 12 #include <linux/slab.h> 13 #include <linux/serial_core.h> 14 #include <linux/serial_reg.h> 15 #include <linux/of_address.h> 16 #include <linux/of_irq.h> 17 #include <linux/of_platform.h> 18 #include <linux/pm_runtime.h> 19 #include <linux/clk.h> 20 #include <linux/reset.h> 21 #include <linux/notifier.h> 22 23 #include "8250.h" 24 25 struct of_serial_info { 26 struct clk *clk; 27 struct clk *bus_clk; 28 struct reset_control *rst; 29 int type; 30 int line; 31 struct notifier_block clk_notifier; 32 }; 33 34 /* Nuvoton NPCM timeout register */ 35 #define UART_NPCM_TOR 7 36 #define UART_NPCM_TOIE BIT(7) /* Timeout Interrupt Enable */ 37 38 static int npcm_startup(struct uart_port *port) 39 { 40 /* 41 * Nuvoton calls the scratch register 'UART_TOR' (timeout 42 * register). Enable it, and set TIOC (timeout interrupt 43 * comparator) to be 0x20 for correct operation. 44 */ 45 serial_port_out(port, UART_NPCM_TOR, UART_NPCM_TOIE | 0x20); 46 47 return serial8250_do_startup(port); 48 } 49 50 /* Nuvoton NPCM UARTs have a custom divisor calculation */ 51 static unsigned int npcm_get_divisor(struct uart_port *port, unsigned int baud, 52 unsigned int *frac) 53 { 54 return DIV_ROUND_CLOSEST(port->uartclk, 16 * baud + 2) - 2; 55 } 56 57 static int npcm_setup(struct uart_port *port) 58 { 59 port->get_divisor = npcm_get_divisor; 60 port->startup = npcm_startup; 61 return 0; 62 } 63 64 static inline struct of_serial_info *clk_nb_to_info(struct notifier_block *nb) 65 { 66 return container_of(nb, struct of_serial_info, clk_notifier); 67 } 68 69 static int of_platform_serial_clk_notifier_cb(struct notifier_block *nb, unsigned long event, 70 void *data) 71 { 72 struct of_serial_info *info = clk_nb_to_info(nb); 73 struct uart_8250_port *port8250 = serial8250_get_port(info->line); 74 struct clk_notifier_data *ndata = data; 75 76 if (event == POST_RATE_CHANGE) { 77 serial8250_update_uartclk(&port8250->port, ndata->new_rate); 78 return NOTIFY_OK; 79 } 80 81 return NOTIFY_DONE; 82 } 83 84 static int lpc32xx_handle_irq(struct uart_port *port) 85 { 86 struct uart_8250_port *up = up_to_u8250p(port); 87 unsigned int iir; 88 u16 status; 89 90 guard(serial8250_rpm)(up); 91 92 iir = serial_port_in(port, UART_IIR); 93 if (iir & UART_IIR_NO_INT) 94 return 0; 95 96 guard(uart_port_lock_check_sysrq_irqsave)(port); 97 98 /* 99 * The LPC32xx UART can assert an RX character-timeout interrupt while 100 * the RX FIFO is empty: IIR reports UART_IIR_RX_TIMEOUT but LSR.DR is 101 * clear. The timeout is only cleared by reading RHR, but the core RX 102 * path skips that read when the FIFO is empty, so the level-triggered 103 * IRQ re-fires forever and livelocks this single-core SoC. Do one 104 * throwaway RHR read to clear it; a healthy UART never reports a 105 * timeout with DR/BI clear, so no received data is ever discarded. 106 */ 107 if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT) { 108 status = serial_lsr_in(up); 109 if (!(status & (UART_LSR_DR | UART_LSR_BI))) 110 serial_port_in(port, UART_RX); 111 } 112 113 serial8250_handle_irq_locked(port, iir); 114 115 return 1; 116 } 117 118 /* 119 * Fill a struct uart_port for a given device node 120 */ 121 static int of_platform_serial_setup(struct platform_device *ofdev, 122 int type, struct uart_8250_port *up, 123 struct of_serial_info *info) 124 { 125 struct resource resource; 126 struct device *dev = &ofdev->dev; 127 struct device_node *np = dev->of_node; 128 struct uart_port *port = &up->port; 129 u32 spd; 130 int ret; 131 132 memset(port, 0, sizeof(*port)); 133 134 pm_runtime_enable(&ofdev->dev); 135 pm_runtime_get_sync(&ofdev->dev); 136 137 ret = of_address_to_resource(np, 0, &resource); 138 if (ret) { 139 dev_err_probe(dev, ret, "invalid address\n"); 140 goto err_pmruntime; 141 } 142 143 port->dev = &ofdev->dev; 144 port->flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_FIXED_TYPE; 145 spin_lock_init(&port->lock); 146 147 if (resource_type(&resource) == IORESOURCE_IO) { 148 port->iobase = resource.start; 149 } else { 150 port->mapbase = resource.start; 151 port->mapsize = resource_size(&resource); 152 port->flags |= UPF_IOREMAP; 153 } 154 155 ret = uart_read_and_validate_port_properties(port); 156 if (ret) 157 goto err_pmruntime; 158 159 /* Get clk rate through clk driver if present */ 160 if (!port->uartclk) { 161 struct clk *bus_clk; 162 163 bus_clk = devm_clk_get_optional_enabled(dev, "bus"); 164 if (IS_ERR(bus_clk)) { 165 ret = dev_err_probe(dev, PTR_ERR(bus_clk), "failed to get bus clock\n"); 166 goto err_pmruntime; 167 } 168 169 /* If the bus clock is required, core clock must be named */ 170 info->clk = devm_clk_get_enabled(dev, bus_clk ? "core" : NULL); 171 if (IS_ERR(info->clk)) { 172 ret = dev_err_probe(dev, PTR_ERR(info->clk), "failed to get clock\n"); 173 goto err_pmruntime; 174 } 175 176 info->bus_clk = bus_clk; 177 port->uartclk = clk_get_rate(info->clk); 178 } 179 /* If current-speed was set, then try not to change it. */ 180 if (of_property_read_u32(np, "current-speed", &spd) == 0) 181 port->custom_divisor = port->uartclk / (16 * spd); 182 183 /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */ 184 if (of_device_is_compatible(np, "mrvl,mmp-uart")) 185 port->regshift = 2; 186 187 info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL); 188 if (IS_ERR(info->rst)) { 189 ret = PTR_ERR(info->rst); 190 goto err_pmruntime; 191 } 192 193 ret = reset_control_deassert(info->rst); 194 if (ret) 195 goto err_pmruntime; 196 197 port->type = type; 198 port->rs485_config = serial8250_em485_config; 199 port->rs485_supported = serial8250_em485_supported; 200 up->rs485_start_tx = serial8250_em485_start_tx; 201 up->rs485_stop_tx = serial8250_em485_stop_tx; 202 203 switch (type) { 204 case PORT_RT2880: 205 ret = rt288x_setup(port); 206 break; 207 case PORT_NPCM: 208 ret = npcm_setup(port); 209 break; 210 case PORT_LPC3220: 211 port->handle_irq = lpc32xx_handle_irq; 212 break; 213 default: 214 /* Nothing to do */ 215 ret = 0; 216 break; 217 } 218 if (ret) 219 goto err_pmruntime; 220 221 if (IS_REACHABLE(CONFIG_SERIAL_8250_FSL) && 222 (of_device_is_compatible(np, "fsl,ns16550") || 223 of_device_is_compatible(np, "fsl,16550-FIFO64"))) { 224 port->handle_irq = fsl8250_handle_irq; 225 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE); 226 } 227 228 return 0; 229 err_pmruntime: 230 pm_runtime_put_sync(&ofdev->dev); 231 pm_runtime_disable(&ofdev->dev); 232 return ret; 233 } 234 235 /* 236 * Try to register a serial port 237 */ 238 static int of_platform_serial_probe(struct platform_device *ofdev) 239 { 240 struct of_serial_info *info; 241 struct uart_8250_port port8250; 242 unsigned int port_type; 243 u32 tx_threshold; 244 int ret; 245 246 if (IS_ENABLED(CONFIG_SERIAL_8250_BCM7271) && 247 of_device_is_compatible(ofdev->dev.of_node, "brcm,bcm7271-uart")) 248 return -ENODEV; 249 250 port_type = (unsigned long)of_device_get_match_data(&ofdev->dev); 251 if (port_type == PORT_UNKNOWN) 252 return -EINVAL; 253 254 if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas")) 255 return -EBUSY; 256 257 info = kzalloc_obj(*info); 258 if (info == NULL) 259 return -ENOMEM; 260 261 memset(&port8250, 0, sizeof(port8250)); 262 ret = of_platform_serial_setup(ofdev, port_type, &port8250, info); 263 if (ret) 264 goto err_free; 265 266 if (port8250.port.fifosize) 267 port8250.capabilities = UART_CAP_FIFO; 268 269 /* Check for TX FIFO threshold & set tx_loadsz */ 270 if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold", 271 &tx_threshold) == 0) && 272 (tx_threshold < port8250.port.fifosize)) 273 port8250.tx_loadsz = port8250.port.fifosize - tx_threshold; 274 275 if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control")) 276 port8250.capabilities |= UART_CAP_AFE; 277 278 if (of_property_read_u32(ofdev->dev.of_node, 279 "overrun-throttle-ms", 280 &port8250.overrun_backoff_time_ms) != 0) 281 port8250.overrun_backoff_time_ms = 0; 282 283 ret = serial8250_register_8250_port(&port8250); 284 if (ret < 0) 285 goto err_dispose; 286 287 info->type = port_type; 288 info->line = ret; 289 platform_set_drvdata(ofdev, info); 290 291 if (info->clk) { 292 info->clk_notifier.notifier_call = of_platform_serial_clk_notifier_cb; 293 ret = clk_notifier_register(info->clk, &info->clk_notifier); 294 if (ret) { 295 dev_err_probe(port8250.port.dev, ret, "Failed to set the clock notifier\n"); 296 goto err_unregister; 297 } 298 } 299 300 return 0; 301 err_unregister: 302 serial8250_unregister_port(info->line); 303 err_dispose: 304 pm_runtime_put_sync(&ofdev->dev); 305 pm_runtime_disable(&ofdev->dev); 306 err_free: 307 kfree(info); 308 return ret; 309 } 310 311 /* 312 * Release a line 313 */ 314 static void of_platform_serial_remove(struct platform_device *ofdev) 315 { 316 struct of_serial_info *info = platform_get_drvdata(ofdev); 317 318 if (info->clk) 319 clk_notifier_unregister(info->clk, &info->clk_notifier); 320 321 serial8250_unregister_port(info->line); 322 323 reset_control_assert(info->rst); 324 pm_runtime_put_sync(&ofdev->dev); 325 pm_runtime_disable(&ofdev->dev); 326 kfree(info); 327 } 328 329 #ifdef CONFIG_PM_SLEEP 330 static int of_serial_suspend(struct device *dev) 331 { 332 struct of_serial_info *info = dev_get_drvdata(dev); 333 struct uart_8250_port *port8250 = serial8250_get_port(info->line); 334 struct uart_port *port = &port8250->port; 335 336 serial8250_suspend_port(info->line); 337 338 if (!uart_console(port) || console_suspend_enabled) { 339 pm_runtime_put_sync(dev); 340 clk_disable_unprepare(info->clk); 341 clk_disable_unprepare(info->bus_clk); 342 } 343 return 0; 344 } 345 346 static int of_serial_resume(struct device *dev) 347 { 348 struct of_serial_info *info = dev_get_drvdata(dev); 349 struct uart_8250_port *port8250 = serial8250_get_port(info->line); 350 struct uart_port *port = &port8250->port; 351 352 if (!uart_console(port) || console_suspend_enabled) { 353 pm_runtime_get_sync(dev); 354 clk_prepare_enable(info->bus_clk); 355 clk_prepare_enable(info->clk); 356 } 357 358 serial8250_resume_port(info->line); 359 360 return 0; 361 } 362 #endif 363 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume); 364 365 /* 366 * A few common types, add more as needed. 367 */ 368 static const struct of_device_id of_platform_serial_table[] = { 369 { .compatible = "ns8250", .data = (void *)PORT_8250, }, 370 { .compatible = "ns16450", .data = (void *)PORT_16450, }, 371 { .compatible = "ns16550a", .data = (void *)PORT_16550A, }, 372 { .compatible = "ns16550", .data = (void *)PORT_16550, }, 373 { .compatible = "ns16750", .data = (void *)PORT_16750, }, 374 { .compatible = "ns16850", .data = (void *)PORT_16850, }, 375 { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, }, 376 { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, }, 377 { .compatible = "intel,xscale-uart", .data = (void *)PORT_XSCALE, }, 378 { .compatible = "altr,16550-FIFO32", 379 .data = (void *)PORT_ALTR_16550_F32, }, 380 { .compatible = "altr,16550-FIFO64", 381 .data = (void *)PORT_ALTR_16550_F64, }, 382 { .compatible = "altr,16550-FIFO128", 383 .data = (void *)PORT_ALTR_16550_F128, }, 384 { .compatible = "fsl,16550-FIFO64", 385 .data = (void *)PORT_16550A_FSL64, }, 386 { .compatible = "mediatek,mtk-btif", 387 .data = (void *)PORT_MTK_BTIF, }, 388 { .compatible = "mrvl,mmp-uart", 389 .data = (void *)PORT_XSCALE, }, 390 { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, }, 391 { .compatible = "nuvoton,wpcm450-uart", .data = (void *)PORT_NPCM, }, 392 { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, }, 393 { /* end of list */ }, 394 }; 395 MODULE_DEVICE_TABLE(of, of_platform_serial_table); 396 397 static struct platform_driver of_platform_serial_driver = { 398 .driver = { 399 .name = "of_serial", 400 .of_match_table = of_platform_serial_table, 401 .pm = &of_serial_pm_ops, 402 }, 403 .probe = of_platform_serial_probe, 404 .remove = of_platform_serial_remove, 405 }; 406 407 module_platform_driver(of_platform_serial_driver); 408 409 MODULE_IMPORT_NS("SERIAL_8250"); 410 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>"); 411 MODULE_LICENSE("GPL"); 412 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices"); 413