1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * CS4270 ALSA SoC (ASoC) codec driver 4 * 5 * Author: Timur Tabi <timur@freescale.com> 6 * 7 * Copyright 2007-2009 Freescale Semiconductor, Inc. 8 * 9 * This is an ASoC device driver for the Cirrus Logic CS4270 codec. 10 * 11 * Current features/limitations: 12 * 13 * - Software mode is supported. Stand-alone mode is not supported. 14 * - Only I2C is supported, not SPI 15 * - Support for master and slave mode 16 * - The machine driver's 'startup' function must call 17 * cs4270_set_dai_sysclk() with the value of MCLK. 18 * - Only I2S and left-justified modes are supported 19 * - Power management is supported 20 */ 21 22 #include <linux/module.h> 23 #include <linux/slab.h> 24 #include <sound/core.h> 25 #include <sound/soc.h> 26 #include <sound/initval.h> 27 #include <linux/i2c.h> 28 #include <linux/delay.h> 29 #include <linux/regulator/consumer.h> 30 #include <linux/gpio/consumer.h> 31 32 #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \ 33 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 34 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE) 35 36 /* CS4270 registers addresses */ 37 #define CS4270_CHIPID 0x01 /* Chip ID */ 38 #define CS4270_PWRCTL 0x02 /* Power Control */ 39 #define CS4270_MODE 0x03 /* Mode Control */ 40 #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */ 41 #define CS4270_TRANS 0x05 /* Transition Control */ 42 #define CS4270_MUTE 0x06 /* Mute Control */ 43 #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */ 44 #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */ 45 46 #define CS4270_FIRSTREG 0x01 47 #define CS4270_LASTREG 0x08 48 #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1) 49 #define CS4270_I2C_INCR 0x80 50 51 /* Bit masks for the CS4270 registers */ 52 #define CS4270_CHIPID_ID 0xF0 53 #define CS4270_CHIPID_REV 0x0F 54 #define CS4270_PWRCTL_FREEZE 0x80 55 #define CS4270_PWRCTL_PDN_ADC 0x20 56 #define CS4270_PWRCTL_PDN_DAC 0x02 57 #define CS4270_PWRCTL_PDN 0x01 58 #define CS4270_PWRCTL_PDN_ALL \ 59 (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN) 60 #define CS4270_MODE_SPEED_MASK 0x30 61 #define CS4270_MODE_1X 0x00 62 #define CS4270_MODE_2X 0x10 63 #define CS4270_MODE_4X 0x20 64 #define CS4270_MODE_SLAVE 0x30 65 #define CS4270_MODE_DIV_MASK 0x0E 66 #define CS4270_MODE_DIV1 0x00 67 #define CS4270_MODE_DIV15 0x02 68 #define CS4270_MODE_DIV2 0x04 69 #define CS4270_MODE_DIV3 0x06 70 #define CS4270_MODE_DIV4 0x08 71 #define CS4270_MODE_POPGUARD 0x01 72 #define CS4270_FORMAT_FREEZE_A 0x80 73 #define CS4270_FORMAT_FREEZE_B 0x40 74 #define CS4270_FORMAT_LOOPBACK 0x20 75 #define CS4270_FORMAT_DAC_MASK 0x18 76 #define CS4270_FORMAT_DAC_LJ 0x00 77 #define CS4270_FORMAT_DAC_I2S 0x08 78 #define CS4270_FORMAT_DAC_RJ16 0x18 79 #define CS4270_FORMAT_DAC_RJ24 0x10 80 #define CS4270_FORMAT_ADC_MASK 0x01 81 #define CS4270_FORMAT_ADC_LJ 0x00 82 #define CS4270_FORMAT_ADC_I2S 0x01 83 #define CS4270_TRANS_ONE_VOL 0x80 84 #define CS4270_TRANS_SOFT 0x40 85 #define CS4270_TRANS_ZERO 0x20 86 #define CS4270_TRANS_INV_ADC_A 0x08 87 #define CS4270_TRANS_INV_ADC_B 0x10 88 #define CS4270_TRANS_INV_DAC_A 0x02 89 #define CS4270_TRANS_INV_DAC_B 0x04 90 #define CS4270_TRANS_DEEMPH 0x01 91 #define CS4270_MUTE_AUTO 0x20 92 #define CS4270_MUTE_ADC_A 0x08 93 #define CS4270_MUTE_ADC_B 0x10 94 #define CS4270_MUTE_POLARITY 0x04 95 #define CS4270_MUTE_DAC_A 0x01 96 #define CS4270_MUTE_DAC_B 0x02 97 98 /* Power-on default values for the registers 99 * 100 * This array contains the power-on default values of the registers, with the 101 * exception of the "CHIPID" register (01h). The lower four bits of that 102 * register contain the hardware revision, so it is treated as volatile. 103 */ 104 static const struct reg_default cs4270_reg_defaults[] = { 105 { 2, 0x00 }, 106 { 3, 0x30 }, 107 { 4, 0x00 }, 108 { 5, 0x60 }, 109 { 6, 0x20 }, 110 { 7, 0x00 }, 111 { 8, 0x00 }, 112 }; 113 114 static const char *supply_names[] = { 115 "va", "vd", "vlc" 116 }; 117 118 /* Private data for the CS4270 */ 119 struct cs4270_private { 120 struct regmap *regmap; 121 unsigned int mclk; /* Input frequency of the MCLK pin */ 122 unsigned int mode; /* The mode (I2S or left-justified) */ 123 unsigned int slave_mode; 124 unsigned int manual_mute; 125 126 /* power domain regulators */ 127 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)]; 128 129 /* reset gpio */ 130 struct gpio_desc *reset_gpio; 131 }; 132 133 static const struct snd_soc_dapm_widget cs4270_dapm_widgets[] = { 134 SND_SOC_DAPM_INPUT("AINL"), 135 SND_SOC_DAPM_INPUT("AINR"), 136 137 SND_SOC_DAPM_OUTPUT("AOUTL"), 138 SND_SOC_DAPM_OUTPUT("AOUTR"), 139 }; 140 141 static const struct snd_soc_dapm_route cs4270_dapm_routes[] = { 142 { "Capture", NULL, "AINL" }, 143 { "Capture", NULL, "AINR" }, 144 145 { "AOUTL", NULL, "Playback" }, 146 { "AOUTR", NULL, "Playback" }, 147 }; 148 149 /** 150 * struct cs4270_mode_ratios - clock ratio tables 151 * @ratio: the ratio of MCLK to the sample rate 152 * @speed_mode: the Speed Mode bits to set in the Mode Control register for 153 * this ratio 154 * @mclk: the Ratio Select bits to set in the Mode Control register for this 155 * ratio 156 * 157 * The data for this chart is taken from Table 5 of the CS4270 reference 158 * manual. 159 * 160 * This table is used to determine how to program the Mode Control register. 161 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling 162 * rates the CS4270 currently supports. 163 * 164 * @speed_mode is the corresponding bit pattern to be written to the 165 * MODE bits of the Mode Control Register 166 * 167 * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of 168 * the Mode Control Register. 169 * 170 * In situations where a single ratio is represented by multiple speed 171 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick 172 * double-speed instead of quad-speed. However, the CS4270 errata states 173 * that divide-By-1.5 can cause failures, so we avoid that mode where 174 * possible. 175 * 176 * Errata: There is an errata for the CS4270 where divide-by-1.5 does not 177 * work if Vd is 3.3V. If this effects you, select the 178 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will 179 * never select any sample rates that require divide-by-1.5. 180 */ 181 struct cs4270_mode_ratios { 182 unsigned int ratio; 183 u8 speed_mode; 184 u8 mclk; 185 }; 186 187 static struct cs4270_mode_ratios cs4270_mode_ratios[] = { 188 {64, CS4270_MODE_4X, CS4270_MODE_DIV1}, 189 #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA 190 {96, CS4270_MODE_4X, CS4270_MODE_DIV15}, 191 #endif 192 {128, CS4270_MODE_2X, CS4270_MODE_DIV1}, 193 {192, CS4270_MODE_4X, CS4270_MODE_DIV3}, 194 {256, CS4270_MODE_1X, CS4270_MODE_DIV1}, 195 {384, CS4270_MODE_2X, CS4270_MODE_DIV3}, 196 {512, CS4270_MODE_1X, CS4270_MODE_DIV2}, 197 {768, CS4270_MODE_1X, CS4270_MODE_DIV3}, 198 {1024, CS4270_MODE_1X, CS4270_MODE_DIV4} 199 }; 200 201 /* The number of MCLK/LRCK ratios supported by the CS4270 */ 202 #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios) 203 204 static bool cs4270_reg_is_readable(struct device *dev, unsigned int reg) 205 { 206 return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG); 207 } 208 209 static bool cs4270_reg_is_volatile(struct device *dev, unsigned int reg) 210 { 211 /* Unreadable registers are considered volatile */ 212 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) 213 return true; 214 215 return reg == CS4270_CHIPID; 216 } 217 218 /** 219 * cs4270_set_dai_sysclk - determine the CS4270 samples rates. 220 * @codec_dai: the codec DAI 221 * @clk_id: the clock ID (ignored) 222 * @freq: the MCLK input frequency 223 * @dir: the clock direction (ignored) 224 * 225 * This function is used to tell the codec driver what the input MCLK 226 * frequency is. 227 * 228 * The value of MCLK is used to determine which sample rates are supported 229 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine 230 * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024. 231 * 232 * This function calculates the nine ratios and determines which ones match 233 * a standard sample rate. If there's a match, then it is added to the list 234 * of supported sample rates. 235 * 236 * This function must be called by the machine driver's 'startup' function, 237 * otherwise the list of supported sample rates will not be available in 238 * time for ALSA. 239 * 240 * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause 241 * theoretically possible sample rates to be enabled. Call it again with a 242 * proper value set one the external clock is set (most probably you would do 243 * that from a machine's driver 'hw_param' hook. 244 */ 245 static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai, 246 int clk_id, unsigned int freq, int dir) 247 { 248 struct snd_soc_component *component = codec_dai->component; 249 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 250 251 cs4270->mclk = freq; 252 return 0; 253 } 254 255 /** 256 * cs4270_set_dai_fmt - configure the codec for the selected audio format 257 * @codec_dai: the codec DAI 258 * @format: a SND_SOC_DAIFMT_x value indicating the data format 259 * 260 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the 261 * codec accordingly. 262 * 263 * Currently, this function only supports SND_SOC_DAIFMT_I2S and 264 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified 265 * data for playback only, but ASoC currently does not support different 266 * formats for playback vs. record. 267 */ 268 static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai, 269 unsigned int format) 270 { 271 struct snd_soc_component *component = codec_dai->component; 272 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 273 274 /* set DAI format */ 275 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { 276 case SND_SOC_DAIFMT_I2S: 277 case SND_SOC_DAIFMT_LEFT_J: 278 cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK; 279 break; 280 default: 281 dev_err(component->dev, "invalid dai format\n"); 282 return -EINVAL; 283 } 284 285 /* set master/slave audio interface */ 286 switch (format & SND_SOC_DAIFMT_MASTER_MASK) { 287 case SND_SOC_DAIFMT_CBC_CFC: 288 cs4270->slave_mode = 1; 289 break; 290 case SND_SOC_DAIFMT_CBP_CFP: 291 cs4270->slave_mode = 0; 292 break; 293 default: 294 /* all other modes are unsupported by the hardware */ 295 dev_err(component->dev, "Unknown master/slave configuration\n"); 296 return -EINVAL; 297 } 298 299 return 0; 300 } 301 302 /** 303 * cs4270_hw_params - program the CS4270 with the given hardware parameters. 304 * @substream: the audio stream 305 * @params: the hardware parameters to set 306 * @dai: the SOC DAI (ignored) 307 * 308 * This function programs the hardware with the values provided. 309 * Specifically, the sample rate and the data format. 310 * 311 * The .ops functions are used to provide board-specific data, like input 312 * frequencies, to this driver. This function takes that information, 313 * combines it with the hardware parameters provided, and programs the 314 * hardware accordingly. 315 */ 316 static int cs4270_hw_params(struct snd_pcm_substream *substream, 317 struct snd_pcm_hw_params *params, 318 struct snd_soc_dai *dai) 319 { 320 struct snd_soc_component *component = dai->component; 321 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 322 int ret; 323 unsigned int i; 324 unsigned int rate; 325 unsigned int ratio; 326 int reg; 327 328 /* Figure out which MCLK/LRCK ratio to use */ 329 330 rate = params_rate(params); /* Sampling rate, in Hz */ 331 ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */ 332 333 for (i = 0; i < NUM_MCLK_RATIOS; i++) { 334 if (cs4270_mode_ratios[i].ratio == ratio) 335 break; 336 } 337 338 if (i == NUM_MCLK_RATIOS) { 339 /* We did not find a matching ratio */ 340 dev_err(component->dev, "could not find matching ratio\n"); 341 return -EINVAL; 342 } 343 344 /* Set the sample rate */ 345 346 reg = snd_soc_component_read(component, CS4270_MODE); 347 reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK); 348 reg |= cs4270_mode_ratios[i].mclk; 349 350 if (cs4270->slave_mode) 351 reg |= CS4270_MODE_SLAVE; 352 else 353 reg |= cs4270_mode_ratios[i].speed_mode; 354 355 ret = snd_soc_component_write(component, CS4270_MODE, reg); 356 if (ret < 0) { 357 dev_err(component->dev, "i2c write failed\n"); 358 return ret; 359 } 360 361 /* Set the DAI format */ 362 363 reg = snd_soc_component_read(component, CS4270_FORMAT); 364 reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK); 365 366 switch (cs4270->mode) { 367 case SND_SOC_DAIFMT_I2S: 368 reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S; 369 break; 370 case SND_SOC_DAIFMT_LEFT_J: 371 reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ; 372 break; 373 default: 374 dev_err(component->dev, "unknown dai format\n"); 375 return -EINVAL; 376 } 377 378 ret = snd_soc_component_write(component, CS4270_FORMAT, reg); 379 if (ret < 0) { 380 dev_err(component->dev, "i2c write failed\n"); 381 return ret; 382 } 383 384 return ret; 385 } 386 387 /** 388 * cs4270_dai_mute - enable/disable the CS4270 external mute 389 * @dai: the SOC DAI 390 * @mute: 0 = disable mute, 1 = enable mute 391 * @direction: (ignored) 392 * 393 * This function toggles the mute bits in the MUTE register. The CS4270's 394 * mute capability is intended for external muting circuitry, so if the 395 * board does not have the MUTEA or MUTEB pins connected to such circuitry, 396 * then this function will do nothing. 397 */ 398 static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute, int direction) 399 { 400 struct snd_soc_component *component = dai->component; 401 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 402 int reg6; 403 404 reg6 = snd_soc_component_read(component, CS4270_MUTE); 405 406 if (mute) 407 reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B; 408 else { 409 reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B); 410 reg6 |= cs4270->manual_mute; 411 } 412 413 return snd_soc_component_write(component, CS4270_MUTE, reg6); 414 } 415 416 /** 417 * cs4270_soc_put_mute - put callback for the 'Master Playback switch' 418 * alsa control. 419 * @kcontrol: mixer control 420 * @ucontrol: control element information 421 * 422 * This function basically passes the arguments on to the generic 423 * snd_soc_put_volsw() function and saves the mute information in 424 * our private data structure. This is because we want to prevent 425 * cs4270_dai_mute() neglecting the user's decision to manually 426 * mute the codec's output. 427 * 428 * Returns 0 for success. 429 */ 430 static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol, 431 struct snd_ctl_elem_value *ucontrol) 432 { 433 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 434 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 435 int left = !ucontrol->value.integer.value[0]; 436 int right = !ucontrol->value.integer.value[1]; 437 438 cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) | 439 (right ? CS4270_MUTE_DAC_B : 0); 440 441 return snd_soc_put_volsw(kcontrol, ucontrol); 442 } 443 444 /* A list of non-DAPM controls that the CS4270 supports */ 445 static const struct snd_kcontrol_new cs4270_snd_controls[] = { 446 SOC_DOUBLE_R("Master Playback Volume", 447 CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1), 448 SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0), 449 SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0), 450 SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0), 451 SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0), 452 SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1), 453 SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0), 454 SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1), 455 SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1, 456 snd_soc_get_volsw, cs4270_soc_put_mute), 457 }; 458 459 static const struct snd_soc_dai_ops cs4270_dai_ops = { 460 .hw_params = cs4270_hw_params, 461 .set_sysclk = cs4270_set_dai_sysclk, 462 .set_fmt = cs4270_set_dai_fmt, 463 .mute_stream = cs4270_dai_mute, 464 .no_capture_mute = 1, 465 }; 466 467 static struct snd_soc_dai_driver cs4270_dai = { 468 .name = "cs4270-hifi", 469 .playback = { 470 .stream_name = "Playback", 471 .channels_min = 2, 472 .channels_max = 2, 473 .rates = SNDRV_PCM_RATE_CONTINUOUS, 474 .rate_min = 4000, 475 .rate_max = 216000, 476 .formats = CS4270_FORMATS, 477 }, 478 .capture = { 479 .stream_name = "Capture", 480 .channels_min = 2, 481 .channels_max = 2, 482 .rates = SNDRV_PCM_RATE_CONTINUOUS, 483 .rate_min = 4000, 484 .rate_max = 216000, 485 .formats = CS4270_FORMATS, 486 }, 487 .ops = &cs4270_dai_ops, 488 }; 489 490 /** 491 * cs4270_probe - ASoC probe function 492 * @component: ASoC component 493 * 494 * This function is called when ASoC has all the pieces it needs to 495 * instantiate a sound driver. 496 */ 497 static int cs4270_probe(struct snd_soc_component *component) 498 { 499 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 500 int ret; 501 502 /* Disable auto-mute. This feature appears to be buggy. In some 503 * situations, auto-mute will not deactivate when it should, so we want 504 * this feature disabled by default. An application (e.g. alsactl) can 505 * re-enabled it by using the controls. 506 */ 507 ret = snd_soc_component_update_bits(component, CS4270_MUTE, CS4270_MUTE_AUTO, 0); 508 if (ret < 0) { 509 dev_err(component->dev, "i2c write failed\n"); 510 return ret; 511 } 512 513 /* Disable automatic volume control. The hardware enables, and it 514 * causes volume change commands to be delayed, sometimes until after 515 * playback has started. An application (e.g. alsactl) can 516 * re-enabled it by using the controls. 517 */ 518 ret = snd_soc_component_update_bits(component, CS4270_TRANS, 519 CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0); 520 if (ret < 0) { 521 dev_err(component->dev, "i2c write failed\n"); 522 return ret; 523 } 524 525 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies), 526 cs4270->supplies); 527 528 return ret; 529 } 530 531 /** 532 * cs4270_remove - ASoC remove function 533 * @component: ASoC component 534 * 535 * This function is the counterpart to cs4270_probe(). 536 */ 537 static void cs4270_remove(struct snd_soc_component *component) 538 { 539 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 540 541 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies); 542 }; 543 544 #ifdef CONFIG_PM 545 546 /* This suspend/resume implementation can handle both - a simple standby 547 * where the codec remains powered, and a full suspend, where the voltage 548 * domain the codec is connected to is teared down and/or any other hardware 549 * reset condition is asserted. 550 * 551 * The codec's own power saving features are enabled in the suspend callback, 552 * and all registers are written back to the hardware when resuming. 553 */ 554 555 static int cs4270_soc_suspend(struct snd_soc_component *component) 556 { 557 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 558 int reg, ret; 559 560 reg = snd_soc_component_read(component, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL; 561 if (reg < 0) 562 return reg; 563 564 ret = snd_soc_component_write(component, CS4270_PWRCTL, reg); 565 if (ret < 0) 566 return ret; 567 568 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), 569 cs4270->supplies); 570 571 return 0; 572 } 573 574 static int cs4270_soc_resume(struct snd_soc_component *component) 575 { 576 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 577 int reg, ret; 578 579 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies), 580 cs4270->supplies); 581 if (ret != 0) 582 return ret; 583 584 /* In case the device was put to hard reset during sleep, we need to 585 * wait 500ns here before any I2C communication. */ 586 ndelay(500); 587 588 /* first restore the entire register cache ... */ 589 regcache_sync(cs4270->regmap); 590 591 /* ... then disable the power-down bits */ 592 reg = snd_soc_component_read(component, CS4270_PWRCTL); 593 reg &= ~CS4270_PWRCTL_PDN_ALL; 594 595 return snd_soc_component_write(component, CS4270_PWRCTL, reg); 596 } 597 #else 598 #define cs4270_soc_suspend NULL 599 #define cs4270_soc_resume NULL 600 #endif /* CONFIG_PM */ 601 602 /* 603 * ASoC codec driver structure 604 */ 605 static const struct snd_soc_component_driver soc_component_device_cs4270 = { 606 .probe = cs4270_probe, 607 .remove = cs4270_remove, 608 .suspend = cs4270_soc_suspend, 609 .resume = cs4270_soc_resume, 610 .controls = cs4270_snd_controls, 611 .num_controls = ARRAY_SIZE(cs4270_snd_controls), 612 .dapm_widgets = cs4270_dapm_widgets, 613 .num_dapm_widgets = ARRAY_SIZE(cs4270_dapm_widgets), 614 .dapm_routes = cs4270_dapm_routes, 615 .num_dapm_routes = ARRAY_SIZE(cs4270_dapm_routes), 616 .idle_bias_on = 1, 617 .use_pmdown_time = 1, 618 .endianness = 1, 619 }; 620 621 /* 622 * cs4270_of_match - the device tree bindings 623 */ 624 static const struct of_device_id cs4270_of_match[] = { 625 { .compatible = "cirrus,cs4270", }, 626 { } 627 }; 628 MODULE_DEVICE_TABLE(of, cs4270_of_match); 629 630 static const struct regmap_config cs4270_regmap = { 631 .reg_bits = 8, 632 .val_bits = 8, 633 .max_register = CS4270_LASTREG, 634 .reg_defaults = cs4270_reg_defaults, 635 .num_reg_defaults = ARRAY_SIZE(cs4270_reg_defaults), 636 .cache_type = REGCACHE_MAPLE, 637 .write_flag_mask = CS4270_I2C_INCR, 638 639 .readable_reg = cs4270_reg_is_readable, 640 .volatile_reg = cs4270_reg_is_volatile, 641 }; 642 643 /** 644 * cs4270_i2c_remove - deinitialize the I2C interface of the CS4270 645 * @i2c_client: the I2C client object 646 * 647 * This function puts the chip into low power mode when the i2c device 648 * is removed. 649 */ 650 static void cs4270_i2c_remove(struct i2c_client *i2c_client) 651 { 652 struct cs4270_private *cs4270 = i2c_get_clientdata(i2c_client); 653 654 gpiod_set_value_cansleep(cs4270->reset_gpio, 0); 655 } 656 657 /** 658 * cs4270_i2c_probe - initialize the I2C interface of the CS4270 659 * @i2c_client: the I2C client object 660 * 661 * This function is called whenever the I2C subsystem finds a device that 662 * matches the device ID given via a prior call to i2c_add_driver(). 663 */ 664 static int cs4270_i2c_probe(struct i2c_client *i2c_client) 665 { 666 struct cs4270_private *cs4270; 667 unsigned int val; 668 int ret, i; 669 670 cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private), 671 GFP_KERNEL); 672 if (!cs4270) 673 return -ENOMEM; 674 675 /* get the power supply regulators */ 676 for (i = 0; i < ARRAY_SIZE(supply_names); i++) 677 cs4270->supplies[i].supply = supply_names[i]; 678 679 ret = devm_regulator_bulk_get(&i2c_client->dev, 680 ARRAY_SIZE(cs4270->supplies), 681 cs4270->supplies); 682 if (ret < 0) 683 return ret; 684 685 /* reset the device */ 686 cs4270->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev, "reset", 687 GPIOD_OUT_LOW); 688 if (IS_ERR(cs4270->reset_gpio)) { 689 dev_dbg(&i2c_client->dev, "Error getting CS4270 reset GPIO\n"); 690 return PTR_ERR(cs4270->reset_gpio); 691 } 692 693 if (cs4270->reset_gpio) { 694 dev_dbg(&i2c_client->dev, "Found reset GPIO\n"); 695 gpiod_set_value_cansleep(cs4270->reset_gpio, 1); 696 } 697 698 /* Sleep 500ns before i2c communications */ 699 ndelay(500); 700 701 cs4270->regmap = devm_regmap_init_i2c(i2c_client, &cs4270_regmap); 702 if (IS_ERR(cs4270->regmap)) 703 return PTR_ERR(cs4270->regmap); 704 705 /* Verify that we have a CS4270 */ 706 ret = regmap_read(cs4270->regmap, CS4270_CHIPID, &val); 707 if (ret < 0) { 708 dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n", 709 i2c_client->addr); 710 return ret; 711 } 712 /* The top four bits of the chip ID should be 1100. */ 713 if ((val & 0xF0) != 0xC0) { 714 dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n", 715 i2c_client->addr); 716 return -ENODEV; 717 } 718 719 dev_info(&i2c_client->dev, "found device at i2c address %X\n", 720 i2c_client->addr); 721 dev_info(&i2c_client->dev, "hardware revision %X\n", val & 0xF); 722 723 i2c_set_clientdata(i2c_client, cs4270); 724 725 ret = devm_snd_soc_register_component(&i2c_client->dev, 726 &soc_component_device_cs4270, &cs4270_dai, 1); 727 return ret; 728 } 729 730 /* 731 * cs4270_id - I2C device IDs supported by this driver 732 */ 733 static const struct i2c_device_id cs4270_id[] = { 734 { .name = "cs4270" }, 735 { } 736 }; 737 MODULE_DEVICE_TABLE(i2c, cs4270_id); 738 739 /* 740 * cs4270_i2c_driver - I2C device identification 741 * 742 * This structure tells the I2C subsystem how to identify and support a 743 * given I2C device type. 744 */ 745 static struct i2c_driver cs4270_i2c_driver = { 746 .driver = { 747 .name = "cs4270", 748 .of_match_table = cs4270_of_match, 749 }, 750 .id_table = cs4270_id, 751 .probe = cs4270_i2c_probe, 752 .remove = cs4270_i2c_remove, 753 }; 754 755 module_i2c_driver(cs4270_i2c_driver); 756 757 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>"); 758 MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver"); 759 MODULE_LICENSE("GPL"); 760