1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // rt711-sdw.c -- rt711 ALSA SoC audio driver 4 // 5 // Copyright(c) 2019 Realtek Semiconductor Corp. 6 // 7 // 8 9 #include <linux/delay.h> 10 #include <linux/device.h> 11 #include <linux/soundwire/sdw.h> 12 #include <linux/soundwire/sdw_type.h> 13 #include <linux/soundwire/sdw_registers.h> 14 #include <linux/module.h> 15 #include <linux/pm_runtime.h> 16 #include <linux/regmap.h> 17 #include <sound/soc.h> 18 #include "rt711.h" 19 #include "rt711-sdw.h" 20 21 static bool rt711_readable_register(struct device *dev, unsigned int reg) 22 { 23 switch (reg) { 24 case 0x00e0: 25 case 0x00f0: 26 case 0x2012 ... 0x2016: 27 case 0x201a ... 0x2027: 28 case 0x2029 ... 0x202a: 29 case 0x202d ... 0x2034: 30 case 0x2201 ... 0x2204: 31 case 0x2206 ... 0x2212: 32 case 0x2220 ... 0x2223: 33 case 0x2230 ... 0x2239: 34 case 0x2f01 ... 0x2f0f: 35 case 0x3000 ... 0x3fff: 36 case 0x7000 ... 0x7fff: 37 case 0x8300 ... 0x83ff: 38 case 0x9c00 ... 0x9cff: 39 case 0xb900 ... 0xb9ff: 40 case 0x752008: 41 case 0x752009: 42 case 0x75200b: 43 case 0x752011: 44 case 0x75201a: 45 case 0x752045: 46 case 0x752046: 47 case 0x752048: 48 case 0x75204a: 49 case 0x75206b: 50 case 0x75206f: 51 case 0x752080: 52 case 0x752081: 53 case 0x752091: 54 case 0x755800: 55 return true; 56 default: 57 return false; 58 } 59 } 60 61 static bool rt711_volatile_register(struct device *dev, unsigned int reg) 62 { 63 switch (reg) { 64 case 0x2016: 65 case 0x201b: 66 case 0x201c: 67 case 0x201d: 68 case 0x201f: 69 case 0x2021: 70 case 0x2023: 71 case 0x2230: 72 case 0x2012 ... 0x2015: /* HD-A read */ 73 case 0x202d ... 0x202f: /* BRA */ 74 case 0x2201 ... 0x2212: /* i2c debug */ 75 case 0x2220 ... 0x2223: /* decoded HD-A */ 76 case 0x9c00 ... 0x9cff: 77 case 0xb900 ... 0xb9ff: 78 case 0xff01: 79 case 0x75201a: 80 case 0x752046: 81 case 0x752080: 82 case 0x752081: 83 case 0x755800: 84 return true; 85 default: 86 return false; 87 } 88 } 89 90 static int rt711_sdw_read(void *context, unsigned int reg, unsigned int *val) 91 { 92 struct device *dev = context; 93 struct rt711_priv *rt711 = dev_get_drvdata(dev); 94 unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0; 95 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; 96 unsigned int is_hda_reg = 1, is_index_reg = 0; 97 int ret; 98 99 if (reg > 0xffff) 100 is_index_reg = 1; 101 102 mask = reg & 0xf000; 103 104 if (is_index_reg) { /* index registers */ 105 val2 = reg & 0xff; 106 reg = reg >> 8; 107 nid = reg & 0xff; 108 ret = regmap_write(rt711->sdw_regmap, reg, 0); 109 if (ret < 0) 110 return ret; 111 reg2 = reg + 0x1000; 112 reg2 |= 0x80; 113 ret = regmap_write(rt711->sdw_regmap, reg2, val2); 114 if (ret < 0) 115 return ret; 116 117 reg3 = RT711_PRIV_DATA_R_H | nid; 118 ret = regmap_write(rt711->sdw_regmap, 119 reg3, ((*val >> 8) & 0xff)); 120 if (ret < 0) 121 return ret; 122 reg4 = reg3 + 0x1000; 123 reg4 |= 0x80; 124 ret = regmap_write(rt711->sdw_regmap, reg4, (*val & 0xff)); 125 if (ret < 0) 126 return ret; 127 } else if (mask == 0x3000) { 128 reg += 0x8000; 129 ret = regmap_write(rt711->sdw_regmap, reg, *val); 130 if (ret < 0) 131 return ret; 132 } else if (mask == 0x7000) { 133 reg += 0x2000; 134 reg |= 0x800; 135 ret = regmap_write(rt711->sdw_regmap, 136 reg, ((*val >> 8) & 0xff)); 137 if (ret < 0) 138 return ret; 139 reg2 = reg + 0x1000; 140 reg2 |= 0x80; 141 ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff)); 142 if (ret < 0) 143 return ret; 144 } else if ((reg & 0xff00) == 0x8300) { /* for R channel */ 145 reg2 = reg - 0x1000; 146 reg2 &= ~0x80; 147 ret = regmap_write(rt711->sdw_regmap, 148 reg2, ((*val >> 8) & 0xff)); 149 if (ret < 0) 150 return ret; 151 ret = regmap_write(rt711->sdw_regmap, reg, (*val & 0xff)); 152 if (ret < 0) 153 return ret; 154 } else if (mask == 0x9000) { 155 ret = regmap_write(rt711->sdw_regmap, 156 reg, ((*val >> 8) & 0xff)); 157 if (ret < 0) 158 return ret; 159 reg2 = reg + 0x1000; 160 reg2 |= 0x80; 161 ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff)); 162 if (ret < 0) 163 return ret; 164 } else if (mask == 0xb000) { 165 ret = regmap_write(rt711->sdw_regmap, reg, *val); 166 if (ret < 0) 167 return ret; 168 } else { 169 ret = regmap_read(rt711->sdw_regmap, reg, val); 170 if (ret < 0) 171 return ret; 172 is_hda_reg = 0; 173 } 174 175 if (is_hda_reg || is_index_reg) { 176 sdw_data_3 = 0; 177 sdw_data_2 = 0; 178 sdw_data_1 = 0; 179 sdw_data_0 = 0; 180 ret = regmap_read(rt711->sdw_regmap, 181 RT711_READ_HDA_3, &sdw_data_3); 182 if (ret < 0) 183 return ret; 184 ret = regmap_read(rt711->sdw_regmap, 185 RT711_READ_HDA_2, &sdw_data_2); 186 if (ret < 0) 187 return ret; 188 ret = regmap_read(rt711->sdw_regmap, 189 RT711_READ_HDA_1, &sdw_data_1); 190 if (ret < 0) 191 return ret; 192 ret = regmap_read(rt711->sdw_regmap, 193 RT711_READ_HDA_0, &sdw_data_0); 194 if (ret < 0) 195 return ret; 196 *val = ((sdw_data_3 & 0xff) << 24) | 197 ((sdw_data_2 & 0xff) << 16) | 198 ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff); 199 } 200 201 if (is_hda_reg == 0) 202 dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val); 203 else if (is_index_reg) 204 dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n", 205 __func__, reg, reg2, reg3, reg4, *val); 206 else 207 dev_dbg(dev, "[%s] %04x %04x => %08x\n", 208 __func__, reg, reg2, *val); 209 210 return 0; 211 } 212 213 static int rt711_sdw_write(void *context, unsigned int reg, unsigned int val) 214 { 215 struct device *dev = context; 216 struct rt711_priv *rt711 = dev_get_drvdata(dev); 217 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; 218 unsigned int is_index_reg = 0; 219 int ret; 220 221 if (reg > 0xffff) 222 is_index_reg = 1; 223 224 mask = reg & 0xf000; 225 226 if (is_index_reg) { /* index registers */ 227 val2 = reg & 0xff; 228 reg = reg >> 8; 229 nid = reg & 0xff; 230 ret = regmap_write(rt711->sdw_regmap, reg, 0); 231 if (ret < 0) 232 return ret; 233 reg2 = reg + 0x1000; 234 reg2 |= 0x80; 235 ret = regmap_write(rt711->sdw_regmap, reg2, val2); 236 if (ret < 0) 237 return ret; 238 239 reg3 = RT711_PRIV_DATA_W_H | nid; 240 ret = regmap_write(rt711->sdw_regmap, 241 reg3, ((val >> 8) & 0xff)); 242 if (ret < 0) 243 return ret; 244 reg4 = reg3 + 0x1000; 245 reg4 |= 0x80; 246 ret = regmap_write(rt711->sdw_regmap, reg4, (val & 0xff)); 247 if (ret < 0) 248 return ret; 249 is_index_reg = 1; 250 } else if (reg < 0x4fff) { 251 ret = regmap_write(rt711->sdw_regmap, reg, val); 252 if (ret < 0) 253 return ret; 254 } else if (reg == RT711_FUNC_RESET) { 255 ret = regmap_write(rt711->sdw_regmap, reg, val); 256 if (ret < 0) 257 return ret; 258 } else if (mask == 0x7000) { 259 ret = regmap_write(rt711->sdw_regmap, 260 reg, ((val >> 8) & 0xff)); 261 if (ret < 0) 262 return ret; 263 reg2 = reg + 0x1000; 264 reg2 |= 0x80; 265 ret = regmap_write(rt711->sdw_regmap, reg2, (val & 0xff)); 266 if (ret < 0) 267 return ret; 268 } else if ((reg & 0xff00) == 0x8300) { /* for R channel */ 269 reg2 = reg - 0x1000; 270 reg2 &= ~0x80; 271 ret = regmap_write(rt711->sdw_regmap, 272 reg2, ((val >> 8) & 0xff)); 273 if (ret < 0) 274 return ret; 275 ret = regmap_write(rt711->sdw_regmap, reg, (val & 0xff)); 276 if (ret < 0) 277 return ret; 278 } 279 280 if (reg2 == 0) 281 dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); 282 else if (is_index_reg) 283 dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n", 284 __func__, reg, reg2, reg3, reg4, val2, val); 285 else 286 dev_dbg(dev, "[%s] %04x %04x <= %04x\n", 287 __func__, reg, reg2, val); 288 289 return 0; 290 } 291 292 static const struct regmap_config rt711_regmap = { 293 .reg_bits = 24, 294 .val_bits = 32, 295 .readable_reg = rt711_readable_register, 296 .volatile_reg = rt711_volatile_register, 297 .max_register = 0x755800, 298 .reg_defaults = rt711_reg_defaults, 299 .num_reg_defaults = ARRAY_SIZE(rt711_reg_defaults), 300 .cache_type = REGCACHE_MAPLE, 301 .use_single_read = true, 302 .use_single_write = true, 303 .reg_read = rt711_sdw_read, 304 .reg_write = rt711_sdw_write, 305 }; 306 307 static const struct regmap_config rt711_sdw_regmap = { 308 .name = "sdw", 309 .reg_bits = 32, 310 .val_bits = 8, 311 .readable_reg = rt711_readable_register, 312 .max_register = 0xff01, 313 .cache_type = REGCACHE_NONE, 314 .use_single_read = true, 315 .use_single_write = true, 316 }; 317 318 static int rt711_update_status(struct sdw_slave *slave, 319 enum sdw_slave_status status) 320 { 321 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev); 322 323 if (status == SDW_SLAVE_UNATTACHED) 324 rt711->hw_init = false; 325 326 /* 327 * Perform initialization only if slave status is present and 328 * hw_init flag is false 329 */ 330 if (rt711->hw_init || status != SDW_SLAVE_ATTACHED) 331 return 0; 332 333 /* perform I/O transfers required for Slave initialization */ 334 return rt711_io_init(&slave->dev, slave); 335 } 336 337 static int rt711_read_prop(struct sdw_slave *slave) 338 { 339 struct sdw_slave_prop *prop = &slave->prop; 340 int nval; 341 int i, j; 342 u32 bit; 343 unsigned long addr; 344 struct sdw_dpn_prop *dpn; 345 346 prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH | 347 SDW_SCP_INT1_PARITY; 348 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 349 350 prop->paging_support = false; 351 352 /* first we need to allocate memory for set bits in port lists */ 353 prop->source_ports = 0x14; /* BITMAP: 00010100 */ 354 prop->sink_ports = 0x8; /* BITMAP: 00001000 */ 355 356 nval = hweight32(prop->source_ports); 357 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 358 sizeof(*prop->src_dpn_prop), 359 GFP_KERNEL); 360 if (!prop->src_dpn_prop) 361 return -ENOMEM; 362 363 i = 0; 364 dpn = prop->src_dpn_prop; 365 addr = prop->source_ports; 366 for_each_set_bit(bit, &addr, 32) { 367 dpn[i].num = bit; 368 dpn[i].type = SDW_DPN_FULL; 369 dpn[i].simple_ch_prep_sm = true; 370 dpn[i].ch_prep_timeout = 10; 371 i++; 372 } 373 374 /* do this again for sink now */ 375 nval = hweight32(prop->sink_ports); 376 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 377 sizeof(*prop->sink_dpn_prop), 378 GFP_KERNEL); 379 if (!prop->sink_dpn_prop) 380 return -ENOMEM; 381 382 j = 0; 383 dpn = prop->sink_dpn_prop; 384 addr = prop->sink_ports; 385 for_each_set_bit(bit, &addr, 32) { 386 dpn[j].num = bit; 387 dpn[j].type = SDW_DPN_FULL; 388 dpn[j].simple_ch_prep_sm = true; 389 dpn[j].ch_prep_timeout = 10; 390 j++; 391 } 392 393 /* set the timeout values */ 394 prop->clk_stop_timeout = 20; 395 396 /* wake-up event */ 397 prop->wake_capable = 1; 398 399 return 0; 400 } 401 402 static int rt711_bus_config(struct sdw_slave *slave, 403 struct sdw_bus_params *params) 404 { 405 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev); 406 int ret; 407 408 memcpy(&rt711->params, params, sizeof(*params)); 409 410 ret = rt711_clock_config(&slave->dev); 411 if (ret < 0) 412 dev_err(&slave->dev, "%s: Invalid clk config", __func__); 413 414 return ret; 415 } 416 417 static int rt711_interrupt_callback(struct sdw_slave *slave, 418 struct sdw_slave_intr_status *status) 419 { 420 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev); 421 422 dev_dbg(&slave->dev, 423 "%s control_port_stat=%x", __func__, status->control_port); 424 425 mutex_lock(&rt711->disable_irq_lock); 426 if (status->control_port & 0x4 && !rt711->disable_irq) { 427 mod_delayed_work(system_power_efficient_wq, 428 &rt711->jack_detect_work, msecs_to_jiffies(250)); 429 } 430 mutex_unlock(&rt711->disable_irq_lock); 431 432 return 0; 433 } 434 435 static const struct sdw_slave_ops rt711_slave_ops = { 436 .read_prop = rt711_read_prop, 437 .interrupt_callback = rt711_interrupt_callback, 438 .update_status = rt711_update_status, 439 .bus_config = rt711_bus_config, 440 }; 441 442 static int rt711_sdw_probe(struct sdw_slave *slave, 443 const struct sdw_device_id *id) 444 { 445 struct regmap *sdw_regmap, *regmap; 446 447 /* Regmap Initialization */ 448 sdw_regmap = devm_regmap_init_sdw(slave, &rt711_sdw_regmap); 449 if (IS_ERR(sdw_regmap)) 450 return PTR_ERR(sdw_regmap); 451 452 regmap = devm_regmap_init(&slave->dev, NULL, 453 &slave->dev, &rt711_regmap); 454 if (IS_ERR(regmap)) 455 return PTR_ERR(regmap); 456 457 return rt711_init(&slave->dev, sdw_regmap, regmap, slave); 458 } 459 460 static void rt711_sdw_remove(struct sdw_slave *slave) 461 { 462 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev); 463 464 if (rt711->hw_init) { 465 cancel_delayed_work_sync(&rt711->jack_detect_work); 466 cancel_delayed_work_sync(&rt711->jack_btn_check_work); 467 cancel_work_sync(&rt711->calibration_work); 468 } 469 470 pm_runtime_disable(&slave->dev); 471 472 mutex_destroy(&rt711->calibrate_mutex); 473 mutex_destroy(&rt711->disable_irq_lock); 474 } 475 476 static const struct sdw_device_id rt711_id[] = { 477 SDW_SLAVE_ENTRY_EXT(0x025d, 0x711, 0x2, 0, 0), 478 {}, 479 }; 480 MODULE_DEVICE_TABLE(sdw, rt711_id); 481 482 static int rt711_dev_suspend(struct device *dev) 483 { 484 struct rt711_priv *rt711 = dev_get_drvdata(dev); 485 486 if (!rt711->hw_init) 487 return 0; 488 489 cancel_delayed_work_sync(&rt711->jack_detect_work); 490 cancel_delayed_work_sync(&rt711->jack_btn_check_work); 491 cancel_work_sync(&rt711->calibration_work); 492 493 regcache_cache_only(rt711->regmap, true); 494 495 return 0; 496 } 497 498 static int rt711_dev_system_suspend(struct device *dev) 499 { 500 struct rt711_priv *rt711 = dev_get_drvdata(dev); 501 struct sdw_slave *slave = dev_to_sdw_dev(dev); 502 int ret; 503 504 if (!rt711->hw_init) 505 return 0; 506 507 /* 508 * prevent new interrupts from being handled after the 509 * deferred work completes and before the parent disables 510 * interrupts on the link 511 */ 512 mutex_lock(&rt711->disable_irq_lock); 513 rt711->disable_irq = true; 514 ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, 515 SDW_SCP_INT1_IMPL_DEF, 0); 516 mutex_unlock(&rt711->disable_irq_lock); 517 518 if (ret < 0) { 519 /* log but don't prevent suspend from happening */ 520 dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__); 521 } 522 523 return rt711_dev_suspend(dev); 524 } 525 526 #define RT711_PROBE_TIMEOUT 5000 527 528 static int rt711_dev_resume(struct device *dev) 529 { 530 struct sdw_slave *slave = dev_to_sdw_dev(dev); 531 struct rt711_priv *rt711 = dev_get_drvdata(dev); 532 int ret; 533 534 if (!rt711->first_hw_init) 535 return 0; 536 537 if (!slave->unattach_request) { 538 mutex_lock(&rt711->disable_irq_lock); 539 if (rt711->disable_irq == true) { 540 sdw_write_no_pm(slave, SDW_SCP_INTMASK1, SDW_SCP_INT1_IMPL_DEF); 541 rt711->disable_irq = false; 542 } 543 mutex_unlock(&rt711->disable_irq_lock); 544 } 545 546 ret = sdw_slave_wait_for_init(slave, RT711_PROBE_TIMEOUT); 547 if (ret) 548 return ret; 549 550 regcache_cache_only(rt711->regmap, false); 551 regcache_sync_region(rt711->regmap, 0x3000, 0x8fff); 552 regcache_sync_region(rt711->regmap, 0x752009, 0x752091); 553 554 return 0; 555 } 556 557 static const struct dev_pm_ops rt711_pm = { 558 SYSTEM_SLEEP_PM_OPS(rt711_dev_system_suspend, rt711_dev_resume) 559 RUNTIME_PM_OPS(rt711_dev_suspend, rt711_dev_resume, NULL) 560 }; 561 562 static struct sdw_driver rt711_sdw_driver = { 563 .driver = { 564 .name = "rt711", 565 .pm = pm_ptr(&rt711_pm), 566 }, 567 .probe = rt711_sdw_probe, 568 .remove = rt711_sdw_remove, 569 .ops = &rt711_slave_ops, 570 .id_table = rt711_id, 571 }; 572 module_sdw_driver(rt711_sdw_driver); 573 574 MODULE_DESCRIPTION("ASoC RT711 SDW driver"); 575 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>"); 576 MODULE_LICENSE("GPL"); 577