1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt722-sdca-sdw.c -- rt722 SDCA ALSA SoC audio driver 4 // 5 // Copyright(c) 2023 Realtek Semiconductor Corp. 6 // 7 // 8 9 #include <linux/delay.h> 10 #include <linux/device.h> 11 #include <linux/module.h> 12 #include <linux/pm_runtime.h> 13 #include <linux/soundwire/sdw_registers.h> 14 15 #include "rt722-sdca.h" 16 #include "rt722-sdca-sdw.h" 17 18 static int rt722_sdca_mbq_size(struct device *dev, unsigned int reg) 19 { 20 switch (reg) { 21 case 0x22f0 ... 0x22f1: 22 case 0x2f01 ... 0x2f0c: 23 case 0x2f21 ... 0x2f24: 24 case 0x2f35 ... 0x2f36: 25 case 0x2f50 ... 0x2f52: 26 case 0x2f54: 27 case 0x2f58 ... 0x2f5d: 28 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 29 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_SELECTED_MODE, 30 0): 31 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE, 32 0): 33 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU03, RT722_SDCA_CTL_SELECTED_MODE, 34 0): 35 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, 36 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 37 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, 38 RT722_SDCA_CTL_FU_MUTE, CH_R): 39 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU0D, 40 RT722_SDCA_CTL_SELECTED_MODE, 0): 41 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, 42 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 43 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, 44 RT722_SDCA_CTL_FU_MUTE, CH_R): 45 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, 46 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 47 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, 48 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 49 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, 50 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 51 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, 52 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 53 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01, 54 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 55 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11, 56 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 57 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, 58 RT722_SDCA_CTL_FU_MUTE, CH_01) ... 59 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, 60 RT722_SDCA_CTL_FU_MUTE, CH_04): 61 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26, 62 RT722_SDCA_CTL_VENDOR_DEF, 0): 63 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, 64 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 65 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, 66 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 67 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 68 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F, 69 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 70 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 71 RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ... 72 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 73 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0): 74 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, 75 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 76 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, 77 RT722_SDCA_CTL_FU_MUTE, CH_R): 78 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23, 79 RT722_SDCA_CTL_VENDOR_DEF, CH_08): 80 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, 81 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 82 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, 83 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 84 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 85 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31, 86 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 87 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2: 88 case 0x44011000 ... 0x440115ff: 89 case 0x44012000: 90 case 0x44012021: 91 case 0x44012022: 92 case 0x44012025: 93 case 0x44021000 ... 0x440211ff: 94 case 0x44022000: 95 case 0x44022019: 96 case 0x4402201a: 97 case 0x4402201d: 98 case 0x44041000 ... 0x440415ff: 99 case 0x44042000: 100 case 0x44042019: 101 case 0x4404201a: 102 case 0x4404201d: 103 return 1; 104 case 0x2000000 ... 0x2000024: 105 case 0x2000029 ... 0x200004a: 106 case 0x2000051 ... 0x2000052: 107 case 0x200005a ... 0x200005b: 108 case 0x2000061 ... 0x2000069: 109 case 0x200006b: 110 case 0x2000070: 111 case 0x200007f: 112 case 0x2000082 ... 0x200008e: 113 case 0x2000090 ... 0x2000094: 114 case 0x20000b1: 115 case 0x20000b4: 116 case 0x3110000: 117 case 0x5300000 ... 0x5300300: 118 case 0x5400002: 119 case 0x5600000 ... 0x5600007: 120 case 0x5700000 ... 0x5700004: 121 case 0x5800000 ... 0x5800004: 122 case 0x5810000: 123 case 0x5b00003: 124 case 0x5c00011: 125 case 0x5d00006: 126 case 0x5f00000 ... 0x5f0000d: 127 case 0x5f00030: 128 case 0x6100000 ... 0x6100051: 129 case 0x6100055 ... 0x6100057: 130 case 0x6100060: 131 case 0x6100062: 132 case 0x6100064 ... 0x6100065: 133 case 0x6100067: 134 case 0x6100070 ... 0x610007c: 135 case 0x6100080: 136 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, 137 CH_01) ... 138 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, 139 CH_04): 140 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 141 CH_01): 142 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 143 CH_02): 144 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 145 CH_03): 146 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 147 CH_04): 148 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_L): 149 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_R): 150 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME, 151 CH_L): 152 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME, 153 CH_R): 154 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME, 155 CH_L): 156 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME, 157 CH_R): 158 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, 159 RT722_SDCA_CTL_FU_CH_GAIN, CH_L): 160 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, 161 RT722_SDCA_CTL_FU_CH_GAIN, CH_R): 162 return 2; 163 default: 164 return 0; 165 } 166 } 167 168 static const struct regmap_sdw_mbq_cfg rt722_mbq_config = { 169 .mbq_size = rt722_sdca_mbq_size, 170 }; 171 172 static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg) 173 { 174 return rt722_sdca_mbq_size(dev, reg) > 0; 175 } 176 177 static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg) 178 { 179 switch (reg) { 180 case 0x2f01: 181 case 0x2f54: 182 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 183 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 184 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 185 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE, 186 0): 187 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 188 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 189 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 190 0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 191 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0): 192 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 193 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 194 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2: 195 case 0x2000000: 196 case 0x2000007: 197 case 0x200000d: 198 case 0x2000019: 199 case 0x2000020: 200 case 0x2000030: 201 case 0x2000046: 202 case 0x2000067: 203 case 0x2000084: 204 case 0x2000086: 205 case 0x3110000: 206 case 0x5800003: 207 case 0x5810000: 208 case 0x44011000 ... 0x440115ff: 209 case 0x44012000: 210 case 0x44012021: 211 case 0x44012022: 212 case 0x44012025: 213 case 0x44021000 ... 0x440211ff: 214 case 0x44022000: 215 case 0x44022019: 216 case 0x4402201a: 217 case 0x4402201d: 218 case 0x44041000 ... 0x440415ff: 219 case 0x44042000: 220 case 0x44042019: 221 case 0x4404201a: 222 case 0x4404201d: 223 return true; 224 default: 225 return false; 226 } 227 } 228 229 static const struct regmap_config rt722_sdca_regmap = { 230 .reg_bits = 32, 231 .val_bits = 16, 232 .readable_reg = rt722_sdca_readable_register, 233 .volatile_reg = rt722_sdca_volatile_register, 234 .max_register = 0x44ffffff, 235 .reg_defaults = rt722_sdca_reg_defaults, 236 .num_reg_defaults = ARRAY_SIZE(rt722_sdca_reg_defaults), 237 .cache_type = REGCACHE_MAPLE, 238 .use_single_read = true, 239 .use_single_write = true, 240 }; 241 242 static int rt722_sdca_update_status(struct sdw_slave *slave, 243 enum sdw_slave_status status) 244 { 245 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 246 247 if (status == SDW_SLAVE_UNATTACHED) 248 rt722->hw_init = false; 249 250 if (status == SDW_SLAVE_ATTACHED) { 251 if (rt722->hs_jack) { 252 /* 253 * Due to the SCP_SDCA_INTMASK will be cleared by any reset, and then 254 * if the device attached again, we will need to set the setting back. 255 * It could avoid losing the jack detection interrupt. 256 * This also could sync with the cache value as the rt722_sdca_jack_init set. 257 */ 258 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK1, 259 SDW_SCP_SDCA_INTMASK_SDCA_0); 260 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK2, 261 SDW_SCP_SDCA_INTMASK_SDCA_8); 262 } 263 } 264 265 /* 266 * Perform initialization only if slave status is present and 267 * hw_init flag is false 268 */ 269 if (rt722->hw_init || status != SDW_SLAVE_ATTACHED) 270 return 0; 271 272 /* perform I/O transfers required for Slave initialization */ 273 return rt722_sdca_io_init(&slave->dev, slave); 274 } 275 276 static int rt722_sdca_read_prop(struct sdw_slave *slave) 277 { 278 struct sdw_slave_prop *prop = &slave->prop; 279 int nval; 280 int i, j; 281 u32 bit; 282 unsigned long addr; 283 struct sdw_dpn_prop *dpn; 284 285 sdw_slave_read_lane_mapping(slave); 286 287 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; 288 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 289 290 prop->paging_support = true; 291 292 /* 293 * port = 1 for headphone playback 294 * port = 2 for headset-mic capture 295 * port = 3 for speaker playback 296 * port = 6 for digital-mic capture 297 */ 298 prop->source_ports = BIT(6) | BIT(2); /* BITMAP: 01000100 */ 299 prop->sink_ports = BIT(3) | BIT(1); /* BITMAP: 00001010 */ 300 301 nval = hweight32(prop->source_ports); 302 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 303 sizeof(*prop->src_dpn_prop), GFP_KERNEL); 304 if (!prop->src_dpn_prop) 305 return -ENOMEM; 306 307 i = 0; 308 dpn = prop->src_dpn_prop; 309 addr = prop->source_ports; 310 for_each_set_bit(bit, &addr, 32) { 311 dpn[i].num = bit; 312 dpn[i].type = SDW_DPN_FULL; 313 dpn[i].simple_ch_prep_sm = true; 314 dpn[i].ch_prep_timeout = 10; 315 i++; 316 } 317 318 /* do this again for sink now */ 319 nval = hweight32(prop->sink_ports); 320 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 321 sizeof(*prop->sink_dpn_prop), GFP_KERNEL); 322 if (!prop->sink_dpn_prop) 323 return -ENOMEM; 324 325 j = 0; 326 dpn = prop->sink_dpn_prop; 327 addr = prop->sink_ports; 328 for_each_set_bit(bit, &addr, 32) { 329 dpn[j].num = bit; 330 dpn[j].type = SDW_DPN_FULL; 331 dpn[j].simple_ch_prep_sm = true; 332 dpn[j].ch_prep_timeout = 10; 333 j++; 334 } 335 336 /* set the timeout values */ 337 prop->clk_stop_timeout = 900; 338 339 /* wake-up event */ 340 prop->wake_capable = 1; 341 342 /* Three data lanes are supported by rt722-sdca codec */ 343 prop->lane_control_support = true; 344 345 return 0; 346 } 347 348 static int rt722_sdca_interrupt_callback(struct sdw_slave *slave, 349 struct sdw_slave_intr_status *status) 350 { 351 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 352 int ret, stat; 353 int count = 0, retry = 3; 354 unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0; 355 356 if (cancel_delayed_work_sync(&rt722->jack_detect_work)) { 357 dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__); 358 /* avoid the HID owner doesn't change to device */ 359 if (rt722->scp_sdca_stat2) 360 scp_sdca_stat2 = rt722->scp_sdca_stat2; 361 } 362 363 /* 364 * The critical section below intentionally protects a rather large piece of code. 365 * We don't want to allow the system suspend to disable an interrupt while we are 366 * processing it, which could be problematic given the quirky SoundWire interrupt 367 * scheme. We do want however to prevent new workqueues from being scheduled if 368 * the disable_irq flag was set during system suspend. 369 */ 370 mutex_lock(&rt722->disable_irq_lock); 371 372 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 373 if (ret < 0) 374 goto io_error; 375 rt722->scp_sdca_stat1 = ret; 376 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 377 if (ret < 0) 378 goto io_error; 379 rt722->scp_sdca_stat2 = ret; 380 if (scp_sdca_stat2) 381 rt722->scp_sdca_stat2 |= scp_sdca_stat2; 382 do { 383 /* clear flag */ 384 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 385 if (ret < 0) 386 goto io_error; 387 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_0) { 388 ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1, 389 SDW_SCP_SDCA_INT_SDCA_0, SDW_SCP_SDCA_INT_SDCA_0); 390 if (ret < 0) 391 goto io_error; 392 } 393 394 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 395 if (ret < 0) 396 goto io_error; 397 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_8) { 398 ret = sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INT2, 399 SDW_SCP_SDCA_INTMASK_SDCA_8); 400 if (ret < 0) 401 goto io_error; 402 } 403 404 /* check if flag clear or not */ 405 ret = sdw_read_no_pm(rt722->slave, SDW_DP0_INT); 406 if (ret < 0) 407 goto io_error; 408 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 409 410 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 411 if (ret < 0) 412 goto io_error; 413 scp_sdca_stat1 = ret & SDW_SCP_SDCA_INTMASK_SDCA_0; 414 415 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 416 if (ret < 0) 417 goto io_error; 418 scp_sdca_stat2 = ret & SDW_SCP_SDCA_INTMASK_SDCA_8; 419 420 stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade; 421 422 count++; 423 } while (stat != 0 && count < retry); 424 425 if (stat) 426 dev_warn(&slave->dev, 427 "%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__, 428 rt722->scp_sdca_stat1, rt722->scp_sdca_stat2); 429 430 if (status->sdca_cascade && !rt722->disable_irq) 431 mod_delayed_work(system_power_efficient_wq, 432 &rt722->jack_detect_work, msecs_to_jiffies(280)); 433 434 mutex_unlock(&rt722->disable_irq_lock); 435 436 return 0; 437 438 io_error: 439 mutex_unlock(&rt722->disable_irq_lock); 440 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret); 441 return ret; 442 } 443 444 static const struct sdw_slave_ops rt722_sdca_slave_ops = { 445 .read_prop = rt722_sdca_read_prop, 446 .interrupt_callback = rt722_sdca_interrupt_callback, 447 .update_status = rt722_sdca_update_status, 448 }; 449 450 static int rt722_sdca_sdw_probe(struct sdw_slave *slave, 451 const struct sdw_device_id *id) 452 { 453 struct regmap *regmap; 454 455 /* Regmap Initialization */ 456 regmap = devm_regmap_init_sdw_mbq_cfg(&slave->dev, slave, 457 &rt722_sdca_regmap, 458 &rt722_mbq_config); 459 if (IS_ERR(regmap)) 460 return PTR_ERR(regmap); 461 462 return rt722_sdca_init(&slave->dev, regmap, slave); 463 } 464 465 static void rt722_sdca_sdw_remove(struct sdw_slave *slave) 466 { 467 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 468 469 if (rt722->hw_init) { 470 cancel_delayed_work_sync(&rt722->jack_detect_work); 471 cancel_delayed_work_sync(&rt722->jack_btn_check_work); 472 } 473 474 if (rt722->first_hw_init) 475 pm_runtime_disable(&slave->dev); 476 477 mutex_destroy(&rt722->calibrate_mutex); 478 mutex_destroy(&rt722->disable_irq_lock); 479 } 480 481 static const struct sdw_device_id rt722_sdca_id[] = { 482 SDW_SLAVE_ENTRY_EXT(0x025d, 0x722, 0x3, 0x1, 0), 483 {}, 484 }; 485 MODULE_DEVICE_TABLE(sdw, rt722_sdca_id); 486 487 static int rt722_sdca_dev_suspend(struct device *dev) 488 { 489 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev); 490 491 if (!rt722->hw_init) 492 return 0; 493 494 cancel_delayed_work_sync(&rt722->jack_detect_work); 495 cancel_delayed_work_sync(&rt722->jack_btn_check_work); 496 497 regcache_cache_only(rt722->regmap, true); 498 499 return 0; 500 } 501 502 static int rt722_sdca_dev_system_suspend(struct device *dev) 503 { 504 struct rt722_sdca_priv *rt722_sdca = dev_get_drvdata(dev); 505 struct sdw_slave *slave = dev_to_sdw_dev(dev); 506 int ret1, ret2; 507 508 if (!rt722_sdca->hw_init) 509 return 0; 510 511 /* 512 * prevent new interrupts from being handled after the 513 * deferred work completes and before the parent disables 514 * interrupts on the link 515 */ 516 mutex_lock(&rt722_sdca->disable_irq_lock); 517 rt722_sdca->disable_irq = true; 518 ret1 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK1, 519 SDW_SCP_SDCA_INTMASK_SDCA_0, 0); 520 ret2 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK2, 521 SDW_SCP_SDCA_INTMASK_SDCA_8, 0); 522 mutex_unlock(&rt722_sdca->disable_irq_lock); 523 524 if (ret1 < 0 || ret2 < 0) { 525 /* log but don't prevent suspend from happening */ 526 dev_dbg(&slave->dev, "%s: could not disable SDCA interrupts\n:", __func__); 527 } 528 529 return rt722_sdca_dev_suspend(dev); 530 } 531 532 #define RT722_PROBE_TIMEOUT 5000 533 534 static int rt722_sdca_dev_resume(struct device *dev) 535 { 536 struct sdw_slave *slave = dev_to_sdw_dev(dev); 537 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev); 538 int ret; 539 540 if (!rt722->first_hw_init) 541 return 0; 542 543 if (!slave->unattach_request) { 544 mutex_lock(&rt722->disable_irq_lock); 545 if (rt722->disable_irq == true) { 546 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_0); 547 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8); 548 rt722->disable_irq = false; 549 } 550 mutex_unlock(&rt722->disable_irq_lock); 551 } 552 553 ret = sdw_slave_wait_for_init(slave, RT722_PROBE_TIMEOUT); 554 if (ret) { 555 sdw_show_ping_status(slave->bus, true); 556 return ret; 557 } 558 559 regcache_cache_only(rt722->regmap, false); 560 regcache_sync(rt722->regmap); 561 return 0; 562 } 563 564 static const struct dev_pm_ops rt722_sdca_pm = { 565 SYSTEM_SLEEP_PM_OPS(rt722_sdca_dev_system_suspend, rt722_sdca_dev_resume) 566 RUNTIME_PM_OPS(rt722_sdca_dev_suspend, rt722_sdca_dev_resume, NULL) 567 }; 568 569 static struct sdw_driver rt722_sdca_sdw_driver = { 570 .driver = { 571 .name = "rt722-sdca", 572 .pm = pm_ptr(&rt722_sdca_pm), 573 }, 574 .probe = rt722_sdca_sdw_probe, 575 .remove = rt722_sdca_sdw_remove, 576 .ops = &rt722_sdca_slave_ops, 577 .id_table = rt722_sdca_id, 578 }; 579 module_sdw_driver(rt722_sdca_sdw_driver); 580 581 MODULE_DESCRIPTION("ASoC RT722 SDCA SDW driver"); 582 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>"); 583 MODULE_LICENSE("GPL"); 584