| 024771f3 | 11-Dec-2024 |
Aric Cyr <Aric.Cyr@amd.com> |
drm/amd/display: Optimize cursor position updates
[why]
Updating the cursor enablement register can be a slow operation and accumulates
when high polling rate cursors cause frequent updates asynchro
drm/amd/display: Optimize cursor position updates
[why]
Updating the cursor enablement register can be a slow operation and accumulates
when high polling rate cursors cause frequent updates asynchronously to the
cursor position.
[how]
Since the cursor enable bit is cached there is no need to update the
enablement register if there is no change to it. This removes the
read-modify-write from the cursor position programming path in HUBP and
DPP, leaving only the register writes.
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Sung Lee <sung.lee@amd.com>
Signed-off-by: Aric Cyr <Aric.Cyr@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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| ab799c16 | 26-Apr-2024 |
Alvin Lee <Alvin.Lee2@amd.com> |
drm/amd/display: For FAMS2 don't program P-State force from driver
P-State force programming is handled entirely by FW in FAMS2. Remove
any programming from driver side to prevent incorrect program
drm/amd/display: For FAMS2 don't program P-State force from driver
P-State force programming is handled entirely by FW in FAMS2. Remove
any programming from driver side to prevent incorrect programming from
driver side (which may override FW programming)
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
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