xref: /linux/drivers/clk/sunxi-ng/ccu_nkm.h (revision ee8287e068a3995b0f8001dd6931e221dfb7c530)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2016 Maxime Ripard. All rights reserved.
4  */
5 
6 #ifndef _CCU_NKM_H_
7 #define _CCU_NKM_H_
8 
9 #include <linux/clk-provider.h>
10 
11 #include "ccu_common.h"
12 #include "ccu_div.h"
13 #include "ccu_mult.h"
14 
15 /*
16  * struct ccu_nkm - Definition of an N-K-M clock
17  *
18  * Clocks based on the formula parent * N * K / M
19  */
20 struct ccu_nkm {
21 	u32			enable;
22 	u32			lock;
23 
24 	struct ccu_mult_internal	n;
25 	struct ccu_mult_internal	k;
26 	struct ccu_div_internal		m;
27 	struct ccu_mux_internal	mux;
28 
29 	unsigned int		fixed_post_div;
30 	unsigned long		max_m_n_ratio;
31 	unsigned long		min_parent_m_ratio;
32 
33 	struct ccu_common	common;
34 };
35 
36 #define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \
37 					 _nshift, _nwidth,		\
38 					 _kshift, _kwidth,		\
39 					 _mshift, _mwidth,		\
40 					 _muxshift, _muxwidth,		\
41 					 _gate, _lock, _flags)		\
42 	struct ccu_nkm _struct = {					\
43 		.enable		= _gate,				\
44 		.lock		= _lock,				\
45 		.k		= _SUNXI_CCU_MULT(_kshift, _kwidth),	\
46 		.n		= _SUNXI_CCU_MULT(_nshift, _nwidth),	\
47 		.m		= _SUNXI_CCU_DIV(_mshift, _mwidth),	\
48 		.mux		= _SUNXI_CCU_MUX(_muxshift, _muxwidth),	\
49 		.common		= {					\
50 			.reg		= _reg,				\
51 			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\
52 						      _parents,		\
53 						      &ccu_nkm_ops,	\
54 						      _flags),		\
55 		},							\
56 	}
57 
58 #define SUNXI_CCU_NKM_WITH_GATE_LOCK(_struct, _name, _parent, _reg,	\
59 				     _nshift, _nwidth,			\
60 				     _kshift, _kwidth,			\
61 				     _mshift, _mwidth,			\
62 				     _gate, _lock, _flags)		\
63 	struct ccu_nkm _struct = {					\
64 		.enable		= _gate,				\
65 		.lock		= _lock,				\
66 		.k		= _SUNXI_CCU_MULT(_kshift, _kwidth),	\
67 		.n		= _SUNXI_CCU_MULT(_nshift, _nwidth),	\
68 		.m		= _SUNXI_CCU_DIV(_mshift, _mwidth),	\
69 		.common		= {					\
70 			.reg		= _reg,				\
71 			.hw.init	= CLK_HW_INIT(_name,		\
72 						      _parent,		\
73 						      &ccu_nkm_ops,	\
74 						      _flags),		\
75 		},							\
76 	}
77 
78 static inline struct ccu_nkm *hw_to_ccu_nkm(struct clk_hw *hw)
79 {
80 	struct ccu_common *common = hw_to_ccu_common(hw);
81 
82 	return container_of(common, struct ccu_nkm, common);
83 }
84 
85 extern const struct clk_ops ccu_nkm_ops;
86 
87 #endif /* _CCU_NKM_H_ */
88