1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm QMP PHY controller (USB, SC8280XP) 8 9maintainers: 10 - Vinod Koul <vkoul@kernel.org> 11 12description: 13 The QMP PHY controller supports physical layer functionality for a number of 14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. 15 16properties: 17 compatible: 18 enum: 19 - qcom,ipq6018-qmp-usb3-phy 20 - qcom,ipq8074-qmp-usb3-phy 21 - qcom,ipq9574-qmp-usb3-phy 22 - qcom,msm8996-qmp-usb3-phy 23 - com,qdu1000-qmp-usb3-uni-phy 24 - qcom,sa8775p-qmp-usb3-uni-phy 25 - qcom,sc8280xp-qmp-usb3-uni-phy 26 - qcom,sdm845-qmp-usb3-uni-phy 27 - qcom,sdx55-qmp-usb3-uni-phy 28 - qcom,sdx65-qmp-usb3-uni-phy 29 - qcom,sdx75-qmp-usb3-uni-phy 30 - qcom,sm8150-qmp-usb3-uni-phy 31 - qcom,sm8250-qmp-usb3-uni-phy 32 - qcom,sm8350-qmp-usb3-uni-phy 33 - qcom,x1e80100-qmp-usb3-uni-phy 34 35 36 reg: 37 maxItems: 1 38 39 clocks: 40 minItems: 4 41 maxItems: 5 42 43 clock-names: 44 minItems: 4 45 maxItems: 5 46 47 power-domains: 48 maxItems: 1 49 50 resets: 51 maxItems: 2 52 53 reset-names: 54 items: 55 - const: phy 56 - const: phy_phy 57 58 vdda-phy-supply: true 59 60 vdda-pll-supply: true 61 62 "#clock-cells": 63 const: 0 64 65 clock-output-names: 66 maxItems: 1 67 68 "#phy-cells": 69 const: 0 70 71required: 72 - compatible 73 - reg 74 - clocks 75 - clock-names 76 - resets 77 - reset-names 78 - vdda-phy-supply 79 - vdda-pll-supply 80 - "#clock-cells" 81 - clock-output-names 82 - "#phy-cells" 83 84allOf: 85 - if: 86 properties: 87 compatible: 88 contains: 89 enum: 90 - qcom,ipq6018-qmp-usb3-phy 91 - qcom,ipq8074-qmp-usb3-phy 92 - qcom,ipq9574-qmp-usb3-phy 93 - qcom,msm8996-qmp-usb3-phy 94 - qcom,sdx55-qmp-usb3-uni-phy 95 - qcom,sdx65-qmp-usb3-uni-phy 96 - qcom,sdx75-qmp-usb3-uni-phy 97 then: 98 properties: 99 clocks: 100 maxItems: 4 101 clock-names: 102 items: 103 - const: aux 104 - const: ref 105 - const: cfg_ahb 106 - const: pipe 107 108 - if: 109 properties: 110 compatible: 111 contains: 112 enum: 113 - qcom,qdu1000-qmp-usb3-uni-phy 114 - qcom,sa8775p-qmp-usb3-uni-phy 115 - qcom,sc8280xp-qmp-usb3-uni-phy 116 - qcom,sm8150-qmp-usb3-uni-phy 117 - qcom,sm8250-qmp-usb3-uni-phy 118 - qcom,sm8350-qmp-usb3-uni-phy 119 - qcom,x1e80100-qmp-usb3-uni-phy 120 then: 121 properties: 122 clocks: 123 maxItems: 4 124 clock-names: 125 items: 126 - const: aux 127 - const: ref 128 - const: com_aux 129 - const: pipe 130 131 - if: 132 properties: 133 compatible: 134 contains: 135 enum: 136 - qcom,sdm845-qmp-usb3-uni-phy 137 then: 138 properties: 139 clocks: 140 maxItems: 5 141 clock-names: 142 items: 143 - const: aux 144 - const: cfg_ahb 145 - const: ref 146 - const: com_aux 147 - const: pipe 148 149 - if: 150 properties: 151 compatible: 152 contains: 153 enum: 154 - qcom,sa8775p-qmp-usb3-uni-phy 155 - qcom,sc8280xp-qmp-usb3-uni-phy 156 - qcom,x1e80100-qmp-usb3-uni-phy 157 then: 158 required: 159 - power-domains 160 161additionalProperties: false 162 163examples: 164 - | 165 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> 166 #include <dt-bindings/clock/qcom,rpmh.h> 167 168 phy@88ef000 { 169 compatible = "qcom,sc8280xp-qmp-usb3-uni-phy"; 170 reg = <0x088ef000 0x2000>; 171 172 clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>, 173 <&gcc GCC_USB3_MP0_CLKREF_CLK>, 174 <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>, 175 <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>; 176 clock-names = "aux", "ref", "com_aux", "pipe"; 177 178 power-domains = <&gcc USB30_MP_GDSC>; 179 180 resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>, 181 <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>; 182 reset-names = "phy", "phy_phy"; 183 184 vdda-phy-supply = <&vreg_l3a>; 185 vdda-pll-supply = <&vreg_l5a>; 186 187 #clock-cells = <0>; 188 clock-output-names = "usb2_phy0_pipe_clk"; 189 190 #phy-cells = <0>; 191 }; 192