1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 4 * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics. 5 */ 6 7 #ifndef STM32MP25_RCC_H 8 #define STM32MP25_RCC_H 9 10 #define RCC_SECCFGR0 0x0 11 #define RCC_SECCFGR1 0x4 12 #define RCC_SECCFGR2 0x8 13 #define RCC_SECCFGR3 0xC 14 #define RCC_PRIVCFGR0 0x10 15 #define RCC_PRIVCFGR1 0x14 16 #define RCC_PRIVCFGR2 0x18 17 #define RCC_PRIVCFGR3 0x1C 18 #define RCC_RCFGLOCKR0 0x20 19 #define RCC_RCFGLOCKR1 0x24 20 #define RCC_RCFGLOCKR2 0x28 21 #define RCC_RCFGLOCKR3 0x2C 22 #define RCC_R0CIDCFGR 0x30 23 #define RCC_R0SEMCR 0x34 24 #define RCC_R1CIDCFGR 0x38 25 #define RCC_R1SEMCR 0x3C 26 #define RCC_R2CIDCFGR 0x40 27 #define RCC_R2SEMCR 0x44 28 #define RCC_R3CIDCFGR 0x48 29 #define RCC_R3SEMCR 0x4C 30 #define RCC_R4CIDCFGR 0x50 31 #define RCC_R4SEMCR 0x54 32 #define RCC_R5CIDCFGR 0x58 33 #define RCC_R5SEMCR 0x5C 34 #define RCC_R6CIDCFGR 0x60 35 #define RCC_R6SEMCR 0x64 36 #define RCC_R7CIDCFGR 0x68 37 #define RCC_R7SEMCR 0x6C 38 #define RCC_R8CIDCFGR 0x70 39 #define RCC_R8SEMCR 0x74 40 #define RCC_R9CIDCFGR 0x78 41 #define RCC_R9SEMCR 0x7C 42 #define RCC_R10CIDCFGR 0x80 43 #define RCC_R10SEMCR 0x84 44 #define RCC_R11CIDCFGR 0x88 45 #define RCC_R11SEMCR 0x8C 46 #define RCC_R12CIDCFGR 0x90 47 #define RCC_R12SEMCR 0x94 48 #define RCC_R13CIDCFGR 0x98 49 #define RCC_R13SEMCR 0x9C 50 #define RCC_R14CIDCFGR 0xA0 51 #define RCC_R14SEMCR 0xA4 52 #define RCC_R15CIDCFGR 0xA8 53 #define RCC_R15SEMCR 0xAC 54 #define RCC_R16CIDCFGR 0xB0 55 #define RCC_R16SEMCR 0xB4 56 #define RCC_R17CIDCFGR 0xB8 57 #define RCC_R17SEMCR 0xBC 58 #define RCC_R18CIDCFGR 0xC0 59 #define RCC_R18SEMCR 0xC4 60 #define RCC_R19CIDCFGR 0xC8 61 #define RCC_R19SEMCR 0xCC 62 #define RCC_R20CIDCFGR 0xD0 63 #define RCC_R20SEMCR 0xD4 64 #define RCC_R21CIDCFGR 0xD8 65 #define RCC_R21SEMCR 0xDC 66 #define RCC_R22CIDCFGR 0xE0 67 #define RCC_R22SEMCR 0xE4 68 #define RCC_R23CIDCFGR 0xE8 69 #define RCC_R23SEMCR 0xEC 70 #define RCC_R24CIDCFGR 0xF0 71 #define RCC_R24SEMCR 0xF4 72 #define RCC_R25CIDCFGR 0xF8 73 #define RCC_R25SEMCR 0xFC 74 #define RCC_R26CIDCFGR 0x100 75 #define RCC_R26SEMCR 0x104 76 #define RCC_R27CIDCFGR 0x108 77 #define RCC_R27SEMCR 0x10C 78 #define RCC_R28CIDCFGR 0x110 79 #define RCC_R28SEMCR 0x114 80 #define RCC_R29CIDCFGR 0x118 81 #define RCC_R29SEMCR 0x11C 82 #define RCC_R30CIDCFGR 0x120 83 #define RCC_R30SEMCR 0x124 84 #define RCC_R31CIDCFGR 0x128 85 #define RCC_R31SEMCR 0x12C 86 #define RCC_R32CIDCFGR 0x130 87 #define RCC_R32SEMCR 0x134 88 #define RCC_R33CIDCFGR 0x138 89 #define RCC_R33SEMCR 0x13C 90 #define RCC_R34CIDCFGR 0x140 91 #define RCC_R34SEMCR 0x144 92 #define RCC_R35CIDCFGR 0x148 93 #define RCC_R35SEMCR 0x14C 94 #define RCC_R36CIDCFGR 0x150 95 #define RCC_R36SEMCR 0x154 96 #define RCC_R37CIDCFGR 0x158 97 #define RCC_R37SEMCR 0x15C 98 #define RCC_R38CIDCFGR 0x160 99 #define RCC_R38SEMCR 0x164 100 #define RCC_R39CIDCFGR 0x168 101 #define RCC_R39SEMCR 0x16C 102 #define RCC_R40CIDCFGR 0x170 103 #define RCC_R40SEMCR 0x174 104 #define RCC_R41CIDCFGR 0x178 105 #define RCC_R41SEMCR 0x17C 106 #define RCC_R42CIDCFGR 0x180 107 #define RCC_R42SEMCR 0x184 108 #define RCC_R43CIDCFGR 0x188 109 #define RCC_R43SEMCR 0x18C 110 #define RCC_R44CIDCFGR 0x190 111 #define RCC_R44SEMCR 0x194 112 #define RCC_R45CIDCFGR 0x198 113 #define RCC_R45SEMCR 0x19C 114 #define RCC_R46CIDCFGR 0x1A0 115 #define RCC_R46SEMCR 0x1A4 116 #define RCC_R47CIDCFGR 0x1A8 117 #define RCC_R47SEMCR 0x1AC 118 #define RCC_R48CIDCFGR 0x1B0 119 #define RCC_R48SEMCR 0x1B4 120 #define RCC_R49CIDCFGR 0x1B8 121 #define RCC_R49SEMCR 0x1BC 122 #define RCC_R50CIDCFGR 0x1C0 123 #define RCC_R50SEMCR 0x1C4 124 #define RCC_R51CIDCFGR 0x1C8 125 #define RCC_R51SEMCR 0x1CC 126 #define RCC_R52CIDCFGR 0x1D0 127 #define RCC_R52SEMCR 0x1D4 128 #define RCC_R53CIDCFGR 0x1D8 129 #define RCC_R53SEMCR 0x1DC 130 #define RCC_R54CIDCFGR 0x1E0 131 #define RCC_R54SEMCR 0x1E4 132 #define RCC_R55CIDCFGR 0x1E8 133 #define RCC_R55SEMCR 0x1EC 134 #define RCC_R56CIDCFGR 0x1F0 135 #define RCC_R56SEMCR 0x1F4 136 #define RCC_R57CIDCFGR 0x1F8 137 #define RCC_R57SEMCR 0x1FC 138 #define RCC_R58CIDCFGR 0x200 139 #define RCC_R58SEMCR 0x204 140 #define RCC_R59CIDCFGR 0x208 141 #define RCC_R59SEMCR 0x20C 142 #define RCC_R60CIDCFGR 0x210 143 #define RCC_R60SEMCR 0x214 144 #define RCC_R61CIDCFGR 0x218 145 #define RCC_R61SEMCR 0x21C 146 #define RCC_R62CIDCFGR 0x220 147 #define RCC_R62SEMCR 0x224 148 #define RCC_R63CIDCFGR 0x228 149 #define RCC_R63SEMCR 0x22C 150 #define RCC_R64CIDCFGR 0x230 151 #define RCC_R64SEMCR 0x234 152 #define RCC_R65CIDCFGR 0x238 153 #define RCC_R65SEMCR 0x23C 154 #define RCC_R66CIDCFGR 0x240 155 #define RCC_R66SEMCR 0x244 156 #define RCC_R67CIDCFGR 0x248 157 #define RCC_R67SEMCR 0x24C 158 #define RCC_R68CIDCFGR 0x250 159 #define RCC_R68SEMCR 0x254 160 #define RCC_R69CIDCFGR 0x258 161 #define RCC_R69SEMCR 0x25C 162 #define RCC_R70CIDCFGR 0x260 163 #define RCC_R70SEMCR 0x264 164 #define RCC_R71CIDCFGR 0x268 165 #define RCC_R71SEMCR 0x26C 166 #define RCC_R72CIDCFGR 0x270 167 #define RCC_R72SEMCR 0x274 168 #define RCC_R73CIDCFGR 0x278 169 #define RCC_R73SEMCR 0x27C 170 #define RCC_R74CIDCFGR 0x280 171 #define RCC_R74SEMCR 0x284 172 #define RCC_R75CIDCFGR 0x288 173 #define RCC_R75SEMCR 0x28C 174 #define RCC_R76CIDCFGR 0x290 175 #define RCC_R76SEMCR 0x294 176 #define RCC_R77CIDCFGR 0x298 177 #define RCC_R77SEMCR 0x29C 178 #define RCC_R78CIDCFGR 0x2A0 179 #define RCC_R78SEMCR 0x2A4 180 #define RCC_R79CIDCFGR 0x2A8 181 #define RCC_R79SEMCR 0x2AC 182 #define RCC_R80CIDCFGR 0x2B0 183 #define RCC_R80SEMCR 0x2B4 184 #define RCC_R81CIDCFGR 0x2B8 185 #define RCC_R81SEMCR 0x2BC 186 #define RCC_R82CIDCFGR 0x2C0 187 #define RCC_R82SEMCR 0x2C4 188 #define RCC_R83CIDCFGR 0x2C8 189 #define RCC_R83SEMCR 0x2CC 190 #define RCC_R84CIDCFGR 0x2D0 191 #define RCC_R84SEMCR 0x2D4 192 #define RCC_R85CIDCFGR 0x2D8 193 #define RCC_R85SEMCR 0x2DC 194 #define RCC_R86CIDCFGR 0x2E0 195 #define RCC_R86SEMCR 0x2E4 196 #define RCC_R87CIDCFGR 0x2E8 197 #define RCC_R87SEMCR 0x2EC 198 #define RCC_R88CIDCFGR 0x2F0 199 #define RCC_R88SEMCR 0x2F4 200 #define RCC_R89CIDCFGR 0x2F8 201 #define RCC_R89SEMCR 0x2FC 202 #define RCC_R90CIDCFGR 0x300 203 #define RCC_R90SEMCR 0x304 204 #define RCC_R91CIDCFGR 0x308 205 #define RCC_R91SEMCR 0x30C 206 #define RCC_R92CIDCFGR 0x310 207 #define RCC_R92SEMCR 0x314 208 #define RCC_R93CIDCFGR 0x318 209 #define RCC_R93SEMCR 0x31C 210 #define RCC_R94CIDCFGR 0x320 211 #define RCC_R94SEMCR 0x324 212 #define RCC_R95CIDCFGR 0x328 213 #define RCC_R95SEMCR 0x32C 214 #define RCC_R96CIDCFGR 0x330 215 #define RCC_R96SEMCR 0x334 216 #define RCC_R97CIDCFGR 0x338 217 #define RCC_R97SEMCR 0x33C 218 #define RCC_R98CIDCFGR 0x340 219 #define RCC_R98SEMCR 0x344 220 #define RCC_R99CIDCFGR 0x348 221 #define RCC_R99SEMCR 0x34C 222 #define RCC_R100CIDCFGR 0x350 223 #define RCC_R100SEMCR 0x354 224 #define RCC_R101CIDCFGR 0x358 225 #define RCC_R101SEMCR 0x35C 226 #define RCC_R102CIDCFGR 0x360 227 #define RCC_R102SEMCR 0x364 228 #define RCC_R103CIDCFGR 0x368 229 #define RCC_R103SEMCR 0x36C 230 #define RCC_R104CIDCFGR 0x370 231 #define RCC_R104SEMCR 0x374 232 #define RCC_R105CIDCFGR 0x378 233 #define RCC_R105SEMCR 0x37C 234 #define RCC_R106CIDCFGR 0x380 235 #define RCC_R106SEMCR 0x384 236 #define RCC_R107CIDCFGR 0x388 237 #define RCC_R107SEMCR 0x38C 238 #define RCC_R108CIDCFGR 0x390 239 #define RCC_R108SEMCR 0x394 240 #define RCC_R109CIDCFGR 0x398 241 #define RCC_R109SEMCR 0x39C 242 #define RCC_R110CIDCFGR 0x3A0 243 #define RCC_R110SEMCR 0x3A4 244 #define RCC_R111CIDCFGR 0x3A8 245 #define RCC_R111SEMCR 0x3AC 246 #define RCC_R112CIDCFGR 0x3B0 247 #define RCC_R112SEMCR 0x3B4 248 #define RCC_R113CIDCFGR 0x3B8 249 #define RCC_R113SEMCR 0x3BC 250 #define RCC_GRSTCSETR 0x400 251 #define RCC_C1RSTCSETR 0x404 252 #define RCC_C1P1RSTCSETR 0x408 253 #define RCC_C2RSTCSETR 0x40C 254 #define RCC_HWRSTSCLRR 0x410 255 #define RCC_C1HWRSTSCLRR 0x414 256 #define RCC_C2HWRSTSCLRR 0x418 257 #define RCC_C1BOOTRSTSSETR 0x41C 258 #define RCC_C1BOOTRSTSCLRR 0x420 259 #define RCC_C2BOOTRSTSSETR 0x424 260 #define RCC_C2BOOTRSTSCLRR 0x428 261 #define RCC_C1SREQSETR 0x42C 262 #define RCC_C1SREQCLRR 0x430 263 #define RCC_CPUBOOTCR 0x434 264 #define RCC_STBYBOOTCR 0x438 265 #define RCC_LEGBOOTCR 0x43C 266 #define RCC_BDCR 0x440 267 #define RCC_D3DCR 0x444 268 #define RCC_D3DSR 0x448 269 #define RCC_RDCR 0x44C 270 #define RCC_C1MSRDCR 0x450 271 #define RCC_PWRLPDLYCR 0x454 272 #define RCC_C1CIESETR 0x458 273 #define RCC_C1CIFCLRR 0x45C 274 #define RCC_C2CIESETR 0x460 275 #define RCC_C2CIFCLRR 0x464 276 #define RCC_IWDGC1FZSETR 0x468 277 #define RCC_IWDGC1FZCLRR 0x46C 278 #define RCC_IWDGC1CFGSETR 0x470 279 #define RCC_IWDGC1CFGCLRR 0x474 280 #define RCC_IWDGC2FZSETR 0x478 281 #define RCC_IWDGC2FZCLRR 0x47C 282 #define RCC_IWDGC2CFGSETR 0x480 283 #define RCC_IWDGC2CFGCLRR 0x484 284 #define RCC_IWDGC3CFGSETR 0x488 285 #define RCC_IWDGC3CFGCLRR 0x48C 286 #define RCC_C3CFGR 0x490 287 #define RCC_MCO1CFGR 0x494 288 #define RCC_MCO2CFGR 0x498 289 #define RCC_OCENSETR 0x49C 290 #define RCC_OCENCLRR 0x4A0 291 #define RCC_OCRDYR 0x4A4 292 #define RCC_HSICFGR 0x4A8 293 #define RCC_MSICFGR 0x4AC 294 #define RCC_RTCDIVR 0x4B0 295 #define RCC_APB1DIVR 0x4B4 296 #define RCC_APB2DIVR 0x4B8 297 #define RCC_APB3DIVR 0x4BC 298 #define RCC_APB4DIVR 0x4C0 299 #define RCC_APBDBGDIVR 0x4C4 300 #define RCC_TIMG1PRER 0x4C8 301 #define RCC_TIMG2PRER 0x4CC 302 #define RCC_LSMCUDIVR 0x4D0 303 #define RCC_DDRCPCFGR 0x4D4 304 #define RCC_DDRCAPBCFGR 0x4D8 305 #define RCC_DDRPHYCAPBCFGR 0x4DC 306 #define RCC_DDRPHYCCFGR 0x4E0 307 #define RCC_DDRCFGR 0x4E4 308 #define RCC_DDRITFCFGR 0x4E8 309 #define RCC_SYSRAMCFGR 0x4F0 310 #define RCC_VDERAMCFGR 0x4F4 311 #define RCC_SRAM1CFGR 0x4F8 312 #define RCC_SRAM2CFGR 0x4FC 313 #define RCC_RETRAMCFGR 0x500 314 #define RCC_BKPSRAMCFGR 0x504 315 #define RCC_LPSRAM1CFGR 0x508 316 #define RCC_LPSRAM2CFGR 0x50C 317 #define RCC_LPSRAM3CFGR 0x510 318 #define RCC_OSPI1CFGR 0x514 319 #define RCC_OSPI2CFGR 0x518 320 #define RCC_FMCCFGR 0x51C 321 #define RCC_DBGCFGR 0x520 322 #define RCC_STM500CFGR 0x524 323 #define RCC_ETRCFGR 0x528 324 #define RCC_GPIOACFGR 0x52C 325 #define RCC_GPIOBCFGR 0x530 326 #define RCC_GPIOCCFGR 0x534 327 #define RCC_GPIODCFGR 0x538 328 #define RCC_GPIOECFGR 0x53C 329 #define RCC_GPIOFCFGR 0x540 330 #define RCC_GPIOGCFGR 0x544 331 #define RCC_GPIOHCFGR 0x548 332 #define RCC_GPIOICFGR 0x54C 333 #define RCC_GPIOJCFGR 0x550 334 #define RCC_GPIOKCFGR 0x554 335 #define RCC_GPIOZCFGR 0x558 336 #define RCC_HPDMA1CFGR 0x55C 337 #define RCC_HPDMA2CFGR 0x560 338 #define RCC_HPDMA3CFGR 0x564 339 #define RCC_LPDMACFGR 0x568 340 #define RCC_HSEMCFGR 0x56C 341 #define RCC_IPCC1CFGR 0x570 342 #define RCC_IPCC2CFGR 0x574 343 #define RCC_RTCCFGR 0x578 344 #define RCC_SYSCPU1CFGR 0x580 345 #define RCC_BSECCFGR 0x584 346 #define RCC_IS2MCFGR 0x58C 347 #define RCC_PLL2CFGR1 0x590 348 #define RCC_PLL2CFGR2 0x594 349 #define RCC_PLL2CFGR3 0x598 350 #define RCC_PLL2CFGR4 0x59C 351 #define RCC_PLL2CFGR5 0x5A0 352 #define RCC_PLL2CFGR6 0x5A8 353 #define RCC_PLL2CFGR7 0x5AC 354 #define RCC_PLL3CFGR1 0x5B8 355 #define RCC_PLL3CFGR2 0x5BC 356 #define RCC_PLL3CFGR3 0x5C0 357 #define RCC_PLL3CFGR4 0x5C4 358 #define RCC_PLL3CFGR5 0x5C8 359 #define RCC_PLL3CFGR6 0x5D0 360 #define RCC_PLL3CFGR7 0x5D4 361 #define RCC_HSIFMONCR 0x5E0 362 #define RCC_HSIFVALR 0x5E4 363 #define RCC_TIM1CFGR 0x700 364 #define RCC_TIM2CFGR 0x704 365 #define RCC_TIM3CFGR 0x708 366 #define RCC_TIM4CFGR 0x70C 367 #define RCC_TIM5CFGR 0x710 368 #define RCC_TIM6CFGR 0x714 369 #define RCC_TIM7CFGR 0x718 370 #define RCC_TIM8CFGR 0x71C 371 #define RCC_TIM10CFGR 0x720 372 #define RCC_TIM11CFGR 0x724 373 #define RCC_TIM12CFGR 0x728 374 #define RCC_TIM13CFGR 0x72C 375 #define RCC_TIM14CFGR 0x730 376 #define RCC_TIM15CFGR 0x734 377 #define RCC_TIM16CFGR 0x738 378 #define RCC_TIM17CFGR 0x73C 379 #define RCC_TIM20CFGR 0x740 380 #define RCC_LPTIM1CFGR 0x744 381 #define RCC_LPTIM2CFGR 0x748 382 #define RCC_LPTIM3CFGR 0x74C 383 #define RCC_LPTIM4CFGR 0x750 384 #define RCC_LPTIM5CFGR 0x754 385 #define RCC_SPI1CFGR 0x758 386 #define RCC_SPI2CFGR 0x75C 387 #define RCC_SPI3CFGR 0x760 388 #define RCC_SPI4CFGR 0x764 389 #define RCC_SPI5CFGR 0x768 390 #define RCC_SPI6CFGR 0x76C 391 #define RCC_SPI7CFGR 0x770 392 #define RCC_SPI8CFGR 0x774 393 #define RCC_SPDIFRXCFGR 0x778 394 #define RCC_USART1CFGR 0x77C 395 #define RCC_USART2CFGR 0x780 396 #define RCC_USART3CFGR 0x784 397 #define RCC_UART4CFGR 0x788 398 #define RCC_UART5CFGR 0x78C 399 #define RCC_USART6CFGR 0x790 400 #define RCC_UART7CFGR 0x794 401 #define RCC_UART8CFGR 0x798 402 #define RCC_UART9CFGR 0x79C 403 #define RCC_LPUART1CFGR 0x7A0 404 #define RCC_I2C1CFGR 0x7A4 405 #define RCC_I2C2CFGR 0x7A8 406 #define RCC_I2C3CFGR 0x7AC 407 #define RCC_I2C4CFGR 0x7B0 408 #define RCC_I2C5CFGR 0x7B4 409 #define RCC_I2C6CFGR 0x7B8 410 #define RCC_I2C7CFGR 0x7BC 411 #define RCC_I2C8CFGR 0x7C0 412 #define RCC_SAI1CFGR 0x7C4 413 #define RCC_SAI2CFGR 0x7C8 414 #define RCC_SAI3CFGR 0x7CC 415 #define RCC_SAI4CFGR 0x7D0 416 #define RCC_MDF1CFGR 0x7D8 417 #define RCC_ADF1CFGR 0x7DC 418 #define RCC_FDCANCFGR 0x7E0 419 #define RCC_HDPCFGR 0x7E4 420 #define RCC_ADC12CFGR 0x7E8 421 #define RCC_ADC3CFGR 0x7EC 422 #define RCC_ETH1CFGR 0x7F0 423 #define RCC_ETH2CFGR 0x7F4 424 #define RCC_USBHCFGR 0x7FC 425 #define RCC_USB2PHY1CFGR 0x800 426 #define RCC_USB2PHY2CFGR 0x804 427 #define RCC_USB3DRCFGR 0x808 428 #define RCC_USB3PCIEPHYCFGR 0x80C 429 #define RCC_PCIECFGR 0x810 430 #define RCC_USBTCCFGR 0x814 431 #define RCC_ETHSWCFGR 0x818 432 #define RCC_ETHSWACMCFGR 0x81C 433 #define RCC_ETHSWACMMSGCFGR 0x820 434 #define RCC_STGENCFGR 0x824 435 #define RCC_SDMMC1CFGR 0x830 436 #define RCC_SDMMC2CFGR 0x834 437 #define RCC_SDMMC3CFGR 0x838 438 #define RCC_GPUCFGR 0x83C 439 #define RCC_LTDCCFGR 0x840 440 #define RCC_DSICFGR 0x844 441 #define RCC_LVDSCFGR 0x850 442 #define RCC_CSICFGR 0x858 443 #define RCC_DCMIPPCFGR 0x85C 444 #define RCC_CCICFGR 0x860 445 #define RCC_VDECCFGR 0x864 446 #define RCC_VENCCFGR 0x868 447 #define RCC_RNGCFGR 0x870 448 #define RCC_PKACFGR 0x874 449 #define RCC_SAESCFGR 0x878 450 #define RCC_HASHCFGR 0x87C 451 #define RCC_CRYP1CFGR 0x880 452 #define RCC_CRYP2CFGR 0x884 453 #define RCC_IWDG1CFGR 0x888 454 #define RCC_IWDG2CFGR 0x88C 455 #define RCC_IWDG3CFGR 0x890 456 #define RCC_IWDG4CFGR 0x894 457 #define RCC_IWDG5CFGR 0x898 458 #define RCC_WWDG1CFGR 0x89C 459 #define RCC_WWDG2CFGR 0x8A0 460 #define RCC_VREFCFGR 0x8A8 461 #define RCC_DTSCFGR 0x8AC 462 #define RCC_CRCCFGR 0x8B4 463 #define RCC_SERCCFGR 0x8B8 464 #define RCC_OSPIIOMCFGR 0x8BC 465 #define RCC_GICV2MCFGR 0x8C0 466 #define RCC_I3C1CFGR 0x8C8 467 #define RCC_I3C2CFGR 0x8CC 468 #define RCC_I3C3CFGR 0x8D0 469 #define RCC_I3C4CFGR 0x8D4 470 #define RCC_MUXSELCFGR 0x1000 471 #define RCC_XBAR0CFGR 0x1018 472 #define RCC_XBAR1CFGR 0x101C 473 #define RCC_XBAR2CFGR 0x1020 474 #define RCC_XBAR3CFGR 0x1024 475 #define RCC_XBAR4CFGR 0x1028 476 #define RCC_XBAR5CFGR 0x102C 477 #define RCC_XBAR6CFGR 0x1030 478 #define RCC_XBAR7CFGR 0x1034 479 #define RCC_XBAR8CFGR 0x1038 480 #define RCC_XBAR9CFGR 0x103C 481 #define RCC_XBAR10CFGR 0x1040 482 #define RCC_XBAR11CFGR 0x1044 483 #define RCC_XBAR12CFGR 0x1048 484 #define RCC_XBAR13CFGR 0x104C 485 #define RCC_XBAR14CFGR 0x1050 486 #define RCC_XBAR15CFGR 0x1054 487 #define RCC_XBAR16CFGR 0x1058 488 #define RCC_XBAR17CFGR 0x105C 489 #define RCC_XBAR18CFGR 0x1060 490 #define RCC_XBAR19CFGR 0x1064 491 #define RCC_XBAR20CFGR 0x1068 492 #define RCC_XBAR21CFGR 0x106C 493 #define RCC_XBAR22CFGR 0x1070 494 #define RCC_XBAR23CFGR 0x1074 495 #define RCC_XBAR24CFGR 0x1078 496 #define RCC_XBAR25CFGR 0x107C 497 #define RCC_XBAR26CFGR 0x1080 498 #define RCC_XBAR27CFGR 0x1084 499 #define RCC_XBAR28CFGR 0x1088 500 #define RCC_XBAR29CFGR 0x108C 501 #define RCC_XBAR30CFGR 0x1090 502 #define RCC_XBAR31CFGR 0x1094 503 #define RCC_XBAR32CFGR 0x1098 504 #define RCC_XBAR33CFGR 0x109C 505 #define RCC_XBAR34CFGR 0x10A0 506 #define RCC_XBAR35CFGR 0x10A4 507 #define RCC_XBAR36CFGR 0x10A8 508 #define RCC_XBAR37CFGR 0x10AC 509 #define RCC_XBAR38CFGR 0x10B0 510 #define RCC_XBAR39CFGR 0x10B4 511 #define RCC_XBAR40CFGR 0x10B8 512 #define RCC_XBAR41CFGR 0x10BC 513 #define RCC_XBAR42CFGR 0x10C0 514 #define RCC_XBAR43CFGR 0x10C4 515 #define RCC_XBAR44CFGR 0x10C8 516 #define RCC_XBAR45CFGR 0x10CC 517 #define RCC_XBAR46CFGR 0x10D0 518 #define RCC_XBAR47CFGR 0x10D4 519 #define RCC_XBAR48CFGR 0x10D8 520 #define RCC_XBAR49CFGR 0x10DC 521 #define RCC_XBAR50CFGR 0x10E0 522 #define RCC_XBAR51CFGR 0x10E4 523 #define RCC_XBAR52CFGR 0x10E8 524 #define RCC_XBAR53CFGR 0x10EC 525 #define RCC_XBAR54CFGR 0x10F0 526 #define RCC_XBAR55CFGR 0x10F4 527 #define RCC_XBAR56CFGR 0x10F8 528 #define RCC_XBAR57CFGR 0x10FC 529 #define RCC_XBAR58CFGR 0x1100 530 #define RCC_XBAR59CFGR 0x1104 531 #define RCC_XBAR60CFGR 0x1108 532 #define RCC_XBAR61CFGR 0x110C 533 #define RCC_XBAR62CFGR 0x1110 534 #define RCC_XBAR63CFGR 0x1114 535 #define RCC_PREDIV0CFGR 0x1118 536 #define RCC_PREDIV1CFGR 0x111C 537 #define RCC_PREDIV2CFGR 0x1120 538 #define RCC_PREDIV3CFGR 0x1124 539 #define RCC_PREDIV4CFGR 0x1128 540 #define RCC_PREDIV5CFGR 0x112C 541 #define RCC_PREDIV6CFGR 0x1130 542 #define RCC_PREDIV7CFGR 0x1134 543 #define RCC_PREDIV8CFGR 0x1138 544 #define RCC_PREDIV9CFGR 0x113C 545 #define RCC_PREDIV10CFGR 0x1140 546 #define RCC_PREDIV11CFGR 0x1144 547 #define RCC_PREDIV12CFGR 0x1148 548 #define RCC_PREDIV13CFGR 0x114C 549 #define RCC_PREDIV14CFGR 0x1150 550 #define RCC_PREDIV15CFGR 0x1154 551 #define RCC_PREDIV16CFGR 0x1158 552 #define RCC_PREDIV17CFGR 0x115C 553 #define RCC_PREDIV18CFGR 0x1160 554 #define RCC_PREDIV19CFGR 0x1164 555 #define RCC_PREDIV20CFGR 0x1168 556 #define RCC_PREDIV21CFGR 0x116C 557 #define RCC_PREDIV22CFGR 0x1170 558 #define RCC_PREDIV23CFGR 0x1174 559 #define RCC_PREDIV24CFGR 0x1178 560 #define RCC_PREDIV25CFGR 0x117C 561 #define RCC_PREDIV26CFGR 0x1180 562 #define RCC_PREDIV27CFGR 0x1184 563 #define RCC_PREDIV28CFGR 0x1188 564 #define RCC_PREDIV29CFGR 0x118C 565 #define RCC_PREDIV30CFGR 0x1190 566 #define RCC_PREDIV31CFGR 0x1194 567 #define RCC_PREDIV32CFGR 0x1198 568 #define RCC_PREDIV33CFGR 0x119C 569 #define RCC_PREDIV34CFGR 0x11A0 570 #define RCC_PREDIV35CFGR 0x11A4 571 #define RCC_PREDIV36CFGR 0x11A8 572 #define RCC_PREDIV37CFGR 0x11AC 573 #define RCC_PREDIV38CFGR 0x11B0 574 #define RCC_PREDIV39CFGR 0x11B4 575 #define RCC_PREDIV40CFGR 0x11B8 576 #define RCC_PREDIV41CFGR 0x11BC 577 #define RCC_PREDIV42CFGR 0x11C0 578 #define RCC_PREDIV43CFGR 0x11C4 579 #define RCC_PREDIV44CFGR 0x11C8 580 #define RCC_PREDIV45CFGR 0x11CC 581 #define RCC_PREDIV46CFGR 0x11D0 582 #define RCC_PREDIV47CFGR 0x11D4 583 #define RCC_PREDIV48CFGR 0x11D8 584 #define RCC_PREDIV49CFGR 0x11DC 585 #define RCC_PREDIV50CFGR 0x11E0 586 #define RCC_PREDIV51CFGR 0x11E4 587 #define RCC_PREDIV52CFGR 0x11E8 588 #define RCC_PREDIV53CFGR 0x11EC 589 #define RCC_PREDIV54CFGR 0x11F0 590 #define RCC_PREDIV55CFGR 0x11F4 591 #define RCC_PREDIV56CFGR 0x11F8 592 #define RCC_PREDIV57CFGR 0x11FC 593 #define RCC_PREDIV58CFGR 0x1200 594 #define RCC_PREDIV59CFGR 0x1204 595 #define RCC_PREDIV60CFGR 0x1208 596 #define RCC_PREDIV61CFGR 0x120C 597 #define RCC_PREDIV62CFGR 0x1210 598 #define RCC_PREDIV63CFGR 0x1214 599 #define RCC_PREDIVSR1 0x1218 600 #define RCC_PREDIVSR2 0x121C 601 #define RCC_FINDIV0CFGR 0x1224 602 #define RCC_FINDIV1CFGR 0x1228 603 #define RCC_FINDIV2CFGR 0x122C 604 #define RCC_FINDIV3CFGR 0x1230 605 #define RCC_FINDIV4CFGR 0x1234 606 #define RCC_FINDIV5CFGR 0x1238 607 #define RCC_FINDIV6CFGR 0x123C 608 #define RCC_FINDIV7CFGR 0x1240 609 #define RCC_FINDIV8CFGR 0x1244 610 #define RCC_FINDIV9CFGR 0x1248 611 #define RCC_FINDIV10CFGR 0x124C 612 #define RCC_FINDIV11CFGR 0x1250 613 #define RCC_FINDIV12CFGR 0x1254 614 #define RCC_FINDIV13CFGR 0x1258 615 #define RCC_FINDIV14CFGR 0x125C 616 #define RCC_FINDIV15CFGR 0x1260 617 #define RCC_FINDIV16CFGR 0x1264 618 #define RCC_FINDIV17CFGR 0x1268 619 #define RCC_FINDIV18CFGR 0x126C 620 #define RCC_FINDIV19CFGR 0x1270 621 #define RCC_FINDIV20CFGR 0x1274 622 #define RCC_FINDIV21CFGR 0x1278 623 #define RCC_FINDIV22CFGR 0x127C 624 #define RCC_FINDIV23CFGR 0x1280 625 #define RCC_FINDIV24CFGR 0x1284 626 #define RCC_FINDIV25CFGR 0x1288 627 #define RCC_FINDIV26CFGR 0x128C 628 #define RCC_FINDIV27CFGR 0x1290 629 #define RCC_FINDIV28CFGR 0x1294 630 #define RCC_FINDIV29CFGR 0x1298 631 #define RCC_FINDIV30CFGR 0x129C 632 #define RCC_FINDIV31CFGR 0x12A0 633 #define RCC_FINDIV32CFGR 0x12A4 634 #define RCC_FINDIV33CFGR 0x12A8 635 #define RCC_FINDIV34CFGR 0x12AC 636 #define RCC_FINDIV35CFGR 0x12B0 637 #define RCC_FINDIV36CFGR 0x12B4 638 #define RCC_FINDIV37CFGR 0x12B8 639 #define RCC_FINDIV38CFGR 0x12BC 640 #define RCC_FINDIV39CFGR 0x12C0 641 #define RCC_FINDIV40CFGR 0x12C4 642 #define RCC_FINDIV41CFGR 0x12C8 643 #define RCC_FINDIV42CFGR 0x12CC 644 #define RCC_FINDIV43CFGR 0x12D0 645 #define RCC_FINDIV44CFGR 0x12D4 646 #define RCC_FINDIV45CFGR 0x12D8 647 #define RCC_FINDIV46CFGR 0x12DC 648 #define RCC_FINDIV47CFGR 0x12E0 649 #define RCC_FINDIV48CFGR 0x12E4 650 #define RCC_FINDIV49CFGR 0x12E8 651 #define RCC_FINDIV50CFGR 0x12EC 652 #define RCC_FINDIV51CFGR 0x12F0 653 #define RCC_FINDIV52CFGR 0x12F4 654 #define RCC_FINDIV53CFGR 0x12F8 655 #define RCC_FINDIV54CFGR 0x12FC 656 #define RCC_FINDIV55CFGR 0x1300 657 #define RCC_FINDIV56CFGR 0x1304 658 #define RCC_FINDIV57CFGR 0x1308 659 #define RCC_FINDIV58CFGR 0x130C 660 #define RCC_FINDIV59CFGR 0x1310 661 #define RCC_FINDIV60CFGR 0x1314 662 #define RCC_FINDIV61CFGR 0x1318 663 #define RCC_FINDIV62CFGR 0x131C 664 #define RCC_FINDIV63CFGR 0x1320 665 #define RCC_FINDIVSR1 0x1324 666 #define RCC_FINDIVSR2 0x1328 667 #define RCC_FCALCOBS0CFGR 0x1340 668 #define RCC_FCALCOBS1CFGR 0x1344 669 #define RCC_FCALCREFCFGR 0x1348 670 #define RCC_FCALCCR1 0x134C 671 #define RCC_FCALCCR2 0x1354 672 #define RCC_FCALCSR 0x1358 673 #define RCC_PLL4CFGR1 0x1360 674 #define RCC_PLL4CFGR2 0x1364 675 #define RCC_PLL4CFGR3 0x1368 676 #define RCC_PLL4CFGR4 0x136C 677 #define RCC_PLL4CFGR5 0x1370 678 #define RCC_PLL4CFGR6 0x1378 679 #define RCC_PLL4CFGR7 0x137C 680 #define RCC_PLL5CFGR1 0x1388 681 #define RCC_PLL5CFGR2 0x138C 682 #define RCC_PLL5CFGR3 0x1390 683 #define RCC_PLL5CFGR4 0x1394 684 #define RCC_PLL5CFGR5 0x1398 685 #define RCC_PLL5CFGR6 0x13A0 686 #define RCC_PLL5CFGR7 0x13A4 687 #define RCC_PLL6CFGR1 0x13B0 688 #define RCC_PLL6CFGR2 0x13B4 689 #define RCC_PLL6CFGR3 0x13B8 690 #define RCC_PLL6CFGR4 0x13BC 691 #define RCC_PLL6CFGR5 0x13C0 692 #define RCC_PLL6CFGR6 0x13C8 693 #define RCC_PLL6CFGR7 0x13CC 694 #define RCC_PLL7CFGR1 0x13D8 695 #define RCC_PLL7CFGR2 0x13DC 696 #define RCC_PLL7CFGR3 0x13E0 697 #define RCC_PLL7CFGR4 0x13E4 698 #define RCC_PLL7CFGR5 0x13E8 699 #define RCC_PLL7CFGR6 0x13F0 700 #define RCC_PLL7CFGR7 0x13F4 701 #define RCC_PLL8CFGR1 0x1400 702 #define RCC_PLL8CFGR2 0x1404 703 #define RCC_PLL8CFGR3 0x1408 704 #define RCC_PLL8CFGR4 0x140C 705 #define RCC_PLL8CFGR5 0x1410 706 #define RCC_PLL8CFGR6 0x1418 707 #define RCC_PLL8CFGR7 0x141C 708 #define RCC_VERR 0xFFF4 709 #define RCC_IDR 0xFFF8 710 #define RCC_SIDR 0xFFFC 711 712 #endif /* STM32MP25_RCC_H */ 713