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Searched refs:mt76_wr (Results 1 – 25 of 81) sorted by relevance

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/freebsd/sys/contrib/dev/mediatek/mt76/mt76x2/
H A Dphy.c55 mt76_wr(dev, MT_TX_ALC_CFG_2, 0x35160a00); in mt76x2_phy_set_txpower_regs()
56 mt76_wr(dev, MT_TX_ALC_CFG_3, 0x35160a06); in mt76x2_phy_set_txpower_regs()
59 mt76_wr(dev, MT_RF_PA_MODE_ADJ0, 0x0000ec00); in mt76x2_phy_set_txpower_regs()
60 mt76_wr(dev, MT_RF_PA_MODE_ADJ1, 0x0000ec00); in mt76x2_phy_set_txpower_regs()
62 mt76_wr(dev, MT_RF_PA_MODE_ADJ0, 0xf4000200); in mt76x2_phy_set_txpower_regs()
63 mt76_wr(dev, MT_RF_PA_MODE_ADJ1, 0xfa000200); in mt76x2_phy_set_txpower_regs()
70 mt76_wr(dev, MT_TX_ALC_CFG_2, 0x2f0f0400); in mt76x2_phy_set_txpower_regs()
71 mt76_wr(dev, MT_TX_ALC_CFG_3, 0x2f0f0476); in mt76x2_phy_set_txpower_regs()
73 mt76_wr(dev, MT_TX_ALC_CFG_2, 0x1b0f0400); in mt76x2_phy_set_txpower_regs()
74 mt76_wr(dev, MT_TX_ALC_CFG_3, 0x1b0f0476); in mt76x2_phy_set_txpower_regs()
[all …]
H A Dusb_mac.c36 mt76_wr(dev, 0x504, 0x06000000); in mt76x2u_mac_fixup_xtal()
37 mt76_wr(dev, 0x50c, 0x08800000); in mt76x2u_mac_fixup_xtal()
39 mt76_wr(dev, 0x504, 0x0); in mt76x2u_mac_fixup_xtal()
52 mt76_wr(dev, MT_XO_CTRL7, 0x5c1fee80); in mt76x2u_mac_fixup_xtal()
55 mt76_wr(dev, MT_XO_CTRL7, 0x5c1feed0); in mt76x2u_mac_fixup_xtal()
64 mt76_wr(dev, MT_WPDMA_GLO_CFG, BIT(4) | BIT(5)); in mt76x2u_mac_reset()
67 mt76_wr(dev, MT_PBF_TX_MAX_PCNT, 0xefef3f1f); in mt76x2u_mac_reset()
68 mt76_wr(dev, MT_PBF_RX_MAX_PCNT, 0xfebf); in mt76x2u_mac_reset()
72 mt76_wr(dev, MT_TX_LINK_CFG, 0x1020); in mt76x2u_mac_reset()
73 mt76_wr(dev, MT_AUTO_RSP_CFG, 0x13); in mt76x2u_mac_reset()
[all …]
H A Dusb_mcu.c102 mt76_wr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG), val); in mt76x2u_mcu_load_rom_patch()
109 mt76_wr(dev, MT_FCE_PSE_CTRL, 0x1); in mt76x2u_mcu_load_rom_patch()
111 mt76_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230); in mt76x2u_mcu_load_rom_patch()
113 mt76_wr(dev, MT_TX_CPU_FROM_FCE_MAX_COUNT, 0x1); in mt76x2u_mcu_load_rom_patch()
115 mt76_wr(dev, MT_FCE_PDMA_GLOBAL_CONF, 0x44); in mt76x2u_mcu_load_rom_patch()
117 mt76_wr(dev, MT_FCE_SKIP_FS, 0x3); in mt76x2u_mcu_load_rom_patch()
139 mt76_wr(dev, MT_MCU_SEMAPHORE_03, 1); in mt76x2u_mcu_load_rom_patch()
185 mt76_wr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG), val); in mt76x2u_mcu_load_firmware()
187 mt76_wr(dev, MT_FCE_PSE_CTRL, 0x1); in mt76x2u_mcu_load_firmware()
189 mt76_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230); in mt76x2u_mcu_load_firmware()
[all …]
H A Dpci_init.c26 mt76_wr(dev, MT_PBF_TX_MAX_PCNT, 0xefef3f1f); in mt76x2_mac_pbf_init()
27 mt76_wr(dev, MT_PBF_RX_MAX_PCNT, 0xfebf); in mt76x2_mac_pbf_init()
60 mt76_wr(dev, MT_XO_CTRL7, 0x5c1fee80); in mt76x2_fixup_xtal()
63 mt76_wr(dev, MT_XO_CTRL7, 0x5c1feed0); in mt76x2_fixup_xtal()
88 mt76_wr(dev, MT_WPDMA_GLO_CFG, val); in mt76x2_mac_reset()
104 mt76_wr(dev, MT_RF_BYPASS_0, 0x06000000); in mt76x2_mac_reset()
105 mt76_wr(dev, MT_RF_SETTING_0, 0x08800000); in mt76x2_mac_reset()
107 mt76_wr(dev, MT_RF_BYPASS_0, 0x00000000); in mt76x2_mac_reset()
109 mt76_wr(dev, MT_MCU_CLOCK_CTL, 0x1401); in mt76x2_mac_reset()
118 mt76_wr(dev, MT_WCID_DROP_BASE + i * 4, 0); in mt76x2_mac_reset()
[all …]
H A Dpci_mcu.c56 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_ROM_PATCH_OFFSET); in mt76pci_load_rom_patch()
62 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, 0); in mt76pci_load_rom_patch()
65 mt76_wr(dev, MT_MCU_INT_LEVEL, 4); in mt76pci_load_rom_patch()
75 mt76_wr(dev, MT_MCU_SEMAPHORE_03, 1); in mt76pci_load_rom_patch()
116 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_ILM_OFFSET); in mt76pci_load_firmware()
127 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_DLM_OFFSET); in mt76pci_load_firmware()
130 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, 0); in mt76pci_load_firmware()
137 mt76_wr(dev, MT_MCU_INT_LEVEL, 2); in mt76pci_load_firmware()
172 mt76_wr(dev, MT_WPDMA_RST_IDX, ~0); in mt76pci_mcu_restart()
H A Dmac.c18 mt76_wr(dev, MT_MAC_SYS_CTRL, 0); in mt76x2_mac_stop()
21 mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg & ~MT_TX_RTS_CFG_RETRY_LIMIT); in mt76x2_mac_stop()
44 mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg); in mt76x2_mac_stop()
H A Dusb_phy.c161 mt76_wr(dev, MT_BBP(AGC, 61), 0xff64a4e2); in mt76x2u_phy_set_channel()
162 mt76_wr(dev, MT_BBP(AGC, 7), 0x08081010); in mt76x2u_phy_set_channel()
163 mt76_wr(dev, MT_BBP(AGC, 11), 0x00000404); in mt76x2u_phy_set_channel()
164 mt76_wr(dev, MT_BBP(AGC, 2), 0x00007070); in mt76x2u_phy_set_channel()
165 mt76_wr(dev, MT_TXOP_CTRL_CFG, 0X04101b3f); in mt76x2u_phy_set_channel()
H A Dpci_phy.c114 mt76_wr(dev, MT_BBP(AGC, 0), val); in mt76x2_phy_set_antenna()
227 mt76_wr(dev, MT_BBP(AGC, 61), 0xFF64A4E2); in mt76x2_phy_set_channel()
228 mt76_wr(dev, MT_BBP(AGC, 7), 0x08081010); in mt76x2_phy_set_channel()
229 mt76_wr(dev, MT_BBP(AGC, 11), 0x00000404); in mt76x2_phy_set_channel()
230 mt76_wr(dev, MT_BBP(AGC, 2), 0x00007070); in mt76x2_phy_set_channel()
231 mt76_wr(dev, MT_TXOP_CTRL_CFG, 0x04101B3F); in mt76x2_phy_set_channel()
/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/
H A Ddma.c153 mt76_wr(dev, reg + MT_DMASHDL_GROUP_QUOTA(i), in mt7622_dma_sched_init()
157 mt76_wr(dev, reg + MT_DMASHDL_Q_MAP(0), 0x42104210); in mt7622_dma_sched_init()
158 mt76_wr(dev, reg + MT_DMASHDL_Q_MAP(1), 0x42104210); in mt7622_dma_sched_init()
159 mt76_wr(dev, reg + MT_DMASHDL_Q_MAP(2), 0x5); in mt7622_dma_sched_init()
160 mt76_wr(dev, reg + MT_DMASHDL_Q_MAP(3), 0); in mt7622_dma_sched_init()
162 mt76_wr(dev, reg + MT_DMASHDL_SCHED_SET0, 0x6012345f); in mt7622_dma_sched_init()
163 mt76_wr(dev, reg + MT_DMASHDL_SCHED_SET1, 0xedcba987); in mt7622_dma_sched_init()
176 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffc80000); in mt7663_dma_sched_init()
178 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_OPTIONAL), 0x70068037); in mt7663_dma_sched_init()
182 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)), in mt7663_dma_sched_init()
[all …]
H A Dusb_sdio.c87 mt76_wr(dev, MT_WTBL_RIUCR0, w5); in mt7663_usb_sdio_set_rates()
89 mt76_wr(dev, MT_WTBL_RIUCR1, in mt7663_usb_sdio_set_rates()
94 mt76_wr(dev, MT_WTBL_RIUCR2, in mt7663_usb_sdio_set_rates()
100 mt76_wr(dev, MT_WTBL_RIUCR3, in mt7663_usb_sdio_set_rates()
105 mt76_wr(dev, MT_WTBL_UPDATE, in mt7663_usb_sdio_set_rates()
110 mt76_wr(dev, addr + 27 * 4, w27); in mt7663_usb_sdio_set_rates()
238 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffe00006); in mt7663u_dma_sched_init()
242 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)), in mt7663u_dma_sched_init()
246 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(0)), 0x42104210); in mt7663u_dma_sched_init()
247 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(1)), 0x42104210); in mt7663u_dma_sched_init()
[all …]
H A Dmmio.c76 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7615_irq_handler()
92 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7615_irq_tasklet()
96 mt76_wr(dev, MT_INT_SOURCE_CSR, intr); in mt7615_irq_tasklet()
120 mt76_wr(dev, MT_MCU2HOST_INT_STATUS, mcu_int); in mt7615_irq_tasklet()
223 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7615_mmio_probe()
231 mt76_wr(dev, MT_PCIE_IRQ_ENABLE, 1); in mt7615_mmio_probe()
H A Dinit.c96 mt76_wr(dev, MT_AGG_ACR(chain), in mt7615_init_mac_chain()
101 mt76_wr(dev, MT_AGG_ARUCR(chain), in mt7615_init_mac_chain()
111 mt76_wr(dev, MT_AGG_ARDCR(chain), in mt7615_init_mac_chain()
160 mt76_wr(dev, MT_AGG_ARCR, in mt7615_mac_init()
173 mt76_wr(dev, MT_DMA_DCR0, in mt7615_mac_init()
181 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02); in mt7615_mac_init()
182 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040); in mt7615_mac_init()
462 mt76_wr(dev, MT_MCU_PCIE_REMAP_2, base); in mt7615_reg_map()
489 mt76_wr(dev, addr, val); in mt7615_led_set_config()
491 mt76_wr(dev, addr, val); in mt7615_led_set_config()
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7603/
H A Dinit.c36 mt76_wr(dev, addr + 4 * i, desc[i]); in mt7603_set_tmac_template()
59 mt76_wr(dev, MT_PSE_FRP, in mt7603_dma_sched_init()
64 mt76_wr(dev, MT_HIGH_PRIORITY_1, 0x55555553); in mt7603_dma_sched_init()
65 mt76_wr(dev, MT_HIGH_PRIORITY_2, 0x78555555); in mt7603_dma_sched_init()
67 mt76_wr(dev, MT_QUEUE_PRIORITY_1, 0x2b1a096e); in mt7603_dma_sched_init()
68 mt76_wr(dev, MT_QUEUE_PRIORITY_2, 0x785f4d3c); in mt7603_dma_sched_init()
70 mt76_wr(dev, MT_PRIORITY_MASK, 0xffffffff); in mt7603_dma_sched_init()
72 mt76_wr(dev, MT_SCH_1, page_count | (2 << 28)); in mt7603_dma_sched_init()
73 mt76_wr(dev, MT_SCH_2, max_amsdu_pages); in mt7603_dma_sched_init()
76 mt76_wr(dev, MT_PAGE_COUNT(i), max_amsdu_pages); in mt7603_dma_sched_init()
[all …]
H A Dbeacon.c31 mt76_wr(dev, MT_DMA_FQCR0, MT_DMA_FQCR0_BUSY | in mt7603_update_beacon_iter()
93 mt76_wr(dev, MT_WF_ARB_CAB_FLUSH, GENMASK(30, 16) | BIT(0)); in mt7603_pre_tbtt_tasklet()
132 mt76_wr(dev, MT_WF_ARB_CAB_COUNT_B0_REG(i), in mt7603_pre_tbtt_tasklet()
135 mt76_wr(dev, MT_WF_ARB_CAB_START, in mt7603_pre_tbtt_tasklet()
160 mt76_wr(dev, MT_HW_INT_MASK(3), 0); in mt7603_beacon_set_timer()
166 mt76_wr(dev, MT_TBTT, in mt7603_beacon_set_timer()
169 mt76_wr(dev, MT_TBTT_TIMER_CFG, 0x99); /* start timer */ in mt7603_beacon_set_timer()
176 mt76_wr(dev, MT_PRE_TBTT, pre_tbtt); in mt7603_beacon_set_timer()
H A Dmac.c67 mt76_wr(dev, MT_TIMEOUT_CCK, cck + reg_offset); in mt7603_mac_set_timing()
68 mt76_wr(dev, MT_TIMEOUT_OFDM, ofdm + reg_offset); in mt7603_mac_set_timing()
69 mt76_wr(dev, MT_IFS, in mt7603_mac_set_timing()
154 mt76_wr(dev, addr + i, 0); in mt7603_wtbl_init()
160 mt76_wr(dev, addr + i, 0); in mt7603_wtbl_init()
164 mt76_wr(dev, addr + i, 0); in mt7603_wtbl_init()
178 mt76_wr(dev, addr + 3 * 4, val); in mt7603_wtbl_set_skip_tx()
196 mt76_wr(dev, MT_TX_ABORT, MT_TX_ABORT_EN | in mt7603_filter_tx()
205 mt76_wr(dev, MT_WF_ARB_TX_FLUSH_0, flush_mask); in mt7603_filter_tx()
207 mt76_wr(dev, MT_WF_ARB_TX_START_0, flush_mask); in mt7603_filter_tx()
[all …]
H A Dmain.c53 mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), in mt7603_add_interface()
55 mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), in mt7603_add_interface()
60 mt76_wr(dev, MT_BSSID0(mvif->idx), in mt7603_add_interface()
62 mt76_wr(dev, MT_BSSID1(mvif->idx), in mt7603_add_interface()
96 mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 0); in mt7603_remove_interface()
97 mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 0); in mt7603_remove_interface()
98 mt76_wr(dev, MT_BSSID0(mvif->idx), 0); in mt7603_remove_interface()
99 mt76_wr(dev, MT_BSSID1(mvif->idx), 0); in mt7603_remove_interface()
179 mt76_wr(dev, MT_WF_RMAC_CH_FREQ, idx); in mt7603_set_channel()
251 mt76_wr(dev, MT_WF_RFCR, dev->rxfilter); in mt7603_config()
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dmt792x_dma.c18 mt76_wr(dev, dev->irq_map->host_irq_enable, 0); in mt792x_irq_handler()
35 mt76_wr(dev, irq_map->host_irq_enable, 0); in mt792x_irq_tasklet()
39 mt76_wr(dev, MT_WFDMA0_HOST_INT_STA, intr); in mt792x_irq_tasklet()
54 mt76_wr(dev, MT_MCU_CMD, intr_sw); in mt792x_irq_tasklet()
94 mt76_wr(dev, MT_WFDMA0_RX_RING0_EXT_CTRL, PREFETCH(0x0, 0x4)); in mt792x_dma_prefetch()
95 mt76_wr(dev, MT_WFDMA0_RX_RING2_EXT_CTRL, PREFETCH(0x40, 0x4)); in mt792x_dma_prefetch()
96 mt76_wr(dev, MT_WFDMA0_RX_RING3_EXT_CTRL, PREFETCH(0x80, 0x4)); in mt792x_dma_prefetch()
97 mt76_wr(dev, MT_WFDMA0_RX_RING4_EXT_CTRL, PREFETCH(0xc0, 0x4)); in mt792x_dma_prefetch()
98 mt76_wr(dev, MT_WFDMA0_RX_RING5_EXT_CTRL, PREFETCH(0x100, 0x4)); in mt792x_dma_prefetch()
100 mt76_wr(dev, MT_WFDMA0_TX_RING0_EXT_CTRL, PREFETCH(0x140, 0x4)); in mt792x_dma_prefetch()
[all …]
H A Dmt76x02_dfs.c148 mt76_wr(dev, MT_BBP(DFS, 36), data); in mt76x02_dfs_set_capture_mode_ctrl()
212 mt76_wr(dev, MT_BBP(DFS, 1), 0xf); in mt76x02_dfs_detector_reset()
254 mt76_wr(dev, MT_BBP(DFS, 0), data); in mt76x02_dfs_get_hw_pulse()
668 mt76_wr(dev, MT_BBP(DFS, 1), 0xf); in mt76x02_dfs_tasklet()
742 mt76_wr(dev, MT_BBP(DFS, 2), data); in mt76x02_dfs_set_bbp_params()
745 mt76_wr(dev, MT_BBP(DFS, 3), data); in mt76x02_dfs_set_bbp_params()
749 mt76_wr(dev, MT_BBP(DFS, 0), i); in mt76x02_dfs_set_bbp_params()
754 mt76_wr(dev, MT_BBP(DFS, 4), data); in mt76x02_dfs_set_bbp_params()
759 mt76_wr(dev, MT_BBP(DFS, 5), data); in mt76x02_dfs_set_bbp_params()
762 mt76_wr(dev, MT_BBP(DFS, 7), radar_specs[i].t_low); in mt76x02_dfs_set_bbp_params()
[all …]
H A Dmt76x02_phy.c28 mt76_wr(dev, MT_BBP(AGC, 0), val); in mt76x02_phy_set_rxpath()
100 mt76_wr(dev, MT_TX_PWR_CFG_0, in mt76x02_phy_set_txpower()
103 mt76_wr(dev, MT_TX_PWR_CFG_1, in mt76x02_phy_set_txpower()
106 mt76_wr(dev, MT_TX_PWR_CFG_2, in mt76x02_phy_set_txpower()
109 mt76_wr(dev, MT_TX_PWR_CFG_3, in mt76x02_phy_set_txpower()
112 mt76_wr(dev, MT_TX_PWR_CFG_4, in mt76x02_phy_set_txpower()
114 mt76_wr(dev, MT_TX_PWR_CFG_7, in mt76x02_phy_set_txpower()
117 mt76_wr(dev, MT_TX_PWR_CFG_8, in mt76x02_phy_set_txpower()
119 mt76_wr(dev, MT_TX_PWR_CFG_9, in mt76x02_phy_set_txpower()
H A Dmt76x02_mmio.c36 mt76_wr(dev, MT_BCN_BYPASS_MASK, in mt76x02_pre_tbtt_tasklet()
101 mt76_wr(dev, MT_INT_TIMER_EN, 0); in mt76x02e_init_beacon_config()
190 mt76_wr(dev, MT_WPDMA_RST_IDX, ~0); in mt76x02_dma_init()
258 mt76_wr(dev, MT_INT_SOURCE_CSR, intr); in mt76x02_irq_handler()
305 mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX); in mt76x02_dma_enable()
325 mt76_wr(dev, MT_WPDMA_GLO_CFG, val); in mt76x02_dma_disable()
333 mt76_wr(dev, MT_RX_FILTR_CFG, dev->mt76.rxfilter); in mt76x02_mac_start()
334 mt76_wr(dev, MT_MAC_SYS_CTRL, in mt76x02_mac_start()
458 mt76_wr(dev, MT_MAC_SYS_CTRL, 0); in mt76x02_watchdog_reset()
462 mt76_wr(dev, MT_INT_SOURCE_CSR, 0xffffffff); in mt76x02_watchdog_reset()
/freebsd/sys/contrib/dev/mediatek/mt76/mt7996/
H A Ddma.c66 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_FWDL) + ofs, PREFETCH(0x0, 0x2)); in __mt7996_dma_prefetch()
67 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WM) + ofs, PREFETCH(0x20, 0x2)); in __mt7996_dma_prefetch()
68 mt76_wr(dev, MT_TXQ_EXT_CTRL(0) + ofs, PREFETCH(0x40, 0x4)); in __mt7996_dma_prefetch()
69 mt76_wr(dev, MT_TXQ_EXT_CTRL(1) + ofs, PREFETCH(0x80, 0x4)); in __mt7996_dma_prefetch()
70 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WA) + ofs, PREFETCH(0xc0, 0x2)); in __mt7996_dma_prefetch()
71 mt76_wr(dev, MT_TXQ_EXT_CTRL(2) + ofs, PREFETCH(0xe0, 0x4)); in __mt7996_dma_prefetch()
72 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MCU) + ofs, PREFETCH(0x120, 0x2)); in __mt7996_dma_prefetch()
73 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MCU_WA) + ofs, PREFETCH(0x140, 0x2)); in __mt7996_dma_prefetch()
74 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MAIN_WA) + ofs, PREFETCH(0x160, 0x2)); in __mt7996_dma_prefetch()
75 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND2_WA) + ofs, PREFETCH(0x180, 0x2)); in __mt7996_dma_prefetch()
[all …]
H A Dmmio.c248 mt76_wr(dev, MT_INT_MASK_CSR, mdev->mmio.irqmask); in mt7996_dual_hif_set_irq_mask()
249 mt76_wr(dev, MT_INT1_MASK_CSR, mdev->mmio.irqmask); in mt7996_dual_hif_set_irq_mask()
269 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7996_irq_tasklet()
271 mt76_wr(dev, MT_INT1_MASK_CSR, 0); in mt7996_irq_tasklet()
275 mt76_wr(dev, MT_INT_SOURCE_CSR, intr); in mt7996_irq_tasklet()
280 mt76_wr(dev, MT_INT1_SOURCE_CSR, intr1); in mt7996_irq_tasklet()
303 mt76_wr(dev, MT_MCU_CMD, val); in mt7996_irq_tasklet()
315 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7996_irq_handler()
317 mt76_wr(dev, MT_INT1_MASK_CSR, 0); in mt7996_irq_handler()
365 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7996_mmio_probe()
/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/
H A Ddma.c127 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_FWDL) + ofs, PREFETCH(0x0, 0x4)); in __mt7915_dma_prefetch()
128 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WM) + ofs, PREFETCH(0x40, 0x4)); in __mt7915_dma_prefetch()
129 mt76_wr(dev, MT_TXQ_EXT_CTRL(0) + ofs, PREFETCH(0x80, 0x4)); in __mt7915_dma_prefetch()
130 mt76_wr(dev, MT_TXQ_EXT_CTRL(1) + ofs, PREFETCH(0xc0, 0x4)); in __mt7915_dma_prefetch()
131 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WA) + ofs, PREFETCH(0x100, 0x4)); in __mt7915_dma_prefetch()
133 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MCU) + ofs, in __mt7915_dma_prefetch()
135 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MCU_WA) + ofs, in __mt7915_dma_prefetch()
138 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MAIN_WA) + ofs, in __mt7915_dma_prefetch()
142 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1_WA) + ofs, in __mt7915_dma_prefetch()
144 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MAIN) + ofs, in __mt7915_dma_prefetch()
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x0/
H A Dusb_mcu.c92 mt76_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN | in mt76x0u_load_firmware()
125 mt76_wr(dev, 0x1004, 0x2c); in mt76x0u_load_firmware()
133 mt76_wr(dev, MT_FCE_PSE_CTRL, 1); in mt76x0u_load_firmware()
136 mt76_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230); in mt76x0u_load_firmware()
138 mt76_wr(dev, MT_TX_CPU_FROM_FCE_MAX_COUNT, 1); in mt76x0u_load_firmware()
140 mt76_wr(dev, MT_FCE_PDMA_GLOBAL_CONF, 0x44); in mt76x0u_load_firmware()
142 mt76_wr(dev, MT_FCE_SKIP_FS, 3); in mt76x0u_load_firmware()
146 mt76_wr(dev, MT_USB_DMA_CFG, val); in mt76x0u_load_firmware()
148 mt76_wr(dev, MT_USB_DMA_CFG, val); in mt76x0u_load_firmware()
154 mt76_wr(dev, MT_FCE_PSE_CTRL, 1); in mt76x0u_load_firmware()
H A Dpci_mcu.c68 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, 0); in mt76x0e_load_firmware()
86 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_DLM_OFFSET); in mt76x0e_load_firmware()
93 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, 0); in mt76x0e_load_firmware()
95 mt76_wr(dev, MT_MCU_INT_LEVEL, 0x3); in mt76x0e_load_firmware()
97 mt76_wr(dev, MT_MCU_RESET_CTL, 0x300); in mt76x0e_load_firmware()
110 mt76_wr(dev, MT_MCU_SEMAPHORE_00, 0x1); in mt76x0e_load_firmware()

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