bhyve/riscv: clean up SBI handlers.

Similar to kernel SBI clean up patch, do clean up in userspace SBI part:

- use standard SBI error codes;
- remove unused function.

Differential Revision: https:

bhyve/riscv: clean up SBI handlers.

Similar to kernel SBI clean up patch, do clean up in userspace SBI part:

- use standard SBI error codes;
- remove unused function.

Differential Revision: https://reviews.freebsd.org/D48829

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bhyve: Sleep for a short period after VM_EXITCODE_DEBUG exits

Apply 2e2b8afa52da6 for RISC-V:

As on amd64 and aarch64 APs will repeatedly exit until they are
brought online, so this hack helps avoi

bhyve: Sleep for a short period after VM_EXITCODE_DEBUG exits

Apply 2e2b8afa52da6 for RISC-V:

As on amd64 and aarch64 APs will repeatedly exit until they are
brought online, so this hack helps avoid burning CPU time during
guest bootup.

Reviewed by: corvink, markj
Differential Revision: https://reviews.freebsd.org/D48811

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bhyve/riscv: fix HSM extension handling.

Pass private data from supervisor as the second argument on secondary
CPU startup.

This is used by Linux guest.

Reviewed by: markj
Differential Revision: h

bhyve/riscv: fix HSM extension handling.

Pass private data from supervisor as the second argument on secondary
CPU startup.

This is used by Linux guest.

Reviewed by: markj
Differential Revision: https://reviews.freebsd.org/D48807

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bhyve/riscv: fix interrupts-extended property.

Construct interrupts-extended (property of APLIC) properly.

Reviewed by: markj
Differential Revision: https://reviews.freebsd.org/D48713

bhyve/riscv: remove clock-frequency from CPU node.

Remove CPU clock-frequency property as incorrectly constructed
and not needed.

Reviewed by: markj
Differential Revision: https://reviews.freebsd.o

bhyve/riscv: remove clock-frequency from CPU node.

Remove CPU clock-frequency property as incorrectly constructed
and not needed.

Reviewed by: markj
Differential Revision: https://reviews.freebsd.org/D48712

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bhyve/riscv: add clock-frequency property to DTS.

Add clock-frequency property to the UART adapter node in DTS.

Differential Revision: https://reviews.freebsd.org/D48699

riscv vmm: virtual timer support.

Add a virtual timer implementation based on SBI Time extension.
This is needed for Eswin EIC7700 SoC which does not include the newer SSTC
extension.

Timer interru

riscv vmm: virtual timer support.

Add a virtual timer implementation based on SBI Time extension.
This is needed for Eswin EIC7700 SoC which does not include the newer SSTC
extension.

Timer interrupt pending bit (STIP) could not be cleared in the guest system,
so rework interrupts handling: add new "interrupts_pending" field. Use it
for timer interrupt only for now, but later we can extend to store all
pending interrupts (Timer, IPI and External).

With this I'm able to boot FreeBSD (SMP) guest on HiFive Premier P550,
which is the first real hardware with RISC-V 'H'-spec included.

Differential Revision: https://reviews.freebsd.org/D48133

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