xref: /freebsd/sys/contrib/device-tree/Bindings/clock/mediatek,mt6795-sys-clock.yaml (revision 7ab1a32cd43cbae61ad4dd435d6a482bbf61cb52) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/mediatek,mt6795-sys-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek System Clock Controller for MT6795
8
9maintainers:
10  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11  - Chun-Jie Chen <chun-jie.chen@mediatek.com>
12
13description:
14  The Mediatek system clock controller provides various clocks and system
15  configuration like reset and bus protection on MT6795.
16
17properties:
18  compatible:
19    items:
20      - enum:
21          - mediatek,mt6795-apmixedsys
22          - mediatek,mt6795-infracfg
23          - mediatek,mt6795-pericfg
24          - mediatek,mt6795-topckgen
25      - const: syscon
26
27  reg:
28    maxItems: 1
29
30  '#clock-cells':
31    const: 1
32
33  '#reset-cells':
34    const: 1
35
36required:
37  - compatible
38  - reg
39  - '#clock-cells'
40
41additionalProperties: false
42
43examples:
44  - |
45    soc {
46        #address-cells = <2>;
47        #size-cells = <2>;
48
49        topckgen: clock-controller@10000000 {
50            compatible = "mediatek,mt6795-topckgen", "syscon";
51            reg = <0 0x10000000 0 0x1000>;
52            #clock-cells = <1>;
53        };
54    };
55