1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/ioctl.h> 30 #include <sys/mman.h> 31 #include <sys/socket.h> 32 #include <sys/stat.h> 33 #include <sys/sysctl.h> 34 35 #include <arpa/inet.h> 36 #include <net/ethernet.h> 37 #include <net/sff8472.h> 38 #include <netinet/in.h> 39 40 #include <ctype.h> 41 #include <err.h> 42 #include <errno.h> 43 #include <fcntl.h> 44 #include <limits.h> 45 #include <stdbool.h> 46 #include <stdint.h> 47 #include <stdio.h> 48 #include <stdlib.h> 49 #include <string.h> 50 #include <unistd.h> 51 #include <pcap.h> 52 53 #include "t4_ioctl.h" 54 #include "tcb_common.h" 55 56 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo)) 57 #define max(x, y) ((x) > (y) ? (x) : (y)) 58 59 static struct { 60 const char *progname, *nexus; 61 int chip_id; /* 4 for T4, 5 for T5, and so on. */ 62 int inst; /* instance of nexus device */ 63 int pf; /* PF# of the nexus (if not VF). */ 64 bool vf; /* Nexus is a VF. */ 65 66 int fd; 67 bool warn_on_ioctl_err; 68 } g; 69 70 struct reg_info { 71 const char *name; 72 uint32_t addr; 73 uint32_t len; 74 }; 75 76 struct mod_regs { 77 const char *name; 78 const struct reg_info *ri; 79 }; 80 81 struct field_desc { 82 const char *name; /* Field name */ 83 unsigned short start; /* Start bit position */ 84 unsigned short end; /* End bit position */ 85 unsigned char shift; /* # of low order bits omitted and implicitly 0 */ 86 unsigned char hex; /* Print field in hex instead of decimal */ 87 unsigned char islog2; /* Field contains the base-2 log of the value */ 88 }; 89 90 #include "reg_defs_t4.c" 91 #include "reg_defs_t5.c" 92 #include "reg_defs_t6.c" 93 #include "reg_defs_t4vf.c" 94 95 static void 96 usage(FILE *fp) 97 { 98 fprintf(fp, "Usage: %s <nexus> [operation]\n", g.progname); 99 fprintf(fp, 100 "\tclearstats <port> clear port statistics\n" 101 "\tclip hold|release <ip6> hold/release an address\n" 102 "\tclip list list the CLIP table\n" 103 "\tcontext <type> <id> show an SGE context\n" 104 "\tdumpstate <dump.bin> dump chip state\n" 105 "\tfilter <idx> [<param> <val>] ... set a filter\n" 106 "\tfilter <idx> delete|clear [prio 1] delete a filter\n" 107 "\tfilter list list all filters\n" 108 "\tfilter mode [<match>] ... get/set global filter mode\n" 109 "\thashfilter [<param> <val>] ... set a hashfilter\n" 110 "\thashfilter <idx> delete|clear delete a hashfilter\n" 111 "\thashfilter list list all hashfilters\n" 112 "\thashfilter mode [<match>] ... get/set global hashfilter mode\n" 113 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n" 114 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n" 115 "\tloadboot clear [pf|offset <val>] remove boot image\n" 116 "\tloadboot-cfg <bc.bin> install boot config\n" 117 "\tloadboot-cfg clear remove boot config\n" 118 "\tloadcfg <fw-config.txt> install configuration file\n" 119 "\tloadcfg clear remove configuration file\n" 120 "\tloadfw <fw-image.bin> install firmware\n" 121 "\tmemdump <addr> <len> dump a memory range\n" 122 "\tmodinfo <port> [raw] optics/cable information\n" 123 "\tpolicy <policy.txt> install offload policy\n" 124 "\tpolicy clear remove offload policy\n" 125 "\treg <address>[=<val>] read/write register\n" 126 "\treg64 <address>[=<val>] read/write 64 bit register\n" 127 "\tregdump [<module>] ... dump registers\n" 128 "\tsched-class params <param> <val> .. configure TX scheduler class\n" 129 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n" 130 "\tstdio interactive mode\n" 131 "\ttcb <tid> read TCB\n" 132 "\ttracer <idx> tx<n>|rx<n>|lo<n> set and enable a tracer\n" 133 "\ttracer <idx> disable|enable disable or enable a tracer\n" 134 "\ttracer list list all tracers\n" 135 ); 136 } 137 138 static inline unsigned int 139 get_card_vers(unsigned int version) 140 { 141 return (version & 0x3ff); 142 } 143 144 static int 145 real_doit(unsigned long cmd, void *data, const char *cmdstr) 146 { 147 if (ioctl(g.fd, cmd, data) < 0) { 148 if (g.warn_on_ioctl_err) 149 warn("%s", cmdstr); 150 return (errno); 151 } 152 return (0); 153 } 154 #define doit(x, y) real_doit(x, y, #x) 155 156 static char * 157 str_to_number(const char *s, long *val, long long *vall) 158 { 159 char *p; 160 161 if (vall) 162 *vall = strtoll(s, &p, 0); 163 else if (val) 164 *val = strtol(s, &p, 0); 165 else 166 p = NULL; 167 168 return (p); 169 } 170 171 static int 172 read_reg(long addr, int size, long long *val) 173 { 174 struct t4_reg reg; 175 int rc; 176 177 reg.addr = (uint32_t) addr; 178 reg.size = (uint32_t) size; 179 reg.val = 0; 180 181 rc = doit(CHELSIO_T4_GETREG, ®); 182 183 *val = reg.val; 184 185 return (rc); 186 } 187 188 static int 189 write_reg(long addr, int size, long long val) 190 { 191 struct t4_reg reg; 192 193 reg.addr = (uint32_t) addr; 194 reg.size = (uint32_t) size; 195 reg.val = (uint64_t) val; 196 197 return doit(CHELSIO_T4_SETREG, ®); 198 } 199 200 static int 201 register_io(int argc, const char *argv[], int size) 202 { 203 char *p, *v; 204 long addr; 205 long long val; 206 int w = 0, rc; 207 208 if (argc == 1) { 209 /* <reg> OR <reg>=<value> */ 210 211 p = str_to_number(argv[0], &addr, NULL); 212 if (*p) { 213 if (*p != '=') { 214 warnx("invalid register \"%s\"", argv[0]); 215 return (EINVAL); 216 } 217 218 w = 1; 219 v = p + 1; 220 p = str_to_number(v, NULL, &val); 221 222 if (*p) { 223 warnx("invalid value \"%s\"", v); 224 return (EINVAL); 225 } 226 } 227 228 } else if (argc == 2) { 229 /* <reg> <value> */ 230 231 w = 1; 232 233 p = str_to_number(argv[0], &addr, NULL); 234 if (*p) { 235 warnx("invalid register \"%s\"", argv[0]); 236 return (EINVAL); 237 } 238 239 p = str_to_number(argv[1], NULL, &val); 240 if (*p) { 241 warnx("invalid value \"%s\"", argv[1]); 242 return (EINVAL); 243 } 244 } else { 245 warnx("reg: invalid number of arguments (%d)", argc); 246 return (EINVAL); 247 } 248 249 if (w) 250 rc = write_reg(addr, size, val); 251 else { 252 rc = read_reg(addr, size, &val); 253 if (rc == 0) 254 printf("0x%llx [%llu]\n", val, val); 255 } 256 257 return (rc); 258 } 259 260 static inline uint32_t 261 xtract(uint32_t val, int shift, int len) 262 { 263 return (val >> shift) & ((1 << len) - 1); 264 } 265 266 static int 267 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) 268 { 269 uint32_t reg_val = 0; 270 271 for ( ; reg_array->name; ++reg_array) 272 if (!reg_array->len) { 273 reg_val = regs[reg_array->addr / 4]; 274 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, 275 reg_array->name, reg_val, reg_val); 276 } else { 277 uint32_t v = xtract(reg_val, reg_array->addr, 278 reg_array->len); 279 280 printf(" %*u:%u %-47s %#-10x %u\n", 281 reg_array->addr < 10 ? 3 : 2, 282 reg_array->addr + reg_array->len - 1, 283 reg_array->addr, reg_array->name, v, v); 284 } 285 286 return (1); 287 } 288 289 static int 290 dump_regs_table(int argc, const char *argv[], const uint32_t *regs, 291 const struct mod_regs *modtab, int nmodules) 292 { 293 int i, j, match; 294 295 for (i = 0; i < argc; i++) { 296 for (j = 0; j < nmodules; j++) { 297 if (!strcmp(argv[i], modtab[j].name)) 298 break; 299 } 300 301 if (j == nmodules) { 302 warnx("invalid register block \"%s\"", argv[i]); 303 fprintf(stderr, "\nAvailable blocks:"); 304 for ( ; nmodules; nmodules--, modtab++) 305 fprintf(stderr, " %s", modtab->name); 306 fprintf(stderr, "\n"); 307 return (EINVAL); 308 } 309 } 310 311 for ( ; nmodules; nmodules--, modtab++) { 312 313 match = argc == 0 ? 1 : 0; 314 for (i = 0; !match && i < argc; i++) { 315 if (!strcmp(argv[i], modtab->name)) 316 match = 1; 317 } 318 319 if (match) 320 dump_block_regs(modtab->ri, regs); 321 } 322 323 return (0); 324 } 325 326 #define T4_MODREGS(name) { #name, t4_##name##_regs } 327 static int 328 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) 329 { 330 static struct mod_regs t4_mod[] = { 331 T4_MODREGS(sge), 332 { "pci", t4_pcie_regs }, 333 T4_MODREGS(dbg), 334 T4_MODREGS(mc), 335 T4_MODREGS(ma), 336 { "edc0", t4_edc_0_regs }, 337 { "edc1", t4_edc_1_regs }, 338 T4_MODREGS(cim), 339 T4_MODREGS(tp), 340 T4_MODREGS(ulp_rx), 341 T4_MODREGS(ulp_tx), 342 { "pmrx", t4_pm_rx_regs }, 343 { "pmtx", t4_pm_tx_regs }, 344 T4_MODREGS(mps), 345 { "cplsw", t4_cpl_switch_regs }, 346 T4_MODREGS(smb), 347 { "i2c", t4_i2cm_regs }, 348 T4_MODREGS(mi), 349 T4_MODREGS(uart), 350 T4_MODREGS(pmu), 351 T4_MODREGS(sf), 352 T4_MODREGS(pl), 353 T4_MODREGS(le), 354 T4_MODREGS(ncsi), 355 T4_MODREGS(xgmac) 356 }; 357 358 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod)); 359 } 360 #undef T4_MODREGS 361 362 #define T5_MODREGS(name) { #name, t5_##name##_regs } 363 static int 364 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs) 365 { 366 static struct mod_regs t5_mod[] = { 367 T5_MODREGS(sge), 368 { "pci", t5_pcie_regs }, 369 T5_MODREGS(dbg), 370 { "mc0", t5_mc_0_regs }, 371 { "mc1", t5_mc_1_regs }, 372 T5_MODREGS(ma), 373 { "edc0", t5_edc_t50_regs }, 374 { "edc1", t5_edc_t51_regs }, 375 T5_MODREGS(cim), 376 T5_MODREGS(tp), 377 { "ulprx", t5_ulp_rx_regs }, 378 { "ulptx", t5_ulp_tx_regs }, 379 { "pmrx", t5_pm_rx_regs }, 380 { "pmtx", t5_pm_tx_regs }, 381 T5_MODREGS(mps), 382 { "cplsw", t5_cpl_switch_regs }, 383 T5_MODREGS(smb), 384 { "i2c", t5_i2cm_regs }, 385 T5_MODREGS(mi), 386 T5_MODREGS(uart), 387 T5_MODREGS(pmu), 388 T5_MODREGS(sf), 389 T5_MODREGS(pl), 390 T5_MODREGS(le), 391 T5_MODREGS(ncsi), 392 T5_MODREGS(mac), 393 { "hma", t5_hma_t5_regs } 394 }; 395 396 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod)); 397 } 398 #undef T5_MODREGS 399 400 #define T6_MODREGS(name) { #name, t6_##name##_regs } 401 static int 402 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) 403 { 404 static struct mod_regs t6_mod[] = { 405 T6_MODREGS(sge), 406 { "pci", t6_pcie_regs }, 407 T6_MODREGS(dbg), 408 { "mc0", t6_mc_0_regs }, 409 T6_MODREGS(ma), 410 { "edc0", t6_edc_t60_regs }, 411 { "edc1", t6_edc_t61_regs }, 412 T6_MODREGS(cim), 413 T6_MODREGS(tp), 414 { "ulprx", t6_ulp_rx_regs }, 415 { "ulptx", t6_ulp_tx_regs }, 416 { "pmrx", t6_pm_rx_regs }, 417 { "pmtx", t6_pm_tx_regs }, 418 T6_MODREGS(mps), 419 { "cplsw", t6_cpl_switch_regs }, 420 T6_MODREGS(smb), 421 { "i2c", t6_i2cm_regs }, 422 T6_MODREGS(mi), 423 T6_MODREGS(uart), 424 T6_MODREGS(pmu), 425 T6_MODREGS(sf), 426 T6_MODREGS(pl), 427 T6_MODREGS(le), 428 T6_MODREGS(ncsi), 429 T6_MODREGS(mac), 430 { "hma", t6_hma_t6_regs } 431 }; 432 433 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod)); 434 } 435 #undef T6_MODREGS 436 437 static int 438 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) 439 { 440 static struct mod_regs t4vf_mod[] = { 441 { "sge", t4vf_sge_regs }, 442 { "mps", t4vf_mps_regs }, 443 { "pl", t4vf_pl_regs }, 444 { "mbdata", t4vf_mbdata_regs }, 445 { "cim", t4vf_cim_regs }, 446 }; 447 448 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod)); 449 } 450 451 static int 452 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs) 453 { 454 static struct mod_regs t5vf_mod[] = { 455 { "sge", t5vf_sge_regs }, 456 { "mps", t4vf_mps_regs }, 457 { "pl", t5vf_pl_regs }, 458 { "mbdata", t4vf_mbdata_regs }, 459 { "cim", t4vf_cim_regs }, 460 }; 461 462 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod)); 463 } 464 465 static int 466 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) 467 { 468 static struct mod_regs t6vf_mod[] = { 469 { "sge", t5vf_sge_regs }, 470 { "mps", t4vf_mps_regs }, 471 { "pl", t6vf_pl_regs }, 472 { "mbdata", t4vf_mbdata_regs }, 473 { "cim", t4vf_cim_regs }, 474 }; 475 476 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod)); 477 } 478 479 static int 480 dump_regs(int argc, const char *argv[]) 481 { 482 int vers, revision, rc; 483 struct t4_regdump regs; 484 uint32_t len; 485 486 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE); 487 regs.data = calloc(1, len); 488 if (regs.data == NULL) { 489 warnc(ENOMEM, "regdump"); 490 return (ENOMEM); 491 } 492 493 regs.len = len; 494 rc = doit(CHELSIO_T4_REGDUMP, ®s); 495 if (rc != 0) 496 return (rc); 497 498 vers = get_card_vers(regs.version); 499 revision = (regs.version >> 10) & 0x3f; 500 501 if (vers == 4) { 502 if (revision == 0x3f) 503 rc = dump_regs_t4vf(argc, argv, regs.data); 504 else 505 rc = dump_regs_t4(argc, argv, regs.data); 506 } else if (vers == 5) { 507 if (revision == 0x3f) 508 rc = dump_regs_t5vf(argc, argv, regs.data); 509 else 510 rc = dump_regs_t5(argc, argv, regs.data); 511 } else if (vers == 6) { 512 if (revision == 0x3f) 513 rc = dump_regs_t6vf(argc, argv, regs.data); 514 else 515 rc = dump_regs_t6(argc, argv, regs.data); 516 } else { 517 warnx("%s (type %d, rev %d) is not a known card.", 518 g.nexus, vers, revision); 519 return (ENOTSUP); 520 } 521 522 free(regs.data); 523 return (rc); 524 } 525 526 static void 527 do_show_info_header(uint32_t mode) 528 { 529 uint32_t i; 530 531 printf("%4s %8s", "Idx", "Hits"); 532 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 533 switch (mode & i) { 534 case T4_FILTER_FCoE: 535 printf(" FCoE"); 536 break; 537 case T4_FILTER_PORT: 538 printf(" Port"); 539 break; 540 case T4_FILTER_VNIC: 541 if (mode & T4_FILTER_IC_VNIC) 542 printf(" VFvld:PF:VF"); 543 else 544 printf(" vld:oVLAN"); 545 break; 546 case T4_FILTER_VLAN: 547 printf(" vld:VLAN"); 548 break; 549 case T4_FILTER_IP_TOS: 550 printf(" TOS"); 551 break; 552 case T4_FILTER_IP_PROTO: 553 printf(" Prot"); 554 break; 555 case T4_FILTER_ETH_TYPE: 556 printf(" EthType"); 557 break; 558 case T4_FILTER_MAC_IDX: 559 printf(" MACIdx"); 560 break; 561 case T4_FILTER_MPS_HIT_TYPE: 562 printf(" MPS"); 563 break; 564 case T4_FILTER_IP_FRAGMENT: 565 printf(" Frag"); 566 break; 567 default: 568 /* compressed filter field not enabled */ 569 break; 570 } 571 } 572 printf(" %20s %20s %9s %9s %s\n", 573 "DIP", "SIP", "DPORT", "SPORT", "Action"); 574 } 575 576 /* 577 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } 578 * ordered tuple. If the parameter name in the argument sub-vector does not 579 * match the passed in parameter name, then a zero is returned for the 580 * function and no parsing is performed. If there is a match, then the value 581 * and optional mask are parsed and returned in the provided return value 582 * pointers. If no optional mask is specified, then a default mask of all 1s 583 * will be returned. 584 * 585 * An error in parsing the value[:mask] will result in an error message and 586 * program termination. 587 */ 588 static int 589 parse_val_mask(const char *param, const char *args[], uint32_t *val, 590 uint32_t *mask, int hashfilter) 591 { 592 long l; 593 char *p; 594 595 if (strcmp(param, args[0]) != 0) 596 return (EINVAL); 597 598 p = str_to_number(args[1], &l, NULL); 599 if (l >= 0 && l <= UINT32_MAX) { 600 *val = (uint32_t)l; 601 if (p > args[1]) { 602 if (p[0] == 0) { 603 *mask = ~0; 604 return (0); 605 } 606 607 if (p[0] == ':' && p[1] != 0) { 608 if (hashfilter) { 609 warnx("param %s: mask not allowed for " 610 "hashfilter or nat params", param); 611 return (EINVAL); 612 } 613 p = str_to_number(p + 1, &l, NULL); 614 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) { 615 *mask = (uint32_t)l; 616 return (0); 617 } 618 } 619 } 620 } 621 622 warnx("parameter \"%s\" has bad \"value[:mask]\" %s", 623 args[0], args[1]); 624 625 return (EINVAL); 626 } 627 628 /* 629 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } 630 * ordered tuple. If the parameter name in the argument sub-vector does not 631 * match the passed in parameter name, then a zero is returned for the 632 * function and no parsing is performed. If there is a match, then the value 633 * and optional mask are parsed and returned in the provided return value 634 * pointers. If no optional mask is specified, then a default mask of all 1s 635 * will be returned. 636 * 637 * The value return parameter "afp" is used to specify the expected address 638 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual 639 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 640 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and 641 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 642 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are 643 * returned in the first four bytes of the address and mask return values with 644 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, 645 * 1, 2, 3}, respectively. 646 * 647 * An error in parsing the value[:mask] will result in an error message and 648 * program termination. 649 */ 650 static int 651 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], 652 uint8_t mask[], int maskless) 653 { 654 const char *colon, *afn; 655 char *slash; 656 uint8_t *m; 657 int af, ret; 658 unsigned int masksize; 659 660 /* 661 * Is this our parameter? 662 */ 663 if (strcmp(param, args[0]) != 0) 664 return (EINVAL); 665 666 /* 667 * Fundamental IPv4 versus IPv6 selection. 668 */ 669 colon = strchr(args[1], ':'); 670 if (!colon) { 671 afn = "IPv4"; 672 af = AF_INET; 673 masksize = 32; 674 } else { 675 afn = "IPv6"; 676 af = AF_INET6; 677 masksize = 128; 678 } 679 if (*afp == AF_UNSPEC) 680 *afp = af; 681 else if (*afp != af) { 682 warnx("address %s is not of expected family %s", 683 args[1], *afp == AF_INET ? "IP" : "IPv6"); 684 return (EINVAL); 685 } 686 687 /* 688 * Parse address (temporarily stripping off any "/mask" 689 * specification). 690 */ 691 slash = strchr(args[1], '/'); 692 if (slash) 693 *slash = 0; 694 ret = inet_pton(af, args[1], addr); 695 if (slash) 696 *slash = '/'; 697 if (ret <= 0) { 698 warnx("Cannot parse %s %s address %s", param, afn, args[1]); 699 return (EINVAL); 700 } 701 702 /* 703 * Parse optional mask specification. 704 */ 705 if (slash) { 706 char *p; 707 unsigned int prefix = strtoul(slash + 1, &p, 10); 708 709 if (maskless) { 710 warnx("mask cannot be provided for maskless specification"); 711 return (EINVAL); 712 } 713 714 if (p == slash + 1) { 715 warnx("missing address prefix for %s", param); 716 return (EINVAL); 717 } 718 if (*p) { 719 warnx("%s is not a valid address prefix", slash + 1); 720 return (EINVAL); 721 } 722 if (prefix > masksize) { 723 warnx("prefix %u is too long for an %s address", 724 prefix, afn); 725 return (EINVAL); 726 } 727 memset(mask, 0, masksize / 8); 728 masksize = prefix; 729 } 730 731 if (mask != NULL) { 732 /* 733 * Fill in mask. 734 */ 735 for (m = mask; masksize >= 8; m++, masksize -= 8) 736 *m = ~0; 737 if (masksize) 738 *m = ~0 << (8 - masksize); 739 } 740 741 return (0); 742 } 743 744 /* 745 * Parse an argument sub-vector as a { <parameter name> <value> } ordered 746 * tuple. If the parameter name in the argument sub-vector does not match the 747 * passed in parameter name, then a zero is returned for the function and no 748 * parsing is performed. If there is a match, then the value is parsed and 749 * returned in the provided return value pointer. 750 */ 751 static int 752 parse_val(const char *param, const char *args[], uint32_t *val) 753 { 754 char *p; 755 long l; 756 757 if (strcmp(param, args[0]) != 0) 758 return (EINVAL); 759 760 p = str_to_number(args[1], &l, NULL); 761 if (*p || l < 0 || l > UINT32_MAX) { 762 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); 763 return (EINVAL); 764 } 765 766 *val = (uint32_t)l; 767 return (0); 768 } 769 770 static void 771 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) 772 { 773 int noctets, octet; 774 775 printf(" "); 776 if (type == 0) { 777 noctets = 4; 778 printf("%3s", " "); 779 } else 780 noctets = 16; 781 782 for (octet = 0; octet < noctets; octet++) 783 printf("%02x", addr[octet]); 784 printf("/"); 785 for (octet = 0; octet < noctets; octet++) 786 printf("%02x", addrm[octet]); 787 } 788 789 static void 790 do_show_one_filter_info(struct t4_filter *t, uint32_t mode) 791 { 792 uint32_t i; 793 794 printf("%4d", t->idx); 795 if (t->hits == UINT64_MAX) 796 printf(" %8s", "-"); 797 else 798 printf(" %8ju", t->hits); 799 800 /* 801 * Compressed header portion of filter. 802 */ 803 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 804 switch (mode & i) { 805 case T4_FILTER_FCoE: 806 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); 807 break; 808 case T4_FILTER_PORT: 809 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); 810 break; 811 case T4_FILTER_VNIC: 812 if (mode & T4_FILTER_IC_VNIC) { 813 printf(" %1d:%1x:%02x/%1d:%1x:%02x", 814 t->fs.val.pfvf_vld, 815 (t->fs.val.vnic >> 13) & 0x7, 816 t->fs.val.vnic & 0x1fff, 817 t->fs.mask.pfvf_vld, 818 (t->fs.mask.vnic >> 13) & 0x7, 819 t->fs.mask.vnic & 0x1fff); 820 } else { 821 printf(" %1d:%04x/%1d:%04x", 822 t->fs.val.ovlan_vld, t->fs.val.vnic, 823 t->fs.mask.ovlan_vld, t->fs.mask.vnic); 824 } 825 break; 826 case T4_FILTER_VLAN: 827 printf(" %1d:%04x/%1d:%04x", 828 t->fs.val.vlan_vld, t->fs.val.vlan, 829 t->fs.mask.vlan_vld, t->fs.mask.vlan); 830 break; 831 case T4_FILTER_IP_TOS: 832 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); 833 break; 834 case T4_FILTER_IP_PROTO: 835 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); 836 break; 837 case T4_FILTER_ETH_TYPE: 838 printf(" %04x/%04x", t->fs.val.ethtype, 839 t->fs.mask.ethtype); 840 break; 841 case T4_FILTER_MAC_IDX: 842 printf(" %03x/%03x", t->fs.val.macidx, 843 t->fs.mask.macidx); 844 break; 845 case T4_FILTER_MPS_HIT_TYPE: 846 printf(" %1x/%1x", t->fs.val.matchtype, 847 t->fs.mask.matchtype); 848 break; 849 case T4_FILTER_IP_FRAGMENT: 850 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); 851 break; 852 default: 853 /* compressed filter field not enabled */ 854 break; 855 } 856 } 857 858 /* 859 * Fixed portion of filter. 860 */ 861 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); 862 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); 863 printf(" %04x/%04x %04x/%04x", 864 t->fs.val.dport, t->fs.mask.dport, 865 t->fs.val.sport, t->fs.mask.sport); 866 867 /* 868 * Variable length filter action. 869 */ 870 if (t->fs.action == FILTER_DROP) 871 printf(" Drop"); 872 else if (t->fs.action == FILTER_SWITCH) { 873 printf(" Switch: port=%d", t->fs.eport); 874 if (t->fs.newdmac) 875 printf( 876 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " 877 ", l2tidx=%d", 878 t->fs.dmac[0], t->fs.dmac[1], 879 t->fs.dmac[2], t->fs.dmac[3], 880 t->fs.dmac[4], t->fs.dmac[5], 881 t->l2tidx); 882 if (t->fs.newsmac) 883 printf( 884 ", smac=%02x:%02x:%02x:%02x:%02x:%02x " 885 ", smtidx=%d", 886 t->fs.smac[0], t->fs.smac[1], 887 t->fs.smac[2], t->fs.smac[3], 888 t->fs.smac[4], t->fs.smac[5], 889 t->smtidx); 890 if (t->fs.newvlan == VLAN_REMOVE) 891 printf(", vlan=none"); 892 else if (t->fs.newvlan == VLAN_INSERT) 893 printf(", vlan=insert(%x)", t->fs.vlan); 894 else if (t->fs.newvlan == VLAN_REWRITE) 895 printf(", vlan=rewrite(%x)", t->fs.vlan); 896 } else { 897 printf(" Pass: Q="); 898 if (t->fs.dirsteer == 0) { 899 printf("RSS"); 900 if (t->fs.maskhash) 901 printf("(region %d)", t->fs.iq << 1); 902 } else { 903 printf("%d", t->fs.iq); 904 if (t->fs.dirsteerhash == 0) 905 printf("(QID)"); 906 else 907 printf("(hash)"); 908 } 909 } 910 if (g.chip_id <= 5 && t->fs.prio) 911 printf(" Prio"); 912 if (t->fs.rpttid) 913 printf(" RptTID"); 914 printf("\n"); 915 } 916 917 static int 918 show_filters(int hash) 919 { 920 uint32_t mode = 0, header, hpfilter = 0; 921 struct t4_filter t; 922 int rc; 923 924 /* Get the global filter mode first */ 925 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 926 if (rc != 0) 927 return (rc); 928 929 if (!hash && g.chip_id >= 6) { 930 header = 0; 931 bzero(&t, sizeof (t)); 932 t.idx = 0; 933 t.fs.hash = 0; 934 t.fs.prio = 1; 935 for (t.idx = 0; ; t.idx++) { 936 rc = doit(CHELSIO_T4_GET_FILTER, &t); 937 if (rc != 0 || t.idx == 0xffffffff) 938 break; 939 940 if (!header) { 941 printf("High Priority TCAM Region:\n"); 942 do_show_info_header(mode); 943 header = 1; 944 hpfilter = 1; 945 } 946 do_show_one_filter_info(&t, mode); 947 } 948 } 949 950 header = 0; 951 bzero(&t, sizeof (t)); 952 t.idx = 0; 953 t.fs.hash = hash; 954 for (t.idx = 0; ; t.idx++) { 955 rc = doit(CHELSIO_T4_GET_FILTER, &t); 956 if (rc != 0 || t.idx == 0xffffffff) 957 break; 958 959 if (!header) { 960 if (hpfilter) 961 printf("\nNormal Priority TCAM Region:\n"); 962 do_show_info_header(mode); 963 header = 1; 964 } 965 do_show_one_filter_info(&t, mode); 966 } 967 968 return (rc); 969 } 970 971 static int 972 get_filter_mode(int hashfilter) 973 { 974 uint32_t mode = hashfilter; 975 int rc; 976 977 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 978 if (rc != 0) 979 return (rc); 980 981 if (mode & T4_FILTER_IPv4) 982 printf("ipv4 "); 983 if (mode & T4_FILTER_IPv6) 984 printf("ipv6 "); 985 if (mode & T4_FILTER_IP_SADDR) 986 printf("sip "); 987 if (mode & T4_FILTER_IP_DADDR) 988 printf("dip "); 989 if (mode & T4_FILTER_IP_SPORT) 990 printf("sport "); 991 if (mode & T4_FILTER_IP_DPORT) 992 printf("dport "); 993 if (mode & T4_FILTER_IP_FRAGMENT) 994 printf("frag "); 995 if (mode & T4_FILTER_MPS_HIT_TYPE) 996 printf("matchtype "); 997 if (mode & T4_FILTER_MAC_IDX) 998 printf("macidx "); 999 if (mode & T4_FILTER_ETH_TYPE) 1000 printf("ethtype "); 1001 if (mode & T4_FILTER_IP_PROTO) 1002 printf("proto "); 1003 if (mode & T4_FILTER_IP_TOS) 1004 printf("tos "); 1005 if (mode & T4_FILTER_VLAN) 1006 printf("vlan "); 1007 if (mode & T4_FILTER_VNIC) { 1008 if (mode & T4_FILTER_IC_VNIC) 1009 printf("vnic_id "); 1010 else if (mode & T4_FILTER_IC_ENCAP) 1011 printf("encap "); 1012 else 1013 printf("ovlan "); 1014 } 1015 if (mode & T4_FILTER_PORT) 1016 printf("iport "); 1017 if (mode & T4_FILTER_FCoE) 1018 printf("fcoe "); 1019 printf("\n"); 1020 1021 return (0); 1022 } 1023 1024 static int 1025 set_filter_mode(int argc, const char *argv[], int hashfilter) 1026 { 1027 uint32_t mode = 0; 1028 int vnic = 0, ovlan = 0, invalid = 0; 1029 1030 for (; argc; argc--, argv++) { 1031 if (!strcmp(argv[0], "ipv4") || !strcmp(argv[0], "ipv6") || 1032 !strcmp(argv[0], "sip") || !strcmp(argv[0], "dip") || 1033 !strcmp(argv[0], "sport") || !strcmp(argv[0], "dport")) { 1034 /* These are always available and enabled. */ 1035 continue; 1036 } else if (!strcmp(argv[0], "frag")) 1037 mode |= T4_FILTER_IP_FRAGMENT; 1038 else if (!strcmp(argv[0], "matchtype")) 1039 mode |= T4_FILTER_MPS_HIT_TYPE; 1040 else if (!strcmp(argv[0], "macidx")) 1041 mode |= T4_FILTER_MAC_IDX; 1042 else if (!strcmp(argv[0], "ethtype")) 1043 mode |= T4_FILTER_ETH_TYPE; 1044 else if (!strcmp(argv[0], "proto")) 1045 mode |= T4_FILTER_IP_PROTO; 1046 else if (!strcmp(argv[0], "tos")) 1047 mode |= T4_FILTER_IP_TOS; 1048 else if (!strcmp(argv[0], "vlan")) 1049 mode |= T4_FILTER_VLAN; 1050 else if (!strcmp(argv[0], "ovlan")) { 1051 mode |= T4_FILTER_VNIC; 1052 ovlan = 1; 1053 } else if (!strcmp(argv[0], "vnic_id")) { 1054 mode |= T4_FILTER_VNIC; 1055 mode |= T4_FILTER_IC_VNIC; 1056 vnic = 1; 1057 } 1058 #ifdef notyet 1059 else if (!strcmp(argv[0], "encap")) { 1060 mode |= T4_FILTER_VNIC; 1061 mode |= T4_FILTER_IC_ENCAP; 1062 encap = 1; 1063 } 1064 #endif 1065 else if (!strcmp(argv[0], "iport")) 1066 mode |= T4_FILTER_PORT; 1067 else if (!strcmp(argv[0], "fcoe")) 1068 mode |= T4_FILTER_FCoE; 1069 else { 1070 warnx("\"%s\" is not valid while setting filter mode.", 1071 argv[0]); 1072 invalid++; 1073 } 1074 } 1075 1076 if (vnic + ovlan > 1) { 1077 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive."); 1078 invalid++; 1079 } 1080 1081 if (invalid > 0) 1082 return (EINVAL); 1083 1084 if (hashfilter) 1085 return doit(CHELSIO_T4_SET_FILTER_MASK, &mode); 1086 else 1087 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); 1088 } 1089 1090 static int 1091 del_filter(uint32_t idx, int prio, int hashfilter) 1092 { 1093 struct t4_filter t; 1094 1095 t.fs.prio = prio; 1096 t.fs.hash = hashfilter; 1097 t.idx = idx; 1098 1099 return doit(CHELSIO_T4_DEL_FILTER, &t); 1100 } 1101 1102 #define MAX_VLANID (4095) 1103 1104 static int 1105 set_filter(uint32_t idx, int argc, const char *argv[], int hash) 1106 { 1107 int rc, af = AF_UNSPEC, start_arg = 0; 1108 struct t4_filter t; 1109 1110 if (argc < 2) { 1111 warnc(EINVAL, "%s", __func__); 1112 return (EINVAL); 1113 }; 1114 bzero(&t, sizeof (t)); 1115 t.idx = idx; 1116 t.fs.hitcnts = 1; 1117 t.fs.hash = hash; 1118 1119 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { 1120 const char **args = &argv[start_arg]; 1121 uint32_t val, mask; 1122 1123 if (!strcmp(argv[start_arg], "type")) { 1124 int newaf; 1125 if (!strcasecmp(argv[start_arg + 1], "ipv4")) 1126 newaf = AF_INET; 1127 else if (!strcasecmp(argv[start_arg + 1], "ipv6")) 1128 newaf = AF_INET6; 1129 else { 1130 warnx("invalid type \"%s\"; " 1131 "must be one of \"ipv4\" or \"ipv6\"", 1132 argv[start_arg + 1]); 1133 return (EINVAL); 1134 } 1135 1136 if (af != AF_UNSPEC && af != newaf) { 1137 warnx("conflicting IPv4/IPv6 specifications."); 1138 return (EINVAL); 1139 } 1140 af = newaf; 1141 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) { 1142 t.fs.val.fcoe = val; 1143 t.fs.mask.fcoe = mask; 1144 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) { 1145 t.fs.val.iport = val; 1146 t.fs.mask.iport = mask; 1147 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) { 1148 t.fs.val.vnic = val; 1149 t.fs.mask.vnic = mask; 1150 t.fs.val.ovlan_vld = 1; 1151 t.fs.mask.ovlan_vld = 1; 1152 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) { 1153 t.fs.val.vlan = val; 1154 t.fs.mask.vlan = mask; 1155 t.fs.val.vlan_vld = 1; 1156 t.fs.mask.vlan_vld = 1; 1157 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) { 1158 t.fs.val.vnic &= 0x1fff; 1159 t.fs.val.vnic |= (val & 0x7) << 13; 1160 t.fs.mask.vnic &= 0x1fff; 1161 t.fs.mask.vnic |= (mask & 0x7) << 13; 1162 t.fs.val.pfvf_vld = 1; 1163 t.fs.mask.pfvf_vld = 1; 1164 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) { 1165 t.fs.val.vnic &= 0xe000; 1166 t.fs.val.vnic |= val & 0x1fff; 1167 t.fs.mask.vnic &= 0xe000; 1168 t.fs.mask.vnic |= mask & 0x1fff; 1169 t.fs.val.pfvf_vld = 1; 1170 t.fs.mask.pfvf_vld = 1; 1171 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) { 1172 t.fs.val.tos = val; 1173 t.fs.mask.tos = mask; 1174 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) { 1175 t.fs.val.proto = val; 1176 t.fs.mask.proto = mask; 1177 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) { 1178 t.fs.val.ethtype = val; 1179 t.fs.mask.ethtype = mask; 1180 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) { 1181 t.fs.val.macidx = val; 1182 t.fs.mask.macidx = mask; 1183 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) { 1184 t.fs.val.matchtype = val; 1185 t.fs.mask.matchtype = mask; 1186 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) { 1187 t.fs.val.frag = val; 1188 t.fs.mask.frag = mask; 1189 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) { 1190 t.fs.val.dport = val; 1191 t.fs.mask.dport = mask; 1192 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) { 1193 t.fs.val.sport = val; 1194 t.fs.mask.sport = mask; 1195 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, 1196 t.fs.mask.dip, hash)) { 1197 /* nada */; 1198 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, 1199 t.fs.mask.sip, hash)) { 1200 /* nada */; 1201 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) { 1202 /*nada*/; 1203 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) { 1204 /*nada*/ 1205 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) { 1206 t.fs.nat_dport = val; 1207 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) { 1208 t.fs.nat_sport = val; 1209 } else if (!strcmp(argv[start_arg], "action")) { 1210 if (!strcmp(argv[start_arg + 1], "pass")) 1211 t.fs.action = FILTER_PASS; 1212 else if (!strcmp(argv[start_arg + 1], "drop")) 1213 t.fs.action = FILTER_DROP; 1214 else if (!strcmp(argv[start_arg + 1], "switch")) 1215 t.fs.action = FILTER_SWITCH; 1216 else { 1217 warnx("invalid action \"%s\"; must be one of" 1218 " \"pass\", \"drop\" or \"switch\"", 1219 argv[start_arg + 1]); 1220 return (EINVAL); 1221 } 1222 } else if (!parse_val("hitcnts", args, &val)) { 1223 t.fs.hitcnts = val; 1224 } else if (!parse_val("prio", args, &val)) { 1225 if (hash) { 1226 warnx("Hashfilters doesn't support \"prio\"\n"); 1227 return (EINVAL); 1228 } 1229 if (val != 0 && val != 1) { 1230 warnx("invalid priority \"%s\"; must be" 1231 " \"0\" or \"1\"", argv[start_arg + 1]); 1232 return (EINVAL); 1233 } 1234 t.fs.prio = val; 1235 } else if (!parse_val("rpttid", args, &val)) { 1236 t.fs.rpttid = 1; 1237 } else if (!parse_val("queue", args, &val)) { 1238 t.fs.dirsteer = 1; /* direct steer */ 1239 t.fs.iq = val; /* to the iq with this cntxt_id */ 1240 } else if (!parse_val("tcbhash", args, &val)) { 1241 t.fs.dirsteerhash = 1; /* direct steer */ 1242 /* XXX: use (val << 1) as the rss_hash? */ 1243 t.fs.iq = val; 1244 } else if (!parse_val("tcbrss", args, &val)) { 1245 t.fs.maskhash = 1; /* steer to RSS region */ 1246 /* 1247 * val = start idx of the region but the internal TCB 1248 * field is 10b only and is left shifted by 1 before use. 1249 */ 1250 t.fs.iq = val >> 1; 1251 } else if (!parse_val("eport", args, &val)) { 1252 t.fs.eport = val; 1253 } else if (!parse_val("swapmac", args, &val)) { 1254 t.fs.swapmac = 1; 1255 } else if (!strcmp(argv[start_arg], "nat")) { 1256 if (!strcmp(argv[start_arg + 1], "dip")) 1257 t.fs.nat_mode = NAT_MODE_DIP; 1258 else if (!strcmp(argv[start_arg + 1], "dip-dp")) 1259 t.fs.nat_mode = NAT_MODE_DIP_DP; 1260 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip")) 1261 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP; 1262 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp")) 1263 t.fs.nat_mode = NAT_MODE_DIP_DP_SP; 1264 else if (!strcmp(argv[start_arg + 1], "sip-sp")) 1265 t.fs.nat_mode = NAT_MODE_SIP_SP; 1266 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp")) 1267 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP; 1268 else if (!strcmp(argv[start_arg + 1], "all")) 1269 t.fs.nat_mode = NAT_MODE_ALL; 1270 else { 1271 warnx("unknown nat type \"%s\"; known types are dip, " 1272 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, " 1273 "dip-sip-sp, and all", argv[start_arg + 1]); 1274 return (EINVAL); 1275 } 1276 } else if (!parse_val("natseq", args, &val)) { 1277 t.fs.nat_seq_chk = val; 1278 } else if (!parse_val("natflag", args, &val)) { 1279 t.fs.nat_flag_chk = 1; 1280 } else if (!strcmp(argv[start_arg], "dmac")) { 1281 struct ether_addr *daddr; 1282 1283 daddr = ether_aton(argv[start_arg + 1]); 1284 if (daddr == NULL) { 1285 warnx("invalid dmac address \"%s\"", 1286 argv[start_arg + 1]); 1287 return (EINVAL); 1288 } 1289 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); 1290 t.fs.newdmac = 1; 1291 } else if (!strcmp(argv[start_arg], "smac")) { 1292 struct ether_addr *saddr; 1293 1294 saddr = ether_aton(argv[start_arg + 1]); 1295 if (saddr == NULL) { 1296 warnx("invalid smac address \"%s\"", 1297 argv[start_arg + 1]); 1298 return (EINVAL); 1299 } 1300 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); 1301 t.fs.newsmac = 1; 1302 } else if (!strcmp(argv[start_arg], "vlan")) { 1303 char *p; 1304 if (!strcmp(argv[start_arg + 1], "none")) { 1305 t.fs.newvlan = VLAN_REMOVE; 1306 } else if (argv[start_arg + 1][0] == '=') { 1307 t.fs.newvlan = VLAN_REWRITE; 1308 } else if (argv[start_arg + 1][0] == '+') { 1309 t.fs.newvlan = VLAN_INSERT; 1310 } else { 1311 warnx("unknown vlan parameter \"%s\"; must" 1312 " be one of \"none\", \"=<vlan>\", " 1313 " \"+<vlan>\"", argv[start_arg + 1]); 1314 return (EINVAL); 1315 } 1316 if (t.fs.newvlan == VLAN_REWRITE || 1317 t.fs.newvlan == VLAN_INSERT) { 1318 t.fs.vlan = strtoul(argv[start_arg + 1] + 1, 1319 &p, 0); 1320 if (p == argv[start_arg + 1] + 1 || p[0] != 0 || 1321 t.fs.vlan > MAX_VLANID) { 1322 warnx("invalid vlan \"%s\"", 1323 argv[start_arg + 1]); 1324 return (EINVAL); 1325 } 1326 } 1327 } else { 1328 warnx("invalid parameter \"%s\"", argv[start_arg]); 1329 return (EINVAL); 1330 } 1331 } 1332 if (start_arg != argc) { 1333 warnx("no value for \"%s\"", argv[start_arg]); 1334 return (EINVAL); 1335 } 1336 1337 /* 1338 * Check basic sanity of option combinations. 1339 */ 1340 if (t.fs.action != FILTER_SWITCH && 1341 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan || 1342 t.fs.swapmac || t.fs.nat_mode)) { 1343 warnx("port, dmac, smac, vlan, and nat only make sense with" 1344 " \"action switch\""); 1345 return (EINVAL); 1346 } 1347 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk || 1348 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) { 1349 warnx("nat params only make sense with valid nat mode"); 1350 return (EINVAL); 1351 } 1352 if (t.fs.action != FILTER_PASS && 1353 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { 1354 warnx("rpttid, queue and tcbhash don't make sense with" 1355 " action \"drop\" or \"switch\""); 1356 return (EINVAL); 1357 } 1358 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) { 1359 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive"); 1360 return (EINVAL); 1361 } 1362 1363 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ 1364 rc = doit(CHELSIO_T4_SET_FILTER, &t); 1365 if (hash && rc == 0) 1366 printf("%d\n", t.idx); 1367 return (rc); 1368 } 1369 1370 static int 1371 filter_cmd(int argc, const char *argv[], int hashfilter) 1372 { 1373 long long val; 1374 uint32_t idx; 1375 char *s; 1376 1377 if (argc == 0) { 1378 warnx("%sfilter: no arguments.", hashfilter ? "hash" : ""); 1379 return (EINVAL); 1380 }; 1381 1382 /* list */ 1383 if (strcmp(argv[0], "list") == 0) { 1384 if (argc != 1) 1385 warnx("trailing arguments after \"list\" ignored."); 1386 1387 return show_filters(hashfilter); 1388 } 1389 1390 /* mode */ 1391 if (argc == 1 && strcmp(argv[0], "mode") == 0) 1392 return get_filter_mode(hashfilter); 1393 1394 /* mode <mode> */ 1395 if (strcmp(argv[0], "mode") == 0) 1396 return set_filter_mode(argc - 1, argv + 1, hashfilter); 1397 1398 /* <idx> ... */ 1399 s = str_to_number(argv[0], NULL, &val); 1400 if (*s || val < 0 || val > 0xffffffffU) { 1401 if (hashfilter) { 1402 /* 1403 * No numeric index means this must be a request to 1404 * create a new hashfilter and we are already at the 1405 * parameter/value list. 1406 */ 1407 idx = (uint32_t) -1; 1408 goto setf; 1409 } 1410 warnx("\"%s\" is neither an index nor a filter subcommand.", 1411 argv[0]); 1412 return (EINVAL); 1413 } 1414 idx = (uint32_t) val; 1415 1416 /* <idx> delete|clear [prio 0|1] */ 1417 if ((argc == 2 || argc == 4) && 1418 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { 1419 int prio = 0; 1420 1421 if (argc == 4) { 1422 if (hashfilter) { 1423 warnx("stray arguments after \"%s\".", argv[1]); 1424 return (EINVAL); 1425 } 1426 1427 if (strcmp(argv[2], "prio") != 0) { 1428 warnx("\"prio\" is the only valid keyword " 1429 "after \"%s\", found \"%s\" instead.", 1430 argv[1], argv[2]); 1431 return (EINVAL); 1432 } 1433 1434 s = str_to_number(argv[3], NULL, &val); 1435 if (*s || val < 0 || val > 1) { 1436 warnx("%s \"%s\"; must be \"0\" or \"1\".", 1437 argv[2], argv[3]); 1438 return (EINVAL); 1439 } 1440 prio = (int)val; 1441 } 1442 return del_filter(idx, prio, hashfilter); 1443 } 1444 1445 /* skip <idx> */ 1446 argc--; 1447 argv++; 1448 1449 setf: 1450 /* [<param> <val>] ... */ 1451 return set_filter(idx, argc, argv, hashfilter); 1452 } 1453 1454 /* 1455 * Shows the fields of a multi-word structure. The structure is considered to 1456 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) 1457 * whose fields are described by @fd. The 32-bit words are given in @words 1458 * starting with the least significant 32-bit word. 1459 */ 1460 static void 1461 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) 1462 { 1463 unsigned int w = 0; 1464 const struct field_desc *p; 1465 1466 for (p = fd; p->name; p++) 1467 w = max(w, strlen(p->name)); 1468 1469 while (fd->name) { 1470 unsigned long long data; 1471 int first_word = fd->start / 32; 1472 int shift = fd->start % 32; 1473 int width = fd->end - fd->start + 1; 1474 unsigned long long mask = (1ULL << width) - 1; 1475 1476 data = (words[first_word] >> shift) | 1477 ((uint64_t)words[first_word + 1] << (32 - shift)); 1478 if (shift) 1479 data |= ((uint64_t)words[first_word + 2] << (64 - shift)); 1480 data &= mask; 1481 if (fd->islog2) 1482 data = 1 << data; 1483 printf("%-*s ", w, fd->name); 1484 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); 1485 fd++; 1486 } 1487 } 1488 1489 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 } 1490 #define FIELD1(name, start) FIELD(name, start, start) 1491 1492 static void 1493 show_t5t6_ctxt(const struct t4_sge_context *p, int vers) 1494 { 1495 static struct field_desc egress_t5[] = { 1496 FIELD("DCA_ST:", 181, 191), 1497 FIELD1("StatusPgNS:", 180), 1498 FIELD1("StatusPgRO:", 179), 1499 FIELD1("FetchNS:", 178), 1500 FIELD1("FetchRO:", 177), 1501 FIELD1("Valid:", 176), 1502 FIELD("PCIeDataChannel:", 174, 175), 1503 FIELD1("StatusPgTPHintEn:", 173), 1504 FIELD("StatusPgTPHint:", 171, 172), 1505 FIELD1("FetchTPHintEn:", 170), 1506 FIELD("FetchTPHint:", 168, 169), 1507 FIELD1("FCThreshOverride:", 167), 1508 { "WRLength:", 162, 166, 9, 0, 1 }, 1509 FIELD1("WRLengthKnown:", 161), 1510 FIELD1("ReschedulePending:", 160), 1511 FIELD1("OnChipQueue:", 159), 1512 FIELD1("FetchSizeMode:", 158), 1513 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1514 FIELD1("FLMPacking:", 155), 1515 FIELD("FetchBurstMax:", 153, 154), 1516 FIELD("uPToken:", 133, 152), 1517 FIELD1("uPTokenEn:", 132), 1518 FIELD1("UserModeIO:", 131), 1519 FIELD("uPFLCredits:", 123, 130), 1520 FIELD1("uPFLCreditEn:", 122), 1521 FIELD("FID:", 111, 121), 1522 FIELD("HostFCMode:", 109, 110), 1523 FIELD1("HostFCOwner:", 108), 1524 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1525 FIELD("CIDX:", 89, 104), 1526 FIELD("PIDX:", 73, 88), 1527 { "BaseAddress:", 18, 72, 9, 1 }, 1528 FIELD("QueueSize:", 2, 17), 1529 FIELD1("QueueType:", 1), 1530 FIELD1("CachePriority:", 0), 1531 { NULL } 1532 }; 1533 static struct field_desc egress_t6[] = { 1534 FIELD("DCA_ST:", 181, 191), 1535 FIELD1("StatusPgNS:", 180), 1536 FIELD1("StatusPgRO:", 179), 1537 FIELD1("FetchNS:", 178), 1538 FIELD1("FetchRO:", 177), 1539 FIELD1("Valid:", 176), 1540 FIELD1("ReschedulePending_1:", 175), 1541 FIELD1("PCIeDataChannel:", 174), 1542 FIELD1("StatusPgTPHintEn:", 173), 1543 FIELD("StatusPgTPHint:", 171, 172), 1544 FIELD1("FetchTPHintEn:", 170), 1545 FIELD("FetchTPHint:", 168, 169), 1546 FIELD1("FCThreshOverride:", 167), 1547 { "WRLength:", 162, 166, 9, 0, 1 }, 1548 FIELD1("WRLengthKnown:", 161), 1549 FIELD1("ReschedulePending:", 160), 1550 FIELD("TimerIx:", 157, 159), 1551 FIELD1("FetchBurstMin:", 156), 1552 FIELD1("FLMPacking:", 155), 1553 FIELD("FetchBurstMax:", 153, 154), 1554 FIELD("uPToken:", 133, 152), 1555 FIELD1("uPTokenEn:", 132), 1556 FIELD1("UserModeIO:", 131), 1557 FIELD("uPFLCredits:", 123, 130), 1558 FIELD1("uPFLCreditEn:", 122), 1559 FIELD("FID:", 111, 121), 1560 FIELD("HostFCMode:", 109, 110), 1561 FIELD1("HostFCOwner:", 108), 1562 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1563 FIELD("CIDX:", 89, 104), 1564 FIELD("PIDX:", 73, 88), 1565 { "BaseAddress:", 18, 72, 9, 1 }, 1566 FIELD("QueueSize:", 2, 17), 1567 FIELD1("QueueType:", 1), 1568 FIELD1("FetchSizeMode:", 0), 1569 { NULL } 1570 }; 1571 static struct field_desc fl_t5[] = { 1572 FIELD("DCA_ST:", 181, 191), 1573 FIELD1("StatusPgNS:", 180), 1574 FIELD1("StatusPgRO:", 179), 1575 FIELD1("FetchNS:", 178), 1576 FIELD1("FetchRO:", 177), 1577 FIELD1("Valid:", 176), 1578 FIELD("PCIeDataChannel:", 174, 175), 1579 FIELD1("StatusPgTPHintEn:", 173), 1580 FIELD("StatusPgTPHint:", 171, 172), 1581 FIELD1("FetchTPHintEn:", 170), 1582 FIELD("FetchTPHint:", 168, 169), 1583 FIELD1("FCThreshOverride:", 167), 1584 FIELD1("ReschedulePending:", 160), 1585 FIELD1("OnChipQueue:", 159), 1586 FIELD1("FetchSizeMode:", 158), 1587 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1588 FIELD1("FLMPacking:", 155), 1589 FIELD("FetchBurstMax:", 153, 154), 1590 FIELD1("FLMcongMode:", 152), 1591 FIELD("MaxuPFLCredits:", 144, 151), 1592 FIELD("FLMcontextID:", 133, 143), 1593 FIELD1("uPTokenEn:", 132), 1594 FIELD1("UserModeIO:", 131), 1595 FIELD("uPFLCredits:", 123, 130), 1596 FIELD1("uPFLCreditEn:", 122), 1597 FIELD("FID:", 111, 121), 1598 FIELD("HostFCMode:", 109, 110), 1599 FIELD1("HostFCOwner:", 108), 1600 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1601 FIELD("CIDX:", 89, 104), 1602 FIELD("PIDX:", 73, 88), 1603 { "BaseAddress:", 18, 72, 9, 1 }, 1604 FIELD("QueueSize:", 2, 17), 1605 FIELD1("QueueType:", 1), 1606 FIELD1("CachePriority:", 0), 1607 { NULL } 1608 }; 1609 static struct field_desc ingress_t5[] = { 1610 FIELD("DCA_ST:", 143, 153), 1611 FIELD1("ISCSICoalescing:", 142), 1612 FIELD1("Queue_Valid:", 141), 1613 FIELD1("TimerPending:", 140), 1614 FIELD1("DropRSS:", 139), 1615 FIELD("PCIeChannel:", 137, 138), 1616 FIELD1("SEInterruptArmed:", 136), 1617 FIELD1("CongestionMgtEnable:", 135), 1618 FIELD1("NoSnoop:", 134), 1619 FIELD1("RelaxedOrdering:", 133), 1620 FIELD1("GTSmode:", 132), 1621 FIELD1("TPHintEn:", 131), 1622 FIELD("TPHint:", 129, 130), 1623 FIELD1("UpdateScheduling:", 128), 1624 FIELD("UpdateDelivery:", 126, 127), 1625 FIELD1("InterruptSent:", 125), 1626 FIELD("InterruptIDX:", 114, 124), 1627 FIELD1("InterruptDestination:", 113), 1628 FIELD1("InterruptArmed:", 112), 1629 FIELD("RxIntCounter:", 106, 111), 1630 FIELD("RxIntCounterThreshold:", 104, 105), 1631 FIELD1("Generation:", 103), 1632 { "BaseAddress:", 48, 102, 9, 1 }, 1633 FIELD("PIDX:", 32, 47), 1634 FIELD("CIDX:", 16, 31), 1635 { "QueueSize:", 4, 15, 4, 0 }, 1636 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1637 FIELD1("QueueEntryOverride:", 1), 1638 FIELD1("CachePriority:", 0), 1639 { NULL } 1640 }; 1641 static struct field_desc ingress_t6[] = { 1642 FIELD1("SP_NS:", 158), 1643 FIELD1("SP_RO:", 157), 1644 FIELD1("SP_TPHintEn:", 156), 1645 FIELD("SP_TPHint:", 154, 155), 1646 FIELD("DCA_ST:", 143, 153), 1647 FIELD1("ISCSICoalescing:", 142), 1648 FIELD1("Queue_Valid:", 141), 1649 FIELD1("TimerPending:", 140), 1650 FIELD1("DropRSS:", 139), 1651 FIELD("PCIeChannel:", 137, 138), 1652 FIELD1("SEInterruptArmed:", 136), 1653 FIELD1("CongestionMgtEnable:", 135), 1654 FIELD1("NoSnoop:", 134), 1655 FIELD1("RelaxedOrdering:", 133), 1656 FIELD1("GTSmode:", 132), 1657 FIELD1("TPHintEn:", 131), 1658 FIELD("TPHint:", 129, 130), 1659 FIELD1("UpdateScheduling:", 128), 1660 FIELD("UpdateDelivery:", 126, 127), 1661 FIELD1("InterruptSent:", 125), 1662 FIELD("InterruptIDX:", 114, 124), 1663 FIELD1("InterruptDestination:", 113), 1664 FIELD1("InterruptArmed:", 112), 1665 FIELD("RxIntCounter:", 106, 111), 1666 FIELD("RxIntCounterThreshold:", 104, 105), 1667 FIELD1("Generation:", 103), 1668 { "BaseAddress:", 48, 102, 9, 1 }, 1669 FIELD("PIDX:", 32, 47), 1670 FIELD("CIDX:", 16, 31), 1671 { "QueueSize:", 4, 15, 4, 0 }, 1672 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1673 FIELD1("QueueEntryOverride:", 1), 1674 FIELD1("CachePriority:", 0), 1675 { NULL } 1676 }; 1677 static struct field_desc flm_t5[] = { 1678 FIELD1("Valid:", 89), 1679 FIELD("SplitLenMode:", 87, 88), 1680 FIELD1("TPHintEn:", 86), 1681 FIELD("TPHint:", 84, 85), 1682 FIELD1("NoSnoop:", 83), 1683 FIELD1("RelaxedOrdering:", 82), 1684 FIELD("DCA_ST:", 71, 81), 1685 FIELD("EQid:", 54, 70), 1686 FIELD("SplitEn:", 52, 53), 1687 FIELD1("PadEn:", 51), 1688 FIELD1("PackEn:", 50), 1689 FIELD1("Cache_Lock :", 49), 1690 FIELD1("CongDrop:", 48), 1691 FIELD("PackOffset:", 16, 47), 1692 FIELD("CIDX:", 8, 15), 1693 FIELD("PIDX:", 0, 7), 1694 { NULL } 1695 }; 1696 static struct field_desc flm_t6[] = { 1697 FIELD1("Valid:", 89), 1698 FIELD("SplitLenMode:", 87, 88), 1699 FIELD1("TPHintEn:", 86), 1700 FIELD("TPHint:", 84, 85), 1701 FIELD1("NoSnoop:", 83), 1702 FIELD1("RelaxedOrdering:", 82), 1703 FIELD("DCA_ST:", 71, 81), 1704 FIELD("EQid:", 54, 70), 1705 FIELD("SplitEn:", 52, 53), 1706 FIELD1("PadEn:", 51), 1707 FIELD1("PackEn:", 50), 1708 FIELD1("Cache_Lock :", 49), 1709 FIELD1("CongDrop:", 48), 1710 FIELD1("Inflight:", 47), 1711 FIELD1("CongEn:", 46), 1712 FIELD1("CongMode:", 45), 1713 FIELD("PackOffset:", 20, 39), 1714 FIELD("CIDX:", 8, 15), 1715 FIELD("PIDX:", 0, 7), 1716 { NULL } 1717 }; 1718 static struct field_desc conm_t5[] = { 1719 FIELD1("CngMPSEnable:", 21), 1720 FIELD("CngTPMode:", 19, 20), 1721 FIELD1("CngDBPHdr:", 18), 1722 FIELD1("CngDBPData:", 17), 1723 FIELD1("CngIMSG:", 16), 1724 { "CngChMap:", 0, 15, 0, 1, 0 }, 1725 { NULL } 1726 }; 1727 1728 if (p->mem_id == SGE_CONTEXT_EGRESS) { 1729 if (p->data[0] & 2) 1730 show_struct(p->data, 6, fl_t5); 1731 else if (vers == 5) 1732 show_struct(p->data, 6, egress_t5); 1733 else 1734 show_struct(p->data, 6, egress_t6); 1735 } else if (p->mem_id == SGE_CONTEXT_FLM) 1736 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6); 1737 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1738 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6); 1739 else if (p->mem_id == SGE_CONTEXT_CNM) 1740 show_struct(p->data, 1, conm_t5); 1741 } 1742 1743 static void 1744 show_t4_ctxt(const struct t4_sge_context *p) 1745 { 1746 static struct field_desc egress_t4[] = { 1747 FIELD1("StatusPgNS:", 180), 1748 FIELD1("StatusPgRO:", 179), 1749 FIELD1("FetchNS:", 178), 1750 FIELD1("FetchRO:", 177), 1751 FIELD1("Valid:", 176), 1752 FIELD("PCIeDataChannel:", 174, 175), 1753 FIELD1("DCAEgrQEn:", 173), 1754 FIELD("DCACPUID:", 168, 172), 1755 FIELD1("FCThreshOverride:", 167), 1756 FIELD("WRLength:", 162, 166), 1757 FIELD1("WRLengthKnown:", 161), 1758 FIELD1("ReschedulePending:", 160), 1759 FIELD1("OnChipQueue:", 159), 1760 FIELD1("FetchSizeMode", 158), 1761 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1762 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1763 FIELD("uPToken:", 133, 152), 1764 FIELD1("uPTokenEn:", 132), 1765 FIELD1("UserModeIO:", 131), 1766 FIELD("uPFLCredits:", 123, 130), 1767 FIELD1("uPFLCreditEn:", 122), 1768 FIELD("FID:", 111, 121), 1769 FIELD("HostFCMode:", 109, 110), 1770 FIELD1("HostFCOwner:", 108), 1771 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1772 FIELD("CIDX:", 89, 104), 1773 FIELD("PIDX:", 73, 88), 1774 { "BaseAddress:", 18, 72, 9, 1 }, 1775 FIELD("QueueSize:", 2, 17), 1776 FIELD1("QueueType:", 1), 1777 FIELD1("CachePriority:", 0), 1778 { NULL } 1779 }; 1780 static struct field_desc fl_t4[] = { 1781 FIELD1("StatusPgNS:", 180), 1782 FIELD1("StatusPgRO:", 179), 1783 FIELD1("FetchNS:", 178), 1784 FIELD1("FetchRO:", 177), 1785 FIELD1("Valid:", 176), 1786 FIELD("PCIeDataChannel:", 174, 175), 1787 FIELD1("DCAEgrQEn:", 173), 1788 FIELD("DCACPUID:", 168, 172), 1789 FIELD1("FCThreshOverride:", 167), 1790 FIELD1("ReschedulePending:", 160), 1791 FIELD1("OnChipQueue:", 159), 1792 FIELD1("FetchSizeMode", 158), 1793 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1794 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1795 FIELD1("FLMcongMode:", 152), 1796 FIELD("MaxuPFLCredits:", 144, 151), 1797 FIELD("FLMcontextID:", 133, 143), 1798 FIELD1("uPTokenEn:", 132), 1799 FIELD1("UserModeIO:", 131), 1800 FIELD("uPFLCredits:", 123, 130), 1801 FIELD1("uPFLCreditEn:", 122), 1802 FIELD("FID:", 111, 121), 1803 FIELD("HostFCMode:", 109, 110), 1804 FIELD1("HostFCOwner:", 108), 1805 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1806 FIELD("CIDX:", 89, 104), 1807 FIELD("PIDX:", 73, 88), 1808 { "BaseAddress:", 18, 72, 9, 1 }, 1809 FIELD("QueueSize:", 2, 17), 1810 FIELD1("QueueType:", 1), 1811 FIELD1("CachePriority:", 0), 1812 { NULL } 1813 }; 1814 static struct field_desc ingress_t4[] = { 1815 FIELD1("NoSnoop:", 145), 1816 FIELD1("RelaxedOrdering:", 144), 1817 FIELD1("GTSmode:", 143), 1818 FIELD1("ISCSICoalescing:", 142), 1819 FIELD1("Valid:", 141), 1820 FIELD1("TimerPending:", 140), 1821 FIELD1("DropRSS:", 139), 1822 FIELD("PCIeChannel:", 137, 138), 1823 FIELD1("SEInterruptArmed:", 136), 1824 FIELD1("CongestionMgtEnable:", 135), 1825 FIELD1("DCAIngQEnable:", 134), 1826 FIELD("DCACPUID:", 129, 133), 1827 FIELD1("UpdateScheduling:", 128), 1828 FIELD("UpdateDelivery:", 126, 127), 1829 FIELD1("InterruptSent:", 125), 1830 FIELD("InterruptIDX:", 114, 124), 1831 FIELD1("InterruptDestination:", 113), 1832 FIELD1("InterruptArmed:", 112), 1833 FIELD("RxIntCounter:", 106, 111), 1834 FIELD("RxIntCounterThreshold:", 104, 105), 1835 FIELD1("Generation:", 103), 1836 { "BaseAddress:", 48, 102, 9, 1 }, 1837 FIELD("PIDX:", 32, 47), 1838 FIELD("CIDX:", 16, 31), 1839 { "QueueSize:", 4, 15, 4, 0 }, 1840 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1841 FIELD1("QueueEntryOverride:", 1), 1842 FIELD1("CachePriority:", 0), 1843 { NULL } 1844 }; 1845 static struct field_desc flm_t4[] = { 1846 FIELD1("NoSnoop:", 79), 1847 FIELD1("RelaxedOrdering:", 78), 1848 FIELD1("Valid:", 77), 1849 FIELD("DCACPUID:", 72, 76), 1850 FIELD1("DCAFLEn:", 71), 1851 FIELD("EQid:", 54, 70), 1852 FIELD("SplitEn:", 52, 53), 1853 FIELD1("PadEn:", 51), 1854 FIELD1("PackEn:", 50), 1855 FIELD1("DBpriority:", 48), 1856 FIELD("PackOffset:", 16, 47), 1857 FIELD("CIDX:", 8, 15), 1858 FIELD("PIDX:", 0, 7), 1859 { NULL } 1860 }; 1861 static struct field_desc conm_t4[] = { 1862 FIELD1("CngDBPHdr:", 6), 1863 FIELD1("CngDBPData:", 5), 1864 FIELD1("CngIMSG:", 4), 1865 { "CngChMap:", 0, 3, 0, 1, 0}, 1866 { NULL } 1867 }; 1868 1869 if (p->mem_id == SGE_CONTEXT_EGRESS) 1870 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4); 1871 else if (p->mem_id == SGE_CONTEXT_FLM) 1872 show_struct(p->data, 3, flm_t4); 1873 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1874 show_struct(p->data, 5, ingress_t4); 1875 else if (p->mem_id == SGE_CONTEXT_CNM) 1876 show_struct(p->data, 1, conm_t4); 1877 } 1878 1879 #undef FIELD 1880 #undef FIELD1 1881 1882 static int 1883 get_sge_context(int argc, const char *argv[]) 1884 { 1885 int rc; 1886 char *p; 1887 long cid; 1888 struct t4_sge_context cntxt = {0}; 1889 1890 if (argc != 2) { 1891 warnx("sge_context: incorrect number of arguments."); 1892 return (EINVAL); 1893 } 1894 1895 if (!strcmp(argv[0], "egress")) 1896 cntxt.mem_id = SGE_CONTEXT_EGRESS; 1897 else if (!strcmp(argv[0], "ingress")) 1898 cntxt.mem_id = SGE_CONTEXT_INGRESS; 1899 else if (!strcmp(argv[0], "fl")) 1900 cntxt.mem_id = SGE_CONTEXT_FLM; 1901 else if (!strcmp(argv[0], "cong")) 1902 cntxt.mem_id = SGE_CONTEXT_CNM; 1903 else { 1904 warnx("unknown context type \"%s\"; known types are egress, " 1905 "ingress, fl, and cong.", argv[0]); 1906 return (EINVAL); 1907 } 1908 1909 p = str_to_number(argv[1], &cid, NULL); 1910 if (*p) { 1911 warnx("invalid context id \"%s\"", argv[1]); 1912 return (EINVAL); 1913 } 1914 cntxt.cid = cid; 1915 1916 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); 1917 if (rc != 0) 1918 return (rc); 1919 1920 if (g.chip_id == 4) 1921 show_t4_ctxt(&cntxt); 1922 else 1923 show_t5t6_ctxt(&cntxt, g.chip_id); 1924 1925 return (0); 1926 } 1927 1928 static int 1929 loadfw(int argc, const char *argv[]) 1930 { 1931 int rc, fd; 1932 struct t4_data data = {0}; 1933 const char *fname = argv[0]; 1934 struct stat st = {0}; 1935 1936 if (argc != 1) { 1937 warnx("loadfw: incorrect number of arguments."); 1938 return (EINVAL); 1939 } 1940 1941 fd = open(fname, O_RDONLY); 1942 if (fd < 0) { 1943 warn("open(%s)", fname); 1944 return (errno); 1945 } 1946 1947 if (fstat(fd, &st) < 0) { 1948 warn("fstat"); 1949 close(fd); 1950 return (errno); 1951 } 1952 1953 data.len = st.st_size; 1954 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1955 if (data.data == MAP_FAILED) { 1956 warn("mmap"); 1957 close(fd); 1958 return (errno); 1959 } 1960 1961 rc = doit(CHELSIO_T4_LOAD_FW, &data); 1962 munmap(data.data, data.len); 1963 close(fd); 1964 return (rc); 1965 } 1966 1967 static int 1968 loadcfg(int argc, const char *argv[]) 1969 { 1970 int rc, fd; 1971 struct t4_data data = {0}; 1972 const char *fname = argv[0]; 1973 struct stat st = {0}; 1974 1975 if (argc != 1) { 1976 warnx("loadcfg: incorrect number of arguments."); 1977 return (EINVAL); 1978 } 1979 1980 if (strcmp(fname, "clear") == 0) 1981 return (doit(CHELSIO_T4_LOAD_CFG, &data)); 1982 1983 fd = open(fname, O_RDONLY); 1984 if (fd < 0) { 1985 warn("open(%s)", fname); 1986 return (errno); 1987 } 1988 1989 if (fstat(fd, &st) < 0) { 1990 warn("fstat"); 1991 close(fd); 1992 return (errno); 1993 } 1994 1995 data.len = st.st_size; 1996 data.len &= ~3; /* Clip off to make it a multiple of 4 */ 1997 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1998 if (data.data == MAP_FAILED) { 1999 warn("mmap"); 2000 close(fd); 2001 return (errno); 2002 } 2003 2004 rc = doit(CHELSIO_T4_LOAD_CFG, &data); 2005 munmap(data.data, data.len); 2006 close(fd); 2007 return (rc); 2008 } 2009 2010 static int 2011 dumpstate(int argc, const char *argv[]) 2012 { 2013 int rc, fd; 2014 struct t4_cudbg_dump dump = {0}; 2015 const char *fname = argv[0]; 2016 2017 if (argc != 1) { 2018 warnx("dumpstate: incorrect number of arguments."); 2019 return (EINVAL); 2020 } 2021 2022 dump.wr_flash = 0; 2023 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap)); 2024 dump.len = 8 * 1024 * 1024; 2025 dump.data = malloc(dump.len); 2026 if (dump.data == NULL) { 2027 return (ENOMEM); 2028 } 2029 2030 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump); 2031 if (rc != 0) 2032 goto done; 2033 2034 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY, 2035 S_IRUSR | S_IRGRP | S_IROTH); 2036 if (fd < 0) { 2037 warn("open(%s)", fname); 2038 rc = errno; 2039 goto done; 2040 } 2041 write(fd, dump.data, dump.len); 2042 close(fd); 2043 done: 2044 free(dump.data); 2045 return (rc); 2046 } 2047 2048 static int 2049 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t)) 2050 { 2051 int rc; 2052 struct t4_mem_range mr; 2053 2054 mr.addr = addr; 2055 mr.len = len; 2056 mr.data = malloc(mr.len); 2057 2058 if (mr.data == 0) { 2059 warn("read_mem: malloc"); 2060 return (errno); 2061 } 2062 2063 rc = doit(CHELSIO_T4_GET_MEM, &mr); 2064 if (rc != 0) 2065 goto done; 2066 2067 if (output) 2068 (*output)(mr.data, mr.len); 2069 done: 2070 free(mr.data); 2071 return (rc); 2072 } 2073 2074 static int 2075 loadboot(int argc, const char *argv[]) 2076 { 2077 int rc, fd; 2078 long l; 2079 char *p; 2080 struct t4_bootrom br = {0}; 2081 const char *fname = argv[0]; 2082 struct stat st = {0}; 2083 2084 if (argc == 1) { 2085 br.pf_offset = 0; 2086 br.pfidx_addr = 0; 2087 } else if (argc == 3) { 2088 if (!strcmp(argv[1], "pf")) 2089 br.pf_offset = 0; 2090 else if (!strcmp(argv[1], "offset")) 2091 br.pf_offset = 1; 2092 else 2093 return (EINVAL); 2094 2095 p = str_to_number(argv[2], &l, NULL); 2096 if (*p) 2097 return (EINVAL); 2098 br.pfidx_addr = l; 2099 } else { 2100 warnx("loadboot: incorrect number of arguments."); 2101 return (EINVAL); 2102 } 2103 2104 if (strcmp(fname, "clear") == 0) 2105 return (doit(CHELSIO_T4_LOAD_BOOT, &br)); 2106 2107 fd = open(fname, O_RDONLY); 2108 if (fd < 0) { 2109 warn("open(%s)", fname); 2110 return (errno); 2111 } 2112 2113 if (fstat(fd, &st) < 0) { 2114 warn("fstat"); 2115 close(fd); 2116 return (errno); 2117 } 2118 2119 br.len = st.st_size; 2120 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0); 2121 if (br.data == MAP_FAILED) { 2122 warn("mmap"); 2123 close(fd); 2124 return (errno); 2125 } 2126 2127 rc = doit(CHELSIO_T4_LOAD_BOOT, &br); 2128 munmap(br.data, br.len); 2129 close(fd); 2130 return (rc); 2131 } 2132 2133 static int 2134 loadbootcfg(int argc, const char *argv[]) 2135 { 2136 int rc, fd; 2137 struct t4_data bc = {0}; 2138 const char *fname = argv[0]; 2139 struct stat st = {0}; 2140 2141 if (argc != 1) { 2142 warnx("loadbootcfg: incorrect number of arguments."); 2143 return (EINVAL); 2144 } 2145 2146 if (strcmp(fname, "clear") == 0) 2147 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc)); 2148 2149 fd = open(fname, O_RDONLY); 2150 if (fd < 0) { 2151 warn("open(%s)", fname); 2152 return (errno); 2153 } 2154 2155 if (fstat(fd, &st) < 0) { 2156 warn("fstat"); 2157 close(fd); 2158 return (errno); 2159 } 2160 2161 bc.len = st.st_size; 2162 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0); 2163 if (bc.data == MAP_FAILED) { 2164 warn("mmap"); 2165 close(fd); 2166 return (errno); 2167 } 2168 2169 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc); 2170 munmap(bc.data, bc.len); 2171 close(fd); 2172 return (rc); 2173 } 2174 2175 /* 2176 * Display memory as list of 'n' 4-byte values per line. 2177 */ 2178 static void 2179 show_mem(uint32_t *buf, uint32_t len) 2180 { 2181 const char *s; 2182 int i, n = 8; 2183 2184 while (len) { 2185 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2186 s = i ? " " : ""; 2187 printf("%s%08x", s, htonl(*buf)); 2188 } 2189 printf("\n"); 2190 } 2191 } 2192 2193 static int 2194 memdump(int argc, const char *argv[]) 2195 { 2196 char *p; 2197 long l; 2198 uint32_t addr, len; 2199 2200 if (argc != 2) { 2201 warnx("incorrect number of arguments."); 2202 return (EINVAL); 2203 } 2204 2205 p = str_to_number(argv[0], &l, NULL); 2206 if (*p) { 2207 warnx("invalid address \"%s\"", argv[0]); 2208 return (EINVAL); 2209 } 2210 addr = l; 2211 2212 p = str_to_number(argv[1], &l, NULL); 2213 if (*p) { 2214 warnx("memdump: invalid length \"%s\"", argv[1]); 2215 return (EINVAL); 2216 } 2217 len = l; 2218 2219 return (read_mem(addr, len, show_mem)); 2220 } 2221 2222 /* 2223 * Display TCB as list of 'n' 4-byte values per line. 2224 */ 2225 static void 2226 show_tcb(uint32_t *buf, uint32_t len) 2227 { 2228 unsigned char *tcb = (unsigned char *)buf; 2229 const char *s; 2230 int i, n = 8; 2231 2232 while (len) { 2233 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2234 s = i ? " " : ""; 2235 printf("%s%08x", s, htonl(*buf)); 2236 } 2237 printf("\n"); 2238 } 2239 set_tcb_info(TIDTYPE_TCB, g.chip_id); 2240 set_print_style(PRNTSTYL_COMP); 2241 swizzle_tcb(tcb); 2242 parse_n_display_xcb(tcb); 2243 } 2244 2245 #define A_TP_CMM_TCB_BASE 0x7d10 2246 #define TCB_SIZE 128 2247 static int 2248 read_tcb(int argc, const char *argv[]) 2249 { 2250 char *p; 2251 long l; 2252 long long val; 2253 unsigned int tid; 2254 uint32_t addr; 2255 int rc; 2256 2257 if (argc != 1) { 2258 warnx("incorrect number of arguments."); 2259 return (EINVAL); 2260 } 2261 2262 p = str_to_number(argv[0], &l, NULL); 2263 if (*p) { 2264 warnx("invalid tid \"%s\"", argv[0]); 2265 return (EINVAL); 2266 } 2267 tid = l; 2268 2269 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val); 2270 if (rc != 0) 2271 return (rc); 2272 2273 addr = val + tid * TCB_SIZE; 2274 2275 return (read_mem(addr, TCB_SIZE, show_tcb)); 2276 } 2277 2278 static int 2279 read_i2c(int argc, const char *argv[]) 2280 { 2281 char *p; 2282 long l; 2283 struct t4_i2c_data i2cd; 2284 int rc, i; 2285 2286 if (argc < 3 || argc > 4) { 2287 warnx("incorrect number of arguments."); 2288 return (EINVAL); 2289 } 2290 2291 p = str_to_number(argv[0], &l, NULL); 2292 if (*p || l > UCHAR_MAX) { 2293 warnx("invalid port id \"%s\"", argv[0]); 2294 return (EINVAL); 2295 } 2296 i2cd.port_id = l; 2297 2298 p = str_to_number(argv[1], &l, NULL); 2299 if (*p || l > UCHAR_MAX) { 2300 warnx("invalid i2c device address \"%s\"", argv[1]); 2301 return (EINVAL); 2302 } 2303 i2cd.dev_addr = l; 2304 2305 p = str_to_number(argv[2], &l, NULL); 2306 if (*p || l > UCHAR_MAX) { 2307 warnx("invalid byte offset \"%s\"", argv[2]); 2308 return (EINVAL); 2309 } 2310 i2cd.offset = l; 2311 2312 if (argc == 4) { 2313 p = str_to_number(argv[3], &l, NULL); 2314 if (*p || l > sizeof(i2cd.data)) { 2315 warnx("invalid number of bytes \"%s\"", argv[3]); 2316 return (EINVAL); 2317 } 2318 i2cd.len = l; 2319 } else 2320 i2cd.len = 1; 2321 2322 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2323 if (rc != 0) 2324 return (rc); 2325 2326 for (i = 0; i < i2cd.len; i++) 2327 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]); 2328 2329 return (0); 2330 } 2331 2332 static int 2333 clearstats(int argc, const char *argv[]) 2334 { 2335 char *p; 2336 long l; 2337 uint32_t port; 2338 2339 if (argc != 1) { 2340 warnx("incorrect number of arguments."); 2341 return (EINVAL); 2342 } 2343 2344 p = str_to_number(argv[0], &l, NULL); 2345 if (*p) { 2346 warnx("invalid port id \"%s\"", argv[0]); 2347 return (EINVAL); 2348 } 2349 port = l; 2350 2351 return doit(CHELSIO_T4_CLEAR_STATS, &port); 2352 } 2353 2354 static int 2355 show_tracers(void) 2356 { 2357 struct t4_tracer t; 2358 char *s; 2359 int rc, port_idx, i; 2360 long long val; 2361 2362 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */ 2363 rc = read_reg(0x9800, 4, &val); 2364 if (rc != 0) 2365 return (rc); 2366 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED"); 2367 2368 t.idx = 0; 2369 for (t.idx = 0; ; t.idx++) { 2370 rc = doit(CHELSIO_T4_GET_TRACER, &t); 2371 if (rc != 0 || t.idx == 0xff) 2372 break; 2373 2374 if (t.tp.port < 4) { 2375 s = "Rx"; 2376 port_idx = t.tp.port; 2377 } else if (t.tp.port < 8) { 2378 s = "Tx"; 2379 port_idx = t.tp.port - 4; 2380 } else if (t.tp.port < 12) { 2381 s = "loopback"; 2382 port_idx = t.tp.port - 8; 2383 } else if (t.tp.port < 16) { 2384 s = "MPS Rx"; 2385 port_idx = t.tp.port - 12; 2386 } else if (t.tp.port < 20) { 2387 s = "MPS Tx"; 2388 port_idx = t.tp.port - 16; 2389 } else { 2390 s = "unknown"; 2391 port_idx = t.tp.port; 2392 } 2393 2394 printf("\ntracer %u (currently %s) captures ", t.idx, 2395 t.enabled ? "ENABLED" : "DISABLED"); 2396 if (t.tp.port < 8) 2397 printf("port %u %s, ", port_idx, s); 2398 else 2399 printf("%s %u, ", s, port_idx); 2400 printf("snap length: %u, min length: %u\n", t.tp.snap_len, 2401 t.tp.min_len); 2402 printf("packets captured %smatch filter\n", 2403 t.tp.invert ? "do not " : ""); 2404 if (t.tp.skip_ofst) { 2405 printf("filter pattern: "); 2406 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2407 printf("%08x%08x", t.tp.data[i], 2408 t.tp.data[i + 1]); 2409 printf("/"); 2410 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2411 printf("%08x%08x", t.tp.mask[i], 2412 t.tp.mask[i + 1]); 2413 printf("@0\n"); 2414 } 2415 printf("filter pattern: "); 2416 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2417 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]); 2418 printf("/"); 2419 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2420 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]); 2421 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8); 2422 } 2423 2424 return (rc); 2425 } 2426 2427 static int 2428 tracer_onoff(uint8_t idx, int enabled) 2429 { 2430 struct t4_tracer t; 2431 2432 t.idx = idx; 2433 t.enabled = enabled; 2434 t.valid = 0; 2435 2436 return doit(CHELSIO_T4_SET_TRACER, &t); 2437 } 2438 2439 static void 2440 create_tracing_ifnet() 2441 { 2442 char *cmd[] = { 2443 "/sbin/ifconfig", __DECONST(char *, g.nexus), "create", NULL 2444 }; 2445 char *env[] = {NULL}; 2446 2447 if (vfork() == 0) { 2448 close(STDERR_FILENO); 2449 execve(cmd[0], cmd, env); 2450 _exit(0); 2451 } 2452 } 2453 2454 /* 2455 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted 2456 * matching). Right now this is a quick-n-dirty implementation that traces the 2457 * first 128B of all tx or rx on a port 2458 */ 2459 static int 2460 set_tracer(uint8_t idx, int argc, const char *argv[]) 2461 { 2462 struct t4_tracer t; 2463 int len, port; 2464 2465 bzero(&t, sizeof (t)); 2466 t.idx = idx; 2467 t.enabled = 1; 2468 t.valid = 1; 2469 2470 if (argc != 1) { 2471 warnx("must specify one of tx/rx/lo<n>"); 2472 return (EINVAL); 2473 } 2474 2475 len = strlen(argv[0]); 2476 if (len != 3) { 2477 warnx("argument must be 3 characters (tx/rx/lo<n>). eg. tx0"); 2478 return (EINVAL); 2479 } 2480 2481 if (strncmp(argv[0], "lo", 2) == 0) { 2482 port = argv[0][2] - '0'; 2483 if (port < 0 || port > 3) { 2484 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2485 return (EINVAL); 2486 } 2487 port += 8; 2488 } else if (strncmp(argv[0], "tx", 2) == 0) { 2489 port = argv[0][2] - '0'; 2490 if (port < 0 || port > 3) { 2491 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2492 return (EINVAL); 2493 } 2494 port += 4; 2495 } else if (strncmp(argv[0], "rx", 2) == 0) { 2496 port = argv[0][2] - '0'; 2497 if (port < 0 || port > 3) { 2498 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2499 return (EINVAL); 2500 } 2501 } else { 2502 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]); 2503 return (EINVAL); 2504 } 2505 2506 t.tp.snap_len = 128; 2507 t.tp.min_len = 0; 2508 t.tp.skip_ofst = 0; 2509 t.tp.skip_len = 0; 2510 t.tp.invert = 0; 2511 t.tp.port = port; 2512 2513 create_tracing_ifnet(); 2514 return doit(CHELSIO_T4_SET_TRACER, &t); 2515 } 2516 2517 static int 2518 tracer_cmd(int argc, const char *argv[]) 2519 { 2520 long long val; 2521 uint8_t idx; 2522 char *s; 2523 2524 if (argc == 0) { 2525 warnx("tracer: no arguments."); 2526 return (EINVAL); 2527 }; 2528 2529 /* list */ 2530 if (strcmp(argv[0], "list") == 0) { 2531 if (argc != 1) 2532 warnx("trailing arguments after \"list\" ignored."); 2533 2534 return show_tracers(); 2535 } 2536 2537 /* <idx> ... */ 2538 s = str_to_number(argv[0], NULL, &val); 2539 if (*s || val > 0xff) { 2540 warnx("\"%s\" is neither an index nor a tracer subcommand.", 2541 argv[0]); 2542 return (EINVAL); 2543 } 2544 idx = (int8_t)val; 2545 2546 /* <idx> disable */ 2547 if (argc == 2 && strcmp(argv[1], "disable") == 0) 2548 return tracer_onoff(idx, 0); 2549 2550 /* <idx> enable */ 2551 if (argc == 2 && strcmp(argv[1], "enable") == 0) 2552 return tracer_onoff(idx, 1); 2553 2554 /* <idx> ... */ 2555 return set_tracer(idx, argc - 1, argv + 1); 2556 } 2557 2558 static int 2559 modinfo_raw(int port_id) 2560 { 2561 uint8_t offset; 2562 struct t4_i2c_data i2cd; 2563 int rc; 2564 2565 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) { 2566 bzero(&i2cd, sizeof(i2cd)); 2567 i2cd.port_id = port_id; 2568 i2cd.dev_addr = 0xa0; 2569 i2cd.offset = offset; 2570 i2cd.len = sizeof(i2cd.data); 2571 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2572 if (rc != 0) 2573 return (rc); 2574 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", 2575 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2], 2576 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6], 2577 i2cd.data[7]); 2578 2579 printf(" %c%c%c%c %c%c%c%c\n", 2580 isprint(i2cd.data[0]) ? i2cd.data[0] : '.', 2581 isprint(i2cd.data[1]) ? i2cd.data[1] : '.', 2582 isprint(i2cd.data[2]) ? i2cd.data[2] : '.', 2583 isprint(i2cd.data[3]) ? i2cd.data[3] : '.', 2584 isprint(i2cd.data[4]) ? i2cd.data[4] : '.', 2585 isprint(i2cd.data[5]) ? i2cd.data[5] : '.', 2586 isprint(i2cd.data[6]) ? i2cd.data[6] : '.', 2587 isprint(i2cd.data[7]) ? i2cd.data[7] : '.'); 2588 } 2589 2590 return (0); 2591 } 2592 2593 static int 2594 modinfo(int argc, const char *argv[]) 2595 { 2596 long port; 2597 char string[16], *p; 2598 struct t4_i2c_data i2cd; 2599 int rc, i; 2600 uint16_t temp, vcc, tx_bias, tx_power, rx_power; 2601 2602 if (argc < 1) { 2603 warnx("must supply a port"); 2604 return (EINVAL); 2605 } 2606 2607 if (argc > 2) { 2608 warnx("too many arguments"); 2609 return (EINVAL); 2610 } 2611 2612 p = str_to_number(argv[0], &port, NULL); 2613 if (*p || port > UCHAR_MAX) { 2614 warnx("invalid port id \"%s\"", argv[0]); 2615 return (EINVAL); 2616 } 2617 2618 if (argc == 2) { 2619 if (!strcmp(argv[1], "raw")) 2620 return (modinfo_raw(port)); 2621 else { 2622 warnx("second argument can only be \"raw\""); 2623 return (EINVAL); 2624 } 2625 } 2626 2627 bzero(&i2cd, sizeof(i2cd)); 2628 i2cd.len = 1; 2629 i2cd.port_id = port; 2630 i2cd.dev_addr = SFF_8472_BASE; 2631 2632 i2cd.offset = SFF_8472_ID; 2633 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2634 goto fail; 2635 2636 if (i2cd.data[0] > SFF_8472_ID_LAST) 2637 printf("Unknown ID\n"); 2638 else 2639 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]); 2640 2641 bzero(&string, sizeof(string)); 2642 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) { 2643 i2cd.offset = i; 2644 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2645 goto fail; 2646 string[i - SFF_8472_VENDOR_START] = i2cd.data[0]; 2647 } 2648 printf("Vendor %s\n", string); 2649 2650 bzero(&string, sizeof(string)); 2651 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) { 2652 i2cd.offset = i; 2653 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2654 goto fail; 2655 string[i - SFF_8472_SN_START] = i2cd.data[0]; 2656 } 2657 printf("SN %s\n", string); 2658 2659 bzero(&string, sizeof(string)); 2660 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) { 2661 i2cd.offset = i; 2662 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2663 goto fail; 2664 string[i - SFF_8472_PN_START] = i2cd.data[0]; 2665 } 2666 printf("PN %s\n", string); 2667 2668 bzero(&string, sizeof(string)); 2669 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) { 2670 i2cd.offset = i; 2671 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2672 goto fail; 2673 string[i - SFF_8472_REV_START] = i2cd.data[0]; 2674 } 2675 printf("Rev %s\n", string); 2676 2677 i2cd.offset = SFF_8472_DIAG_TYPE; 2678 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2679 goto fail; 2680 2681 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL | 2682 SFF_8472_DIAG_INTERNAL)) { 2683 2684 /* Switch to reading from the Diagnostic address. */ 2685 i2cd.dev_addr = SFF_8472_DIAG; 2686 i2cd.len = 1; 2687 2688 i2cd.offset = SFF_8472_TEMP; 2689 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2690 goto fail; 2691 temp = i2cd.data[0] << 8; 2692 printf("Temp: "); 2693 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN) 2694 printf("-"); 2695 else 2696 printf("+"); 2697 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >> 2698 SFF_8472_TEMP_SHIFT); 2699 2700 i2cd.offset = SFF_8472_VCC; 2701 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2702 goto fail; 2703 vcc = i2cd.data[0] << 8; 2704 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR); 2705 2706 i2cd.offset = SFF_8472_TX_BIAS; 2707 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2708 goto fail; 2709 tx_bias = i2cd.data[0] << 8; 2710 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR); 2711 2712 i2cd.offset = SFF_8472_TX_POWER; 2713 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2714 goto fail; 2715 tx_power = i2cd.data[0] << 8; 2716 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR); 2717 2718 i2cd.offset = SFF_8472_RX_POWER; 2719 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2720 goto fail; 2721 rx_power = i2cd.data[0] << 8; 2722 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR); 2723 2724 } else 2725 printf("Diagnostics not supported.\n"); 2726 2727 return(0); 2728 2729 fail: 2730 if (rc == EPERM) 2731 warnx("No module/cable in port %ld", port); 2732 return (rc); 2733 2734 } 2735 2736 /* XXX: pass in a low/high and do range checks as well */ 2737 static int 2738 get_sched_param(const char *param, const char *args[], long *val) 2739 { 2740 char *p; 2741 2742 if (strcmp(param, args[0]) != 0) 2743 return (EINVAL); 2744 2745 p = str_to_number(args[1], val, NULL); 2746 if (*p) { 2747 warnx("parameter \"%s\" has bad value \"%s\"", args[0], 2748 args[1]); 2749 return (EINVAL); 2750 } 2751 2752 return (0); 2753 } 2754 2755 static int 2756 sched_class(int argc, const char *argv[]) 2757 { 2758 struct t4_sched_params op; 2759 int errs, i; 2760 2761 memset(&op, 0xff, sizeof(op)); 2762 op.subcmd = -1; 2763 op.type = -1; 2764 if (argc == 0) { 2765 warnx("missing scheduling sub-command"); 2766 return (EINVAL); 2767 } 2768 if (!strcmp(argv[0], "config")) { 2769 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG; 2770 op.u.config.minmax = -1; 2771 } else if (!strcmp(argv[0], "params")) { 2772 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS; 2773 op.u.params.level = op.u.params.mode = op.u.params.rateunit = 2774 op.u.params.ratemode = op.u.params.channel = 2775 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate = 2776 op.u.params.weight = op.u.params.pktsize = -1; 2777 } else { 2778 warnx("invalid scheduling sub-command \"%s\"", argv[0]); 2779 return (EINVAL); 2780 } 2781 2782 /* Decode remaining arguments ... */ 2783 errs = 0; 2784 for (i = 1; i < argc; i += 2) { 2785 const char **args = &argv[i]; 2786 long l; 2787 2788 if (i + 1 == argc) { 2789 warnx("missing argument for \"%s\"", args[0]); 2790 errs++; 2791 break; 2792 } 2793 2794 if (!strcmp(args[0], "type")) { 2795 if (!strcmp(args[1], "packet")) 2796 op.type = SCHED_CLASS_TYPE_PACKET; 2797 else { 2798 warnx("invalid type parameter \"%s\"", args[1]); 2799 errs++; 2800 } 2801 2802 continue; 2803 } 2804 2805 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2806 if(!get_sched_param("minmax", args, &l)) 2807 op.u.config.minmax = (int8_t)l; 2808 else { 2809 warnx("unknown scheduler config parameter " 2810 "\"%s\"", args[0]); 2811 errs++; 2812 } 2813 2814 continue; 2815 } 2816 2817 /* Rest applies only to SUBCMD_PARAMS */ 2818 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS) 2819 continue; 2820 2821 if (!strcmp(args[0], "level")) { 2822 if (!strcmp(args[1], "cl-rl")) 2823 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL; 2824 else if (!strcmp(args[1], "cl-wrr")) 2825 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR; 2826 else if (!strcmp(args[1], "ch-rl")) 2827 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL; 2828 else { 2829 warnx("invalid level parameter \"%s\"", 2830 args[1]); 2831 errs++; 2832 } 2833 } else if (!strcmp(args[0], "mode")) { 2834 if (!strcmp(args[1], "class")) 2835 op.u.params.mode = SCHED_CLASS_MODE_CLASS; 2836 else if (!strcmp(args[1], "flow")) 2837 op.u.params.mode = SCHED_CLASS_MODE_FLOW; 2838 else { 2839 warnx("invalid mode parameter \"%s\"", args[1]); 2840 errs++; 2841 } 2842 } else if (!strcmp(args[0], "rate-unit")) { 2843 if (!strcmp(args[1], "bits")) 2844 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS; 2845 else if (!strcmp(args[1], "pkts")) 2846 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS; 2847 else { 2848 warnx("invalid rate-unit parameter \"%s\"", 2849 args[1]); 2850 errs++; 2851 } 2852 } else if (!strcmp(args[0], "rate-mode")) { 2853 if (!strcmp(args[1], "relative")) 2854 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL; 2855 else if (!strcmp(args[1], "absolute")) 2856 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS; 2857 else { 2858 warnx("invalid rate-mode parameter \"%s\"", 2859 args[1]); 2860 errs++; 2861 } 2862 } else if (!get_sched_param("channel", args, &l)) 2863 op.u.params.channel = (int8_t)l; 2864 else if (!get_sched_param("class", args, &l)) 2865 op.u.params.cl = (int8_t)l; 2866 else if (!get_sched_param("min-rate", args, &l)) 2867 op.u.params.minrate = (int32_t)l; 2868 else if (!get_sched_param("max-rate", args, &l)) 2869 op.u.params.maxrate = (int32_t)l; 2870 else if (!get_sched_param("weight", args, &l)) 2871 op.u.params.weight = (int16_t)l; 2872 else if (!get_sched_param("pkt-size", args, &l)) 2873 op.u.params.pktsize = (int16_t)l; 2874 else { 2875 warnx("unknown scheduler parameter \"%s\"", args[0]); 2876 errs++; 2877 } 2878 } 2879 2880 /* 2881 * Catch some logical fallacies in terms of argument combinations here 2882 * so we can offer more than just the EINVAL return from the driver. 2883 * The driver will be able to catch a lot more issues since it knows 2884 * the specifics of the device hardware capabilities like how many 2885 * channels, classes, etc. the device supports. 2886 */ 2887 if (op.type < 0) { 2888 warnx("sched \"type\" parameter missing"); 2889 errs++; 2890 } 2891 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2892 if (op.u.config.minmax < 0) { 2893 warnx("sched config \"minmax\" parameter missing"); 2894 errs++; 2895 } 2896 } 2897 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) { 2898 if (op.u.params.level < 0) { 2899 warnx("sched params \"level\" parameter missing"); 2900 errs++; 2901 } 2902 if (op.u.params.mode < 0 && 2903 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2904 warnx("sched params \"mode\" parameter missing"); 2905 errs++; 2906 } 2907 if (op.u.params.rateunit < 0 && 2908 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2909 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2910 warnx("sched params \"rate-unit\" parameter missing"); 2911 errs++; 2912 } 2913 if (op.u.params.ratemode < 0 && 2914 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2915 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2916 warnx("sched params \"rate-mode\" parameter missing"); 2917 errs++; 2918 } 2919 if (op.u.params.channel < 0) { 2920 warnx("sched params \"channel\" missing"); 2921 errs++; 2922 } 2923 if (op.u.params.cl < 0 && 2924 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2925 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR)) { 2926 warnx("sched params \"class\" missing"); 2927 errs++; 2928 } 2929 if (op.u.params.maxrate < 0 && 2930 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2931 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2932 warnx("sched params \"max-rate\" missing for " 2933 "rate-limit level"); 2934 errs++; 2935 } 2936 if (op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR && 2937 (op.u.params.weight < 1 || op.u.params.weight > 99)) { 2938 warnx("sched params \"weight\" missing or invalid " 2939 "(not 1-99) for weighted-round-robin level"); 2940 errs++; 2941 } 2942 if (op.u.params.pktsize < 0 && 2943 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2944 warnx("sched params \"pkt-size\" missing for " 2945 "rate-limit level"); 2946 errs++; 2947 } 2948 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW && 2949 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) { 2950 warnx("sched params mode flow needs rate-mode absolute"); 2951 errs++; 2952 } 2953 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL && 2954 !in_range(op.u.params.maxrate, 1, 100)) { 2955 warnx("sched params \"max-rate\" takes " 2956 "percentage value(1-100) for rate-mode relative"); 2957 errs++; 2958 } 2959 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS && 2960 !in_range(op.u.params.maxrate, 1, 100000000)) { 2961 warnx("sched params \"max-rate\" takes " 2962 "value(1-100000000) for rate-mode absolute"); 2963 errs++; 2964 } 2965 if (op.u.params.maxrate > 0 && 2966 op.u.params.maxrate < op.u.params.minrate) { 2967 warnx("sched params \"max-rate\" is less than " 2968 "\"min-rate\""); 2969 errs++; 2970 } 2971 } 2972 2973 if (errs > 0) { 2974 warnx("%d error%s in sched-class command", errs, 2975 errs == 1 ? "" : "s"); 2976 return (EINVAL); 2977 } 2978 2979 return doit(CHELSIO_T4_SCHED_CLASS, &op); 2980 } 2981 2982 static int 2983 sched_queue(int argc, const char *argv[]) 2984 { 2985 struct t4_sched_queue op = {0}; 2986 char *p; 2987 long val; 2988 2989 if (argc != 3) { 2990 /* need "<port> <queue> <class> */ 2991 warnx("incorrect number of arguments."); 2992 return (EINVAL); 2993 } 2994 2995 p = str_to_number(argv[0], &val, NULL); 2996 if (*p || val > UCHAR_MAX) { 2997 warnx("invalid port id \"%s\"", argv[0]); 2998 return (EINVAL); 2999 } 3000 op.port = (uint8_t)val; 3001 3002 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*")) 3003 op.queue = -1; 3004 else { 3005 p = str_to_number(argv[1], &val, NULL); 3006 if (*p || val < -1) { 3007 warnx("invalid queue \"%s\"", argv[1]); 3008 return (EINVAL); 3009 } 3010 op.queue = (int8_t)val; 3011 } 3012 3013 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear")) 3014 op.cl = -1; 3015 else { 3016 p = str_to_number(argv[2], &val, NULL); 3017 if (*p || val < -1) { 3018 warnx("invalid class \"%s\"", argv[2]); 3019 return (EINVAL); 3020 } 3021 op.cl = (int8_t)val; 3022 } 3023 3024 return doit(CHELSIO_T4_SCHED_QUEUE, &op); 3025 } 3026 3027 static int 3028 parse_offload_settings_word(const char *s, char **pnext, const char *ws, 3029 int *pneg, struct offload_settings *os) 3030 { 3031 3032 while (*s == '!') { 3033 (*pneg)++; 3034 s++; 3035 } 3036 3037 if (!strcmp(s, "not")) { 3038 (*pneg)++; 3039 return (0); 3040 } 3041 3042 if (!strcmp(s, "offload")) { 3043 os->offload = (*pneg + 1) & 1; 3044 *pneg = 0; 3045 } else if (!strcmp(s , "coalesce")) { 3046 os->rx_coalesce = (*pneg + 1) & 1; 3047 *pneg = 0; 3048 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) { 3049 os->tstamp = (*pneg + 1) & 1; 3050 *pneg = 0; 3051 } else if (!strcmp(s, "sack")) { 3052 os->sack = (*pneg + 1) & 1; 3053 *pneg = 0; 3054 } else if (!strcmp(s, "nagle")) { 3055 os->nagle = (*pneg + 1) & 1; 3056 *pneg = 0; 3057 } else if (!strcmp(s, "ecn")) { 3058 os->ecn = (*pneg + 1) & 1; 3059 *pneg = 0; 3060 } else if (!strcmp(s, "ddp")) { 3061 os->ddp = (*pneg + 1) & 1; 3062 *pneg = 0; 3063 } else if (!strcmp(s, "tls")) { 3064 os->tls = (*pneg + 1) & 1; 3065 *pneg = 0; 3066 } else { 3067 char *param, *p; 3068 long val; 3069 3070 /* Settings with additional parameter handled here. */ 3071 3072 if (*pneg) { 3073 warnx("\"%s\" is not a valid keyword, or it does not " 3074 "support negation.", s); 3075 return (EINVAL); 3076 } 3077 3078 while ((param = strsep(pnext, ws)) != NULL) { 3079 if (*param != '\0') 3080 break; 3081 } 3082 if (param == NULL) { 3083 warnx("\"%s\" is not a valid keyword, or it requires a " 3084 "parameter that has not been provided.", s); 3085 return (EINVAL); 3086 } 3087 3088 if (!strcmp(s, "cong")) { 3089 if (!strcmp(param, "reno")) 3090 os->cong_algo = 0; 3091 else if (!strcmp(param, "tahoe")) 3092 os->cong_algo = 1; 3093 else if (!strcmp(param, "newreno")) 3094 os->cong_algo = 2; 3095 else if (!strcmp(param, "highspeed")) 3096 os->cong_algo = 3; 3097 else { 3098 warnx("unknown congestion algorithm \"%s\".", s); 3099 return (EINVAL); 3100 } 3101 } else if (!strcmp(s, "class")) { 3102 val = -1; 3103 p = str_to_number(param, &val, NULL); 3104 /* (nsched_cls - 1) is spelled 15 here. */ 3105 if (*p || val < 0 || val > 15) { 3106 warnx("invalid scheduling class \"%s\". " 3107 "\"class\" needs an integer value where " 3108 "0 <= value <= 15", param); 3109 return (EINVAL); 3110 } 3111 os->sched_class = val; 3112 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") || 3113 !strcmp(s, "rxq")) { 3114 if (!strcmp(param, "random")) { 3115 val = QUEUE_RANDOM; 3116 } else if (!strcmp(param, "roundrobin")) { 3117 val = QUEUE_ROUNDROBIN; 3118 } else { 3119 p = str_to_number(param, &val, NULL); 3120 if (*p || val < 0 || val > 0xffff) { 3121 warnx("invalid queue specification " 3122 "\"%s\". \"%s\" needs an integer" 3123 " value, \"random\", or " 3124 "\"roundrobin\".", param, s); 3125 return (EINVAL); 3126 } 3127 } 3128 if (!strcmp(s, "bind")) { 3129 os->txq = val; 3130 os->rxq = val; 3131 } else if (!strcmp(s, "txq")) { 3132 os->txq = val; 3133 } else if (!strcmp(s, "rxq")) { 3134 os->rxq = val; 3135 } else { 3136 return (EDOOFUS); 3137 } 3138 } else if (!strcmp(s, "mss")) { 3139 val = -1; 3140 p = str_to_number(param, &val, NULL); 3141 if (*p || val <= 0) { 3142 warnx("invalid MSS specification \"%s\". " 3143 "\"mss\" needs a positive integer value", 3144 param); 3145 return (EINVAL); 3146 } 3147 os->mss = val; 3148 } else { 3149 warnx("unknown settings keyword: \"%s\"", s); 3150 return (EINVAL); 3151 } 3152 } 3153 3154 return (0); 3155 } 3156 3157 static int 3158 parse_offload_settings(const char *settings_ro, struct offload_settings *os) 3159 { 3160 const char *ws = " \f\n\r\v\t"; 3161 char *settings, *s, *next; 3162 int rc, nsettings, neg; 3163 static const struct offload_settings default_settings = { 3164 .offload = 0, /* No settings imply !offload */ 3165 .rx_coalesce = -1, 3166 .cong_algo = -1, 3167 .sched_class = -1, 3168 .tstamp = -1, 3169 .sack = -1, 3170 .nagle = -1, 3171 .ecn = -1, 3172 .ddp = -1, 3173 .tls = -1, 3174 .txq = QUEUE_RANDOM, 3175 .rxq = QUEUE_RANDOM, 3176 .mss = -1, 3177 }; 3178 3179 *os = default_settings; 3180 3181 next = settings = strdup(settings_ro); 3182 if (settings == NULL) { 3183 warn (NULL); 3184 return (errno); 3185 } 3186 3187 nsettings = 0; 3188 rc = 0; 3189 neg = 0; 3190 while ((s = strsep(&next, ws)) != NULL) { 3191 if (*s == '\0') 3192 continue; 3193 nsettings++; 3194 rc = parse_offload_settings_word(s, &next, ws, &neg, os); 3195 if (rc != 0) 3196 goto done; 3197 } 3198 if (nsettings == 0) { 3199 warnx("no settings provided"); 3200 rc = EINVAL; 3201 goto done; 3202 } 3203 if (neg > 0) { 3204 warnx("%d stray negation(s) at end of offload settings", neg); 3205 rc = EINVAL; 3206 goto done; 3207 } 3208 done: 3209 free(settings); 3210 return (rc); 3211 } 3212 3213 static int 3214 isempty_line(char *line, size_t llen) 3215 { 3216 3217 /* skip leading whitespace */ 3218 while (isspace(*line)) { 3219 line++; 3220 llen--; 3221 } 3222 if (llen == 0 || *line == '#' || *line == '\n') 3223 return (1); 3224 3225 return (0); 3226 } 3227 3228 static int 3229 special_offload_rule(char *str) 3230 { 3231 3232 /* skip leading whitespaces */ 3233 while (isspace(*str)) 3234 str++; 3235 3236 /* check for special strings: "-", "all", "any" */ 3237 if (*str == '-') { 3238 str++; 3239 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) { 3240 str += 3; 3241 } else { 3242 return (0); 3243 } 3244 3245 /* skip trailing whitespaces */ 3246 while (isspace(*str)) 3247 str++; 3248 3249 return (*str == '\0'); 3250 } 3251 3252 /* 3253 * A rule has 3 parts: an open-type, a match expression, and offload settings. 3254 * 3255 * [<open-type>] <expr> => <settings> 3256 */ 3257 static int 3258 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd, 3259 struct offload_rule *r) 3260 { 3261 char *expr, *settings, *s; 3262 3263 bzero(r, sizeof(*r)); 3264 3265 /* Skip leading whitespace. */ 3266 while (isspace(*line)) 3267 line++; 3268 /* Trim trailing whitespace */ 3269 s = &line[llen - 1]; 3270 while (isspace(*s)) { 3271 *s-- = '\0'; 3272 llen--; 3273 } 3274 3275 /* 3276 * First part of the rule: '[X]' where X = A/D/L/P 3277 */ 3278 if (*line++ != '[') { 3279 warnx("missing \"[\" on line %zd", lno); 3280 return (EINVAL); 3281 } 3282 switch (*line) { 3283 case 'A': 3284 case 'D': 3285 case 'L': 3286 case 'P': 3287 r->open_type = *line; 3288 break; 3289 default: 3290 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno); 3291 return (EINVAL); 3292 } 3293 line++; 3294 if (*line++ != ']') { 3295 warnx("missing \"]\" after \"[%c\" on line %zd", 3296 r->open_type, lno); 3297 return (EINVAL); 3298 } 3299 3300 /* Skip whitespace. */ 3301 while (isspace(*line)) 3302 line++; 3303 3304 /* 3305 * Rest of the rule: <expr> => <settings> 3306 */ 3307 expr = line; 3308 s = strstr(line, "=>"); 3309 if (s == NULL) 3310 return (EINVAL); 3311 settings = s + 2; 3312 while (isspace(*settings)) 3313 settings++; 3314 *s = '\0'; 3315 3316 /* 3317 * <expr> is either a special name (all, any) or a pcap-filter(7). 3318 * In case of a special name the bpf_prog stays all-zero. 3319 */ 3320 if (!special_offload_rule(expr)) { 3321 if (pcap_compile(pd, &r->bpf_prog, expr, 1, 3322 PCAP_NETMASK_UNKNOWN) < 0) { 3323 warnx("failed to compile \"%s\" on line %zd: %s", expr, 3324 lno, pcap_geterr(pd)); 3325 return (EINVAL); 3326 } 3327 } 3328 3329 /* settings to apply on a match. */ 3330 if (parse_offload_settings(settings, &r->settings) != 0) { 3331 warnx("failed to parse offload settings \"%s\" on line %zd", 3332 settings, lno); 3333 pcap_freecode(&r->bpf_prog); 3334 return (EINVAL); 3335 } 3336 3337 return (0); 3338 3339 } 3340 3341 /* 3342 * Note that op itself is not dynamically allocated. 3343 */ 3344 static void 3345 free_offload_policy(struct t4_offload_policy *op) 3346 { 3347 int i; 3348 3349 for (i = 0; i < op->nrules; i++) { 3350 /* 3351 * pcap_freecode can cope with empty bpf_prog, which is the case 3352 * for an rule that matches on 'any/all/-'. 3353 */ 3354 pcap_freecode(&op->rule[i].bpf_prog); 3355 } 3356 free(op->rule); 3357 op->nrules = 0; 3358 op->rule = NULL; 3359 } 3360 3361 #define REALLOC_STRIDE 32 3362 3363 /* 3364 * Fills up op->nrules and op->rule. 3365 */ 3366 static int 3367 parse_offload_policy(const char *fname, struct t4_offload_policy *op) 3368 { 3369 FILE *fp; 3370 char *line; 3371 int lno, maxrules, rc; 3372 size_t lcap, llen; 3373 struct offload_rule *r; 3374 pcap_t *pd; 3375 3376 fp = fopen(fname, "r"); 3377 if (fp == NULL) { 3378 warn("Unable to open file \"%s\"", fname); 3379 return (errno); 3380 } 3381 pd = pcap_open_dead(DLT_EN10MB, 128); 3382 if (pd == NULL) { 3383 warnx("Failed to open pcap device"); 3384 fclose(fp); 3385 return (EIO); 3386 } 3387 3388 rc = 0; 3389 lno = 0; 3390 lcap = 0; 3391 maxrules = 0; 3392 op->nrules = 0; 3393 op->rule = NULL; 3394 line = NULL; 3395 3396 while ((llen = getline(&line, &lcap, fp)) != -1) { 3397 lno++; 3398 3399 /* Skip empty lines. */ 3400 if (isempty_line(line, llen)) 3401 continue; 3402 3403 if (op->nrules == maxrules) { 3404 maxrules += REALLOC_STRIDE; 3405 r = realloc(op->rule, 3406 maxrules * sizeof(struct offload_rule)); 3407 if (r == NULL) { 3408 warnx("failed to allocate memory for %d rules", 3409 maxrules); 3410 rc = ENOMEM; 3411 goto done; 3412 } 3413 op->rule = r; 3414 } 3415 3416 r = &op->rule[op->nrules]; 3417 rc = parse_offload_policy_line(lno, line, llen, pd, r); 3418 if (rc != 0) { 3419 warnx("Error parsing line %d of \"%s\"", lno, fname); 3420 goto done; 3421 } 3422 3423 op->nrules++; 3424 } 3425 free(line); 3426 3427 if (!feof(fp)) { 3428 warn("Error while reading from file \"%s\" at line %d", 3429 fname, lno); 3430 rc = errno; 3431 goto done; 3432 } 3433 3434 if (op->nrules == 0) { 3435 warnx("No valid rules found in \"%s\"", fname); 3436 rc = EINVAL; 3437 } 3438 done: 3439 pcap_close(pd); 3440 fclose(fp); 3441 if (rc != 0) { 3442 free_offload_policy(op); 3443 } 3444 3445 return (rc); 3446 } 3447 3448 static int 3449 load_offload_policy(int argc, const char *argv[]) 3450 { 3451 int rc = 0; 3452 const char *fname = argv[0]; 3453 struct t4_offload_policy op = {0}; 3454 3455 if (argc != 1) { 3456 warnx("incorrect number of arguments."); 3457 return (EINVAL); 3458 } 3459 3460 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) { 3461 /* op.nrules is 0 and that means clear policy */ 3462 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op)); 3463 } 3464 3465 rc = parse_offload_policy(fname, &op); 3466 if (rc != 0) { 3467 /* Error message displayed already */ 3468 return (EINVAL); 3469 } 3470 3471 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op); 3472 free_offload_policy(&op); 3473 3474 return (rc); 3475 } 3476 3477 static int 3478 display_clip(void) 3479 { 3480 size_t clip_buf_size = 4096; 3481 char *buf, name[32]; 3482 int rc; 3483 3484 buf = malloc(clip_buf_size); 3485 if (buf == NULL) { 3486 warn("%s", __func__); 3487 return (errno); 3488 } 3489 3490 snprintf(name, sizeof(name), "dev.t%unex.%u.misc.clip", g.chip_id, g.inst); 3491 rc = sysctlbyname(name, buf, &clip_buf_size, NULL, 0); 3492 if (rc != 0) { 3493 warn("sysctl %s", name); 3494 free(buf); 3495 return (errno); 3496 } 3497 3498 printf("%s\n", buf); 3499 free(buf); 3500 return (0); 3501 } 3502 3503 static int 3504 clip_cmd(int argc, const char *argv[]) 3505 { 3506 int rc, af = AF_INET6, add; 3507 struct t4_clip_addr ca = {0}; 3508 3509 if (argc == 1 && !strcmp(argv[0], "list")) { 3510 rc = display_clip(); 3511 return (rc); 3512 } 3513 3514 if (argc != 2) { 3515 warnx("incorrect number of arguments."); 3516 return (EINVAL); 3517 } 3518 3519 if (!strcmp(argv[0], "hold")) { 3520 add = 1; 3521 } else if (!strcmp(argv[0], "rel") || !strcmp(argv[0], "release")) { 3522 add = 0; 3523 } else { 3524 warnx("first argument must be \"hold\" or \"release\""); 3525 return (EINVAL); 3526 } 3527 3528 rc = parse_ipaddr(argv[0], argv, &af, &ca.addr[0], &ca.mask[0], 1); 3529 if (rc != 0) 3530 return (rc); 3531 3532 if (add) 3533 rc = doit(CHELSIO_T4_HOLD_CLIP_ADDR, &ca); 3534 else 3535 rc = doit(CHELSIO_T4_RELEASE_CLIP_ADDR, &ca); 3536 3537 return (rc); 3538 } 3539 3540 static int 3541 run_cmd(int argc, const char *argv[]) 3542 { 3543 int rc = -1; 3544 const char *cmd = argv[0]; 3545 3546 /* command */ 3547 argc--; 3548 argv++; 3549 3550 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) 3551 rc = register_io(argc, argv, 4); 3552 else if (!strcmp(cmd, "reg64")) 3553 rc = register_io(argc, argv, 8); 3554 else if (!strcmp(cmd, "regdump")) 3555 rc = dump_regs(argc, argv); 3556 else if (!strcmp(cmd, "filter")) 3557 rc = filter_cmd(argc, argv, 0); 3558 else if (!strcmp(cmd, "context")) 3559 rc = get_sge_context(argc, argv); 3560 else if (!strcmp(cmd, "loadfw")) 3561 rc = loadfw(argc, argv); 3562 else if (!strcmp(cmd, "memdump")) 3563 rc = memdump(argc, argv); 3564 else if (!strcmp(cmd, "tcb")) 3565 rc = read_tcb(argc, argv); 3566 else if (!strcmp(cmd, "i2c")) 3567 rc = read_i2c(argc, argv); 3568 else if (!strcmp(cmd, "clearstats")) 3569 rc = clearstats(argc, argv); 3570 else if (!strcmp(cmd, "tracer")) 3571 rc = tracer_cmd(argc, argv); 3572 else if (!strcmp(cmd, "modinfo")) 3573 rc = modinfo(argc, argv); 3574 else if (!strcmp(cmd, "sched-class")) 3575 rc = sched_class(argc, argv); 3576 else if (!strcmp(cmd, "sched-queue")) 3577 rc = sched_queue(argc, argv); 3578 else if (!strcmp(cmd, "loadcfg")) 3579 rc = loadcfg(argc, argv); 3580 else if (!strcmp(cmd, "loadboot")) 3581 rc = loadboot(argc, argv); 3582 else if (!strcmp(cmd, "loadboot-cfg")) 3583 rc = loadbootcfg(argc, argv); 3584 else if (!strcmp(cmd, "dumpstate")) 3585 rc = dumpstate(argc, argv); 3586 else if (!strcmp(cmd, "policy")) 3587 rc = load_offload_policy(argc, argv); 3588 else if (!strcmp(cmd, "hashfilter")) 3589 rc = filter_cmd(argc, argv, 1); 3590 else if (!strcmp(cmd, "clip")) 3591 rc = clip_cmd(argc, argv); 3592 else { 3593 rc = EINVAL; 3594 warnx("invalid command \"%s\"", cmd); 3595 } 3596 3597 return (rc); 3598 } 3599 3600 #define MAX_ARGS 15 3601 static int 3602 run_cmd_loop(void) 3603 { 3604 int i, rc = 0; 3605 char buffer[128], *buf; 3606 const char *args[MAX_ARGS + 1]; 3607 3608 /* 3609 * Simple loop: displays a "> " prompt and processes any input as a 3610 * cxgbetool command. You're supposed to enter only the part after 3611 * "cxgbetool t4nexX". Use "quit" or "exit" to exit. 3612 */ 3613 for (;;) { 3614 fprintf(stdout, "> "); 3615 fflush(stdout); 3616 buf = fgets(buffer, sizeof(buffer), stdin); 3617 if (buf == NULL) { 3618 if (ferror(stdin)) { 3619 warn("stdin error"); 3620 rc = errno; /* errno from fgets */ 3621 } 3622 break; 3623 } 3624 3625 i = 0; 3626 while ((args[i] = strsep(&buf, " \t\n")) != NULL) { 3627 if (args[i][0] != 0 && ++i == MAX_ARGS) 3628 break; 3629 } 3630 args[i] = 0; 3631 3632 if (i == 0) 3633 continue; /* skip empty line */ 3634 3635 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) 3636 break; 3637 3638 rc = run_cmd(i, args); 3639 } 3640 3641 /* rc normally comes from the last command (not including quit/exit) */ 3642 return (rc); 3643 } 3644 3645 #define A_PL_WHOAMI 0x19400 3646 #define A_PL_REV 0x1943c 3647 #define A_PL_VF_WHOAMI 0x200 3648 #define A_PL_VF_REV 0x204 3649 3650 static void 3651 open_nexus_device(const char *s) 3652 { 3653 const int len = strlen(s); 3654 long long val; 3655 const char *num; 3656 int rc; 3657 u_int chip_id, whoami; 3658 char buf[128]; 3659 3660 if (len < 2 || isdigit(s[0]) || !isdigit(s[len - 1])) 3661 errx(1, "invalid nexus name \"%s\"", s); 3662 for (num = s + len - 1; isdigit(*num); num--) 3663 continue; 3664 g.inst = strtoll(num, NULL, 0); 3665 g.nexus = s; 3666 snprintf(buf, sizeof(buf), "/dev/%s", g.nexus); 3667 if ((g.fd = open(buf, O_RDWR)) < 0) 3668 err(1, "open(%s)", buf); 3669 3670 g.warn_on_ioctl_err = false; 3671 rc = read_reg(A_PL_REV, 4, &val); 3672 if (rc == 0) { 3673 /* PF */ 3674 g.vf = false; 3675 whoami = A_PL_WHOAMI; 3676 } else { 3677 rc = read_reg(A_PL_VF_REV, 4, &val); 3678 if (rc != 0) 3679 errx(1, "%s is not a Terminator device.", s); 3680 /* VF */ 3681 g.vf = true; 3682 whoami = A_PL_VF_WHOAMI; 3683 } 3684 chip_id = (val >> 4) & 0xf; 3685 if (chip_id == 0) 3686 chip_id = 4; 3687 if (chip_id < 4 || chip_id > 7) 3688 warnx("%s reports chip_id %d.", s, chip_id); 3689 g.chip_id = chip_id; 3690 3691 rc = read_reg(whoami, 4, &val); 3692 if (rc != 0) 3693 errx(rc, "failed to read whoami(0x%x): %d", whoami, rc); 3694 g.pf = g.chip_id > 5 ? (val >> 9) & 7 : (val >> 8) & 7; 3695 g.warn_on_ioctl_err = true; 3696 } 3697 3698 int 3699 main(int argc, const char *argv[]) 3700 { 3701 int rc = -1; 3702 3703 g.progname = argv[0]; 3704 3705 if (argc == 2) { 3706 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { 3707 usage(stdout); 3708 exit(0); 3709 } 3710 } 3711 3712 if (argc < 3) { 3713 usage(stderr); 3714 exit(EINVAL); 3715 } 3716 3717 open_nexus_device(argv[1]); 3718 3719 /* progname and nexus */ 3720 argc -= 2; 3721 argv += 2; 3722 3723 if (argc == 1 && !strcmp(argv[0], "stdio")) 3724 rc = run_cmd_loop(); 3725 else 3726 rc = run_cmd(argc, argv); 3727 3728 return (rc); 3729 } 3730