9257fe12 | 27-Jan-2025 |
Mitchell Horne <mhorne@FreeBSD.org> |
riscv: aw_timer enablement for D1
The SBI timer functionality is partially broken on the Allwinner D1, so we require this driver to provide an eventtimer/system timer interrupts.
The timecounter in
riscv: aw_timer enablement for D1
The SBI timer functionality is partially broken on the Allwinner D1, so we require this driver to provide an eventtimer/system timer interrupts.
The timecounter interface, on the other hand, is not required. The generic RISC-V timer driver uses the native rdtime instruction, and implements vdso, so this should be preferred.
Reviewed by: manu, ganbold MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D48672
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c4530dff | 27-Jan-2025 |
Mitchell Horne <mhorne@FreeBSD.org> |
aw_timer: rename driver from a10_timer
This reflects its expanded support for platforms other than the A10.
Functions specific to A10/A13 retain the a10 prefix, but the majority of names in the dri
aw_timer: rename driver from a10_timer
This reflects its expanded support for platforms other than the A10.
Functions specific to A10/A13 retain the a10 prefix, but the majority of names in the driver are changed, e.g. a10_timer_softc becomes aw_timer_softc.
Reviewed by: manu, ganbold MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D48671
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71924545 | 10-Dec-2024 |
Julien Cassette <julien.cassette@gmail.com> |
aw_gpio: support Allwinner D1 GPIO
The GPIO controls the multiplexing of the D1 pins to its peripherals, so this adds the definitions needed by the aw_gpio driver to support the D1.
Also, this modi
aw_gpio: support Allwinner D1 GPIO
The GPIO controls the multiplexing of the D1 pins to its peripherals, so this adds the definitions needed by the aw_gpio driver to support the D1.
Also, this modifies the aw_gpio driver to support the differences of the D1 controller:
- pins can have up to 15 functions - each port is mapped with an alignment of 0x30 - CFG registers have 4 bits per pin - DRV registers have 4 bits per pin - the offset of PULL registers is 0x24
Signed-off-by: Julien Cassette <julien.cassette@gmail.com> Reviewed by: mhorne Differential Revision: https://reviews.freebsd.org/D35593
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4b4e88d9 | 16-Nov-2024 |
Mitchell Horne <mhorne@FreeBSD.org> |
aw_wdog: disable timer on attach
Otherwise it may cause system reset before the watchdog can be pat. This is consistent with other watchdog drivers.
Tested on Allwinner D1.
Reviewed by: manu Spons
aw_wdog: disable timer on attach
Otherwise it may cause system reset before the watchdog can be pat. This is consistent with other watchdog drivers.
Tested on Allwinner D1.
Reviewed by: manu Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D47517
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e51b3d8e | 26-Dec-2023 |
Emmanuel Vadot <manu@FreeBSD.org> |
nvmem: Move nvmem code in dev/nvmem
We've removed kernel option EXT_RESOURCES almost two years ago. While it was ok to have some code under a common 'extres' subdirectory at first, we now have a lot
nvmem: Move nvmem code in dev/nvmem
We've removed kernel option EXT_RESOURCES almost two years ago. While it was ok to have some code under a common 'extres' subdirectory at first, we now have a lot of consumer of it and we made it mandatory so no need to have it under a cryptic name.
Reviewed by: dab, imp Sponsored by: Beckhoff Automation GmbH & Co. KG Differential Revision: https://reviews.freebsd.org/D43193
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