1 /*- 2 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 18 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 19 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 20 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 21 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/param.h> 27 #include <sys/systm.h> 28 #include <sys/bus.h> 29 #include <sys/kernel.h> 30 #include <sys/module.h> 31 #include <machine/bus.h> 32 33 #include <dev/uart/uart.h> 34 #include <dev/uart/uart_bus.h> 35 #include <dev/uart/uart_cpu_fdt.h> 36 #include <dev/uart/uart_dev_ns8250.h> 37 38 #include <dev/ofw/ofw_bus.h> 39 #include <dev/ofw/ofw_bus_subr.h> 40 41 #include <dev/clk/clk.h> 42 #include <dev/hwreset/hwreset.h> 43 44 #include "uart_if.h" 45 46 struct snps_softc { 47 struct ns8250_softc ns8250; 48 49 clk_t baudclk; 50 clk_t apb_pclk; 51 hwreset_t reset; 52 }; 53 54 /* 55 * To use early printf on 64 bits Allwinner SoC, add to kernel config 56 * options SOCDEV_PA=0x0 57 * options SOCDEV_VA=0x40000000 58 * options EARLY_PRINTF 59 * 60 * To use early printf on 32 bits Allwinner SoC, add to kernel config 61 * options SOCDEV_PA=0x01C00000 62 * options SOCDEV_VA=0x10000000 63 * options EARLY_PRINTF 64 * 65 * remove the if 0 66 */ 67 #if 0 68 #ifdef EARLY_PRINTF 69 static void 70 uart_snps_early_putc(int c) 71 { 72 volatile uint32_t *stat; 73 volatile uint32_t *tx; 74 75 #ifdef ALLWINNER_64 76 stat = (uint32_t *) (SOCDEV_VA + 0x1C2807C); 77 tx = (uint32_t *) (SOCDEV_VA + 0x1C28000); 78 #endif 79 #ifdef ALLWINNER_32 80 stat = (uint32_t *) (SOCDEV_VA + 0x2807C); 81 tx = (uint32_t *) (SOCDEV_VA + 0x28000); 82 #endif 83 84 while ((*stat & (1 << 2)) == 0) 85 continue; 86 *tx = c; 87 } 88 early_putc_t *early_putc = uart_snps_early_putc; 89 #endif /* EARLY_PRINTF */ 90 #endif 91 92 static kobj_method_t snps_methods[] = { 93 KOBJMETHOD(uart_probe, ns8250_bus_probe), 94 KOBJMETHOD(uart_attach, ns8250_bus_attach), 95 KOBJMETHOD(uart_detach, ns8250_bus_detach), 96 KOBJMETHOD(uart_flush, ns8250_bus_flush), 97 KOBJMETHOD(uart_getsig, ns8250_bus_getsig), 98 KOBJMETHOD(uart_ioctl, ns8250_bus_ioctl), 99 KOBJMETHOD(uart_ipend, ns8250_bus_ipend), 100 KOBJMETHOD(uart_param, ns8250_bus_param), 101 KOBJMETHOD(uart_receive, ns8250_bus_receive), 102 KOBJMETHOD(uart_setsig, ns8250_bus_setsig), 103 KOBJMETHOD(uart_transmit, ns8250_bus_transmit), 104 KOBJMETHOD(uart_grab, ns8250_bus_grab), 105 KOBJMETHOD(uart_ungrab, ns8250_bus_ungrab), 106 KOBJMETHOD_END 107 }; 108 109 struct uart_class uart_snps_class = { 110 "snps", 111 snps_methods, 112 sizeof(struct snps_softc), 113 .uc_ops = &uart_ns8250_ops, 114 .uc_range = 8, 115 .uc_rclk = 0, 116 }; 117 118 static struct ofw_compat_data compat_data[] = { 119 { "snps,dw-apb-uart", (uintptr_t)&uart_snps_class }, 120 { "marvell,armada-38x-uart", (uintptr_t)&uart_snps_class }, 121 { NULL, (uintptr_t)NULL } 122 }; 123 UART_FDT_CLASS(compat_data); 124 125 static int 126 snps_get_clocks(device_t dev, clk_t *baudclk, clk_t *apb_pclk) 127 { 128 129 *baudclk = NULL; 130 *apb_pclk = NULL; 131 132 /* Baud clock is either named "baudclk", or there is a single 133 * unnamed clock. 134 */ 135 if (clk_get_by_ofw_name(dev, 0, "baudclk", baudclk) != 0 && 136 clk_get_by_ofw_index(dev, 0, 0, baudclk) != 0) 137 return (ENOENT); 138 139 /* APB peripheral clock is optional */ 140 (void)clk_get_by_ofw_name(dev, 0, "apb_pclk", apb_pclk); 141 142 return (0); 143 } 144 145 static int 146 snps_probe(device_t dev) 147 { 148 struct snps_softc *sc; 149 struct uart_class *uart_class; 150 phandle_t node; 151 uint32_t shift, iowidth, clock; 152 uint64_t freq; 153 int error; 154 clk_t baudclk, apb_pclk; 155 hwreset_t reset; 156 157 if (!ofw_bus_status_okay(dev)) 158 return (ENXIO); 159 160 uart_class = (struct uart_class *)ofw_bus_search_compatible(dev, 161 compat_data)->ocd_data; 162 if (uart_class == NULL) 163 return (ENXIO); 164 165 freq = 0; 166 sc = device_get_softc(dev); 167 sc->ns8250.base.sc_class = uart_class; 168 169 node = ofw_bus_get_node(dev); 170 if (OF_getencprop(node, "reg-shift", &shift, sizeof(shift)) <= 0) 171 shift = 0; 172 if (OF_getencprop(node, "reg-io-width", &iowidth, sizeof(iowidth)) <= 0) 173 iowidth = 1; 174 if (OF_getencprop(node, "clock-frequency", &clock, sizeof(clock)) <= 0) 175 clock = 0; 176 177 if (hwreset_get_by_ofw_idx(dev, 0, 0, &reset) == 0) { 178 error = hwreset_deassert(reset); 179 if (error != 0) { 180 device_printf(dev, "cannot de-assert reset\n"); 181 return (error); 182 } 183 } 184 185 if (snps_get_clocks(dev, &baudclk, &apb_pclk) == 0) { 186 error = clk_enable(baudclk); 187 if (error != 0) { 188 device_printf(dev, "cannot enable baud clock\n"); 189 return (error); 190 } 191 if (apb_pclk != NULL) { 192 error = clk_enable(apb_pclk); 193 if (error != 0) { 194 device_printf(dev, 195 "cannot enable peripheral clock\n"); 196 return (error); 197 } 198 } 199 200 if (clock == 0) { 201 error = clk_get_freq(baudclk, &freq); 202 if (error != 0) { 203 device_printf(dev, "cannot get frequency\n"); 204 return (error); 205 } 206 clock = (uint32_t)freq; 207 } 208 } 209 210 if (bootverbose && clock == 0) 211 device_printf(dev, "could not determine frequency\n"); 212 213 error = uart_bus_probe(dev, (int)shift, (int)iowidth, (int)clock, 0, 0, UART_F_BUSY_DETECT); 214 if (error > 0) 215 return (error); 216 217 /* XXX uart_bus_probe has changed the softc, so refresh it */ 218 sc = device_get_softc(dev); 219 220 /* Store clock and reset handles for detach */ 221 sc->baudclk = baudclk; 222 sc->apb_pclk = apb_pclk; 223 sc->reset = reset; 224 225 return (BUS_PROBE_VENDOR); 226 } 227 228 static int 229 snps_detach(device_t dev) 230 { 231 struct snps_softc *sc; 232 clk_t baudclk, apb_pclk; 233 hwreset_t reset; 234 int error; 235 236 sc = device_get_softc(dev); 237 baudclk = sc->baudclk; 238 apb_pclk = sc->apb_pclk; 239 reset = sc->reset; 240 241 error = uart_bus_detach(dev); 242 if (error != 0) 243 return (error); 244 245 if (reset != NULL) { 246 error = hwreset_assert(reset); 247 if (error != 0) { 248 device_printf(dev, "cannot assert reset\n"); 249 return (error); 250 } 251 hwreset_release(reset); 252 } 253 if (apb_pclk != NULL) { 254 error = clk_release(apb_pclk); 255 if (error != 0) { 256 device_printf(dev, "cannot release peripheral clock\n"); 257 return (error); 258 } 259 } 260 if (baudclk != NULL) { 261 error = clk_release(baudclk); 262 if (error != 0) { 263 device_printf(dev, "cannot release baud clock\n"); 264 return (error); 265 } 266 } 267 268 return (0); 269 } 270 271 static device_method_t snps_bus_methods[] = { 272 /* Device interface */ 273 DEVMETHOD(device_probe, snps_probe), 274 DEVMETHOD(device_attach, uart_bus_attach), 275 DEVMETHOD(device_detach, snps_detach), 276 DEVMETHOD_END 277 }; 278 279 static driver_t snps_uart_driver = { 280 uart_driver_name, 281 snps_bus_methods, 282 sizeof(struct snps_softc) 283 }; 284 285 DRIVER_MODULE(uart_snps, simplebus, snps_uart_driver, 0, 0); 286