| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | axp20x.txt | 4 axp152 (X-Powers)
5 axp202 (X-Powers)
6 axp209 (X-Powers)
7 axp221 (X-Powers)
8 axp223 (X-Powers)
9 axp803 (X-Powers)
10 axp806 (X-Powers)
11 axp809 (X-Powers)
12 axp813 (X-Powers)
20 - compatible: should be one of:
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| /illumos-gate/usr/src/man/man8/ |
| H A D | stmsboot.8 | 8 stmsboot \- administration program for the Solaris I/O multipathing feature
12 \fB/usr/sbin/stmsboot\fR [[\fB-d\fR | \fB-e\fR [\fB-D\fR (fp | mpt) ]]
13 | \fB-u\fR | \fB-L\fR | \fB-l\fR \fIcontroller_number\fR]
25 of multipath-capable devices with Solaris I/O multipathing. Solaris I/O
26 multipathing-enabled devices are enumerated under \fBscsi_vhci\fR(4D),
27 providing multipathing capabilities. Solaris I/O multipathing-disabled devices
31 In the \fB/dev\fR and \fB/devices\fR trees, Solaris I/O multipathing-enabled
46 \fB\fB-e\fR [ \fB-D\fR \fBfp | mpt\fR ]\fR
50 Enables Solaris I/O multipathing on all supported multipath-capable controller
51 ports. Multipath-capable ports include fibre channel (\fBfp\fR(4D)) controller
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| /freebsd/share/man/man9/ |
| H A D | ieee80211.9 | 51 .Fn ieee80211_setmode "struct ieee80211com *ic" "enum ieee80211_phymode mode"
58 .Fa "struct ieee80211com *ic" "int rate" "enum ieee80211_phymode mode"
72 layer for protocol services but devices that off-load functionality
80 These interfaces have an operating mode
181 functions are device-independent handlers for
188 function is called from within the 802.11 stack to change the mode
194 function returns the PHY mode required for use with the channel
206 sub-type, for the device
208 running in PHY mode
209 .Fa mode .
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| /freebsd/sys/dev/mii/ |
| H A D | rgephyreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
55 #define RGEPHY_BMCR_FDX 0x0100 /* Duplex mode */
64 #define RGEPHY_BMSR_100T4 0x8000 /* 100 base T4 capable */
65 #define RGEPHY_BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
66 #define RGEPHY_BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
67 #define RGEPHY_BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
68 #define RGEPHY_BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
69 #define RGEPHY_BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */
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| H A D | mii.h | 3 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
50 #define MII_BMCR 0x00 /* Basic mode control register (rw) */
58 #define BMCR_FDX 0x0100 /* Set duplex mode */
68 #define MII_BMSR 0x01 /* Basic mode status register (ro) */
69 #define BMSR_100T4 0x8000 /* 100 base T4 capable */
70 #define BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
71 #define BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
72 #define BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
73 #define BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
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| H A D | brgphyreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
50 #define BRGPHY_BMCR_FDX 0x0100 /* Duplex mode */
63 #define BRGPHY_BMSR_ANEG 0x0008 /* Autoneg capable */
72 #define BRGPHY_ANAR_PC 0x0400 /* Pause capable */
79 #define BRGPHY_ANLPAR_PC 0x0400 /* Pause capable */
89 #define BRGPHY_ANER_LPAN 0x0001 /* Link partner autoneg capable */
113 #define BRGPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */
114 #define BRGPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */
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| H A D | ciphyreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
51 #define CIPHY_BMCR_FDX 0x0100 /* Duplex mode */
61 #define CIPHY_BMSR_100T4 0x8000 /* 100 base T4 capable */
62 #define CIPHY_BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
63 #define CIPHY_BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
64 #define CIPHY_BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
65 #define CIPHY_BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
66 #define CIPHY_BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */
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| /illumos-gate/usr/src/contrib/bhyve/dev/mii/ |
| H A D | mii.h | 3 /*-
48 #define MII_BMCR 0x00 /* Basic mode control register (rw) */
56 #define BMCR_FDX 0x0100 /* Set duplex mode */
66 #define MII_BMSR 0x01 /* Basic mode status register (ro) */
67 #define BMSR_100T4 0x8000 /* 100 base T4 capable */
68 #define BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
69 #define BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
70 #define BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
71 #define BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
72 #define BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */
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| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | mediatek,mtk-xhci.txt | 6 the second one supports dual-role mode, and the host is based on xHCI
11 ------------------------------------------------------------------------
14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
18 - "mediatek,mt8173-xhci"
19 - reg : specifies physical base address and size of the registers
20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
21 - interrupts : interrupt used by the controller
22 - power-domains : a phandle to USB power domain node to control USB's
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| H A D | generic.txt | 4 - maximum-speed: tells USB controllers we want to work up to a certain
5 speed. Valid arguments are "super-speed-plus",
6 "super-speed", "high-speed", "full-speed" and
7 "low-speed". In case this isn't passed via DT, USB
10 - dr_mode: tells Dual-Role USB controllers that we want to work on a
11 particular mode. Valid arguments are "host",
15 - phy_type: tells USB controllers that we want to configure the core to support
16 a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
20 - otg-rev: tells usb driver the release number of the OTG and EH supplement
22 in binary-coded decimal (i.e. 2.0 is 0200H). This
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| H A D | usb-drd.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-drd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 otg-rev:
16 which the device and its descriptors are compliant, in binary-coded
18 features (HNP/SRP/ADP) is enabled. If ADP is required, otg-rev should be
25 Tells Dual-Role USB controllers that we want to work on a particular
26 mode. In case this attribute isn't passed via DT, USB DRD controllers
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| /freebsd/share/man/man4/ |
| H A D | rsu.4 | 1 .\"-
2 .\" SPDX-License-Identifier: ISC
29 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
44 rsu-rtl8712fw_load="YES"
53 a MAC, a 1T1R capable baseband and an RF in a single chip.
56 The RTL8191SU is a highly integrated multiple-in, single-out (MISO)
57 802.11n adapter that combines a MAC, a 1T2R capable baseband and an
61 The RTL8192SU is a highly integrated multiple-in, multiple-out (MIMO)
62 802.11n adapter that combines a MAC, a 2T2R capable baseband and an
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| H A D | wlan.4 | 31 .Nd generic WiFi 802.11 link-layer support
45 supports multi-mode devices capable of
49 through a combination of in-kernel code and user-mode applications.
50 The WME/WMM multi-media protocols are supported entirely within
53 module but require a suitably capable hardware device.
55 capable devices.
70 this is the way by which ``multi-bss support'' is provided but it
76 .Bl -tag -width monitor
87 A station operating in ``adhoc demo mode''.
96 In particular this specified to have read-only properties
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| H A D | re.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
59 NICs based on the 8139C+ and 810xE are capable of 10 and 100Mbps speeds
61 NICs based on the 8169, 816xS, 811xS, 8168 and 8111 are capable of 10, 100
67 features, and use a descriptor-based DMA mechanism.
69 capable of TCP large send (TCP segmentation offload).
71 The 8139C+ is a single-chip solution combining both a 10/100 MAC and PHY.
73 The 816xS, 811xS, 8168 and 8111 are single-chip devices containing both a
76 in both 32-bit PCI and 64-bit PCI models.
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| H A D | pim.4 | 1 .\" Copyright (c) 2001-2003 International Computer Science Institute
53 Protocol Independent Multicast - Sparse Mode (PIM-SM) and
54 Protocol Independent Multicast - Dense Mode (PIM-DM).
56 PIM-SM is a multicast routing protocol that can use the underlying
57 unicast routing information base or a separate multicast-capable
61 and optionally creates shortest-path trees per source.
63 PIM-DM is a multicast routing protocol that uses the underlying
69 Both PIM-SM and PIM-DM are fairly complex protocols,
70 though PIM-SM is much more complex.
71 To enable PIM-SM or PIM-DM multicast routing in a router,
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| /illumos-gate/usr/src/uts/common/io/bnx/570x/common/include/ |
| H A D | serdes.h | 2 * Copyright 2014-2017 Cavium, Inc.
9 * at http://opensource.org/licenses/CDDL-1.0
36 /* Value of '1' sets global loopback mode. */
38 /* Combine with <b>MANUAL_SPD1</b> and is valid in SGMII mode
46 /* Value of '1 enables low power mode. */
48 /* Write of '1' initiate auto-negotiation and will self clear
49 when auto-negotiation
52 /* Value of '1' indicates full duplex mode is set. */
54 /* Value of '1' enables collision test mode. */
56 /* Combine with <b>MANUAL_SPD0</b> and is valid in SGMII mode
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| /freebsd/sys/dev/e1000/ |
| H A D | e1000_defines.h | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
76 #define E1000_CTRL_EXT_FORCE_SMBUS 0x00000800 /* Force SMBus mode */
85 /* Offset of the link mode field in Ctrl Ext register */
94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
172 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
173 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
194 #define E1000_RCTL_LBM_NO 0x00000000 /* no loopback mode */
195 #define E1000_RCTL_LBM_MAC 0x00000040 /* MAC loopback mode */
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| /illumos-gate/usr/src/uts/common/io/e1000api/ |
| H A D | e1000_defines.h | 3 Copyright (c) 2001-2015, Intel Corporation
76 #define E1000_CTRL_EXT_FORCE_SMBUS 0x00000800 /* Force SMBus mode */
85 /* Offset of the link mode field in Ctrl Ext register */
94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
173 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
174 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
195 #define E1000_RCTL_LBM_NO 0x00000000 /* no loopback mode */
196 #define E1000_RCTL_LBM_MAC 0x00000040 /* MAC loopback mode */
197 #define E1000_RCTL_LBM_TCVR 0x000000C0 /* tcvr loopback mode */
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| /freebsd/sys/net80211/ |
| H A D | ieee80211_vht.c | 1 /*-
27 * IEEE 802.11ac-2013 protocol support.
86 ieee80211_note(ni->ni_vap, "%s: called; fc=0x%.2x/0x%.2x", in vht_recv_action_placeholder()
87 __func__, wh->i_fc[0], wh->i_fc[1]); in vht_recv_action_placeholder()
98 ieee80211_note(ni->ni_vap, "%s: called; category=%d, action=%d", in vht_send_action_placeholder()
138 struct ieee80211com *ic = vap->iv_ic; in ieee80211_vht_vattach()
143 vap->iv_vht_cap.vht_cap_info = ic->ic_vht_cap.vht_cap_info; in ieee80211_vht_vattach()
144 vap->iv_vhtextcaps = ic->ic_vhtextcaps; in ieee80211_vht_vattach()
147 vap->iv_vht_flags = in ieee80211_vht_vattach()
151 if (IEEE80211_VHTCAP_SUPP_CHAN_WIDTH_IS_160MHZ(vap->iv_vht_cap.vht_cap_info)) in ieee80211_vht_vattach()
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| /freebsd/sbin/ifconfig/ |
| H A D | ifconfig.8 | 1 .\"-
2 .\" SPDX-License-Identifier: BSD-3-Clause
93 .Bl -tag -width indent
120 The format is specified as a comma-separated list of
141 .Bl -tag -width default
145 .Bl -tag -width default -compact
158 Adjust the display of link-level ethernet (MAC) addresses:
160 .Bl -tag -width default -compact
175 .Bl -tag -width default -compact
192 .Bl -tag -width default -compact
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| /illumos-gate/usr/src/grub/grub-0.97/netboot/ |
| H A D | e1000_hw.h | 4 Copyright(c) 1999 - 2003 Intel Corporation. All rights reserved.
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
291 /* MAC decode size is 128K - This is the size of BAR0 */
309 (MAXIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
311 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
355 * E1000_RAR_ENTRIES - 1 multicast addresses.
379 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
559 * RW - register is both readable and writable
560 * RO - register is read only
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| /freebsd/sys/dev/igc/ |
| H A D | igc_defines.h | 1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
64 #define IGC_CTRL_EXT_FORCE_SMBUS 0x00000800 /* Force SMBus mode */
72 #define IGC_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
89 #define IGC_RXD_STAT_PIF 0x80 /* passed in-exact filter */
127 #define IGC_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
128 #define IGC_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
149 #define IGC_RCTL_LBM_NO 0x00000000 /* no loopback mode */
150 #define IGC_RCTL_LBM_MAC 0x00000040 /* MAC loopback mode */
151 #define IGC_RCTL_LBM_TCVR 0x000000C0 /* tcvr loopback mode */
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| /illumos-gate/usr/src/uts/common/io/igc/core/ |
| H A D | igc_defines.h | 1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
64 #define IGC_CTRL_EXT_FORCE_SMBUS 0x00000800 /* Force SMBus mode */
72 #define IGC_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
89 #define IGC_RXD_STAT_PIF 0x80 /* passed in-exact filter */
128 #define IGC_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
129 #define IGC_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
150 #define IGC_RCTL_LBM_NO 0x00000000 /* no loopback mode */
151 #define IGC_RCTL_LBM_MAC 0x00000040 /* MAC loopback mode */
152 #define IGC_RCTL_LBM_TCVR 0x000000C0 /* tcvr loopback mode */
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| /illumos-gate/usr/src/man/man3cpc/ |
| H A D | cpc_set_create.3cpc | 8 cpc_set_create, cpc_set_destroy, cpc_set_add_request, cpc_walk_requests \-
13 cc [ \fIflag\fR\&.\|.\|. ] \fIfile\fR\&.\|.\|. \fB-lcpc\fR [ \fIlibrary\fR\&.\|.\|. ]
56 capable of counting the event specified in the request. If the bind is
57 successful, a 64-bit virtualized counter is created to store the counts
103 The counter should count events that occur while the processor is in user mode.
114 mode.
125 overflows. A \fBSIGEMT\fR signal is delivered if the processor is capable of
143 containing processor-specific attributes that modify the request's
163 Upon successful completion, \fBCpc_set_destroy()\fR returns 0. Otherwise, -1 is
169 retrieval. Otherwise, -1 is returned and \fBerrno\fR is set to indicate the
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| /freebsd/sys/dev/ath/ath_hal/ar5211/ |
| H A D | ar5211_beacon.c | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2006 Atheros Communications, Inc.
50 OS_REG_WRITE(ah, AR_TIMER0, bt->bt_nexttbtt); in ar5211SetBeaconTimers()
51 OS_REG_WRITE(ah, AR_TIMER1, bt->bt_nextdba); in ar5211SetBeaconTimers()
52 OS_REG_WRITE(ah, AR_TIMER2, bt->bt_nextswba); in ar5211SetBeaconTimers()
53 OS_REG_WRITE(ah, AR_TIMER3, bt->bt_nextatim); in ar5211SetBeaconTimers()
57 OS_REG_WRITE(ah, AR_BEACON, bt->bt_intval); in ar5211SetBeaconTimers()
71 * TIMER1: in AP/adhoc mode this controls the DMA beacon in ar5211BeaconInit()
[all …]
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