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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_tx99_tgt.c40 ar9300_tx99_tgt_channel_pwr_update(struct ath_hal *ah, HAL_CHANNEL *c, u_int32_t txpower) in ar9300_tx99_tgt_channel_pwr_update() argument
50 OS_REG_WRITE(ah, AR_PHY_TX_FORCED_GAIN, 0); in ar9300_tx99_tgt_channel_pwr_update()
54 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(1), in ar9300_tx99_tgt_channel_pwr_update()
61 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(2), in ar9300_tx99_tgt_channel_pwr_update()
70 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(3), in ar9300_tx99_tgt_channel_pwr_update()
77 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(4), in ar9300_tx99_tgt_channel_pwr_update()
86 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(5), in ar9300_tx99_tgt_channel_pwr_update()
94 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(6), in ar9300_tx99_tgt_channel_pwr_update()
102 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(10), in ar9300_tx99_tgt_channel_pwr_update()
111 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(11), in ar9300_tx99_tgt_channel_pwr_update()
[all …]
H A Dar9300_stub.c33 ar9300_set_stub_functions(struct ath_hal *ah) in ar9300_set_stub_functions() argument
38 ah->ah_getRateTable = ar9300_Stub_GetRateTable; in ar9300_set_stub_functions()
42 ah->ah_reset = ar9300_Stub_Reset; in ar9300_set_stub_functions()
43 ah->ah_phyDisable = ar9300_Stub_PhyDisable; in ar9300_set_stub_functions()
44 ah->ah_disable = ar9300_Stub_Disable; in ar9300_set_stub_functions()
45 ah->ah_configPCIE = ar9300_Stub_ConfigPCIE; in ar9300_set_stub_functions()
46 ah->ah_disablePCIE = ar9300_Stub_DisablePCIE; in ar9300_set_stub_functions()
47 ah->ah_setPCUConfig = ar9300_Stub_SetPCUConfig; in ar9300_set_stub_functions()
48 ah->ah_perCalibration = ar9300_Stub_PerCalibration; in ar9300_set_stub_functions()
49 ah->ah_perCalibrationN = ar9300_Stub_PerCalibrationN; in ar9300_set_stub_functions()
[all …]
H A Dar9300_stub_funcs.c33 ar9300_Stub_GetRadioRev(struct ath_hal *ah) in ar9300_Stub_GetRadioRev() argument
36 ath_hal_printf(ah, "%s: called\n", __func__); in ar9300_Stub_GetRadioRev()
46 ath_hal_printf(ah, "%s: called\n", __func__);
53 ar9300_Stub_Detach(struct ath_hal *ah) in ar9300_Stub_Detach() argument
56 ath_hal_printf(ah, "%s: called\n", __func__); in ar9300_Stub_Detach()
61 ar9300_Stub_ChipTest(struct ath_hal *ah) in ar9300_Stub_ChipTest() argument
64 ath_hal_printf(ah, "%s: called\n", __func__); in ar9300_Stub_ChipTest()
69 ar9300_Stub_GetChannelEdges(struct ath_hal *ah, uint16_t flags, in ar9300_Stub_GetChannelEdges() argument
73 ath_hal_printf(ah, "%s: called\n", __func__); in ar9300_Stub_GetChannelEdges()
78 ar9300_Stub_FillCapabilityInfo(struct ath_hal *ah) in ar9300_Stub_FillCapabilityInfo() argument
[all …]
H A Dar9300_power.c26 void ar9300_wowoffload_prep(struct ath_hal *ah) in ar9300_wowoffload_prep() argument
28 struct ath_hal_9300 *ahp = AH9300(ah); in ar9300_wowoffload_prep()
34 void ar9300_wowoffload_post(struct ath_hal *ah) in ar9300_wowoffload_post() argument
36 struct ath_hal_9300 *ahp = AH9300(ah); in ar9300_wowoffload_post()
40 val = OS_REG_READ(ah, AR_MCAST_FIL0); in ar9300_wowoffload_post()
42 OS_REG_WRITE(ah, AR_MCAST_FIL0, val); in ar9300_wowoffload_post()
45 val = OS_REG_READ(ah, AR_MCAST_FIL1); in ar9300_wowoffload_post()
47 OS_REG_WRITE(ah, AR_MCAST_FIL1, val); in ar9300_wowoffload_post()
54 static void ar9300_wowoffload_add_mcast_filter(struct ath_hal *ah, u_int8_t *mc_addr) in ar9300_wowoffload_add_mcast_filter() argument
56 struct ath_hal_9300 *ahp = AH9300(ah); in ar9300_wowoffload_add_mcast_filter()
[all …]
H A Dar9300_misc.c31 static u_int32_t ar9300_read_loc_timer(struct ath_hal *ah);
34 ar9300_get_hw_hangs(struct ath_hal *ah, hal_hw_hangs_t *hangs) in ar9300_get_hw_hangs() argument
36 struct ath_hal_9300 *ahp = AH9300(ah); in ar9300_get_hw_hangs()
39 if (ar9300_get_capability(ah, HAL_CAP_BB_RIFS_HANG, 0, AH_NULL) == HAL_OK) { in ar9300_get_hw_hangs()
42 if (ar9300_get_capability(ah, HAL_CAP_BB_DFS_HANG, 0, AH_NULL) == HAL_OK) { in ar9300_get_hw_hangs()
45 if (ar9300_get_capability(ah, HAL_CAP_BB_RX_CLEAR_STUCK_HANG, 0, AH_NULL) in ar9300_get_hw_hangs()
50 if (ar9300_get_capability(ah, HAL_CAP_MAC_HANG, 0, AH_NULL) == HAL_OK) { in ar9300_get_hw_hangs()
53 if (ar9300_get_capability(ah, HAL_CAP_PHYRESTART_CLR_WAR, 0, AH_NULL) in ar9300_get_hw_hangs()
67 ar9300_mac_to_usec(struct ath_hal *ah, u_int clks) in ar9300_mac_to_usec() argument
70 const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; in ar9300_mac_to_usec()
[all …]
H A Dar9300_freebsd.c36 static HAL_BOOL ar9300ClrMulticastFilterIndex(struct ath_hal *ah, uint32_t ix);
37 static HAL_BOOL ar9300SetMulticastFilterIndex(struct ath_hal *ah, uint32_t ix);
39 static void ar9300_beacon_set_beacon_timers(struct ath_hal *ah,
43 ar9300SetChainMasks(struct ath_hal *ah, uint32_t tx_chainmask, in ar9300SetChainMasks() argument
47 AH9300(ah)->ah_tx_chainmask = in ar9300SetChainMasks()
48 tx_chainmask & AH_PRIVATE(ah)->ah_caps.halTxChainMask; in ar9300SetChainMasks()
49 AH9300(ah)->ah_rx_chainmask = in ar9300SetChainMasks()
50 rx_chainmask & AH_PRIVATE(ah)->ah_caps.halRxChainMask; in ar9300SetChainMasks()
54 ar9300GetSlotTime(struct ath_hal *ah) in ar9300GetSlotTime() argument
56 u_int clks = OS_REG_READ(ah, AR_D_GBL_IFS_SLOT) & 0xffff; in ar9300GetSlotTime()
[all …]
H A Dar9300_mci.c32 static void ar9300_mci_print_msg(struct ath_hal *ah, HAL_BOOL send,u_int8_t hdr, in ar9300_mci_print_msg() argument
53 HALDEBUG(ah, HAL_DEBUG_BT_COEX, "%s\n", s); in ar9300_mci_print_msg()
64 void ar9300_mci_osla_setup(struct ath_hal *ah, HAL_BOOL enable) in ar9300_mci_osla_setup() argument
70 OS_REG_RMW_FIELD(ah, AR_MCI_SCHD_TABLE_2, AR_MCI_SCHD_TABLE_2_HW_BASED, 1); in ar9300_mci_osla_setup()
71 OS_REG_RMW_FIELD(ah, AR_MCI_SCHD_TABLE_2, AR_MCI_SCHD_TABLE_2_MEM_BASED, 1); in ar9300_mci_osla_setup()
73 if (!(ah->ah_config.ath_hal_mci_config & in ar9300_mci_osla_setup()
77 if (AR_SREV_APHRODITE(ah)) in ar9300_mci_osla_setup()
78 OS_REG_RMW_FIELD(ah, AR_MCI_MISC, AR_MCI_MISC_HW_FIX_EN, 1); in ar9300_mci_osla_setup()
80 thresh = MS(ah->ah_config.ath_hal_mci_config, in ar9300_mci_osla_setup()
82 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL, in ar9300_mci_osla_setup()
[all …]
H A Dar9300_spectral.c50 void ar9300_disable_cck(struct ath_hal *ah);
51 void ar9300_disable_radar(struct ath_hal *ah);
52 void ar9300_disable_restart(struct ath_hal *ah);
53 void ar9300_set_radar_dc_thresh(struct ath_hal *ah);
54 void ar9300_disable_weak_signal(struct ath_hal *ah);
55 void ar9300_disable_strong_signal(struct ath_hal *ah);
56 void ar9300_prep_spectral_scan(struct ath_hal *ah);
57 void ar9300_disable_dc_offset(struct ath_hal *ah);
58 void ar9300_enable_cck_detect(struct ath_hal *ah);
61 ar9300_disable_cck(struct ath_hal *ah) in ar9300_disable_cck() argument
[all …]
H A Dar9300_gpio.c37 struct ath_hal *ah, in ar9340_soc_gpio_cfg_output_mux() argument
82 ar9300_gpio_cfg_output_mux(struct ath_hal *ah, u_int32_t gpio, u_int32_t type) in ar9300_gpio_cfg_output_mux() argument
89 addr = AR_HOSTIF_REG(ah, AR_GPIO_OUTPUT_MUX3); in ar9300_gpio_cfg_output_mux()
91 addr = AR_HOSTIF_REG(ah, AR_GPIO_OUTPUT_MUX2); in ar9300_gpio_cfg_output_mux()
93 addr = AR_HOSTIF_REG(ah, AR_GPIO_OUTPUT_MUX1); in ar9300_gpio_cfg_output_mux()
103 OS_REG_RMW(ah, addr, (type << gpio_shift), (0x1f << gpio_shift)); in ar9300_gpio_cfg_output_mux()
111 struct ath_hal *ah, in ar9300_gpio_cfg_output() argument
163 HALASSERT(gpio < AH_PRIVATE(ah)->ah_caps.halNumGpioPins); in ar9300_gpio_cfg_output()
179 OS_REG_SET_BIT(ah, in ar9300_gpio_cfg_output()
180 AR_HOSTIF_REG(ah, AR_GPIO_INPUT_EN_VAL), AR_GPIO_JTAG_DISABLE); in ar9300_gpio_cfg_output()
[all …]
H A Dar9300_reset.c44 extern HAL_BOOL ar9300_reset_tx_queue(struct ath_hal *ah, u_int q);
45 extern u_int32_t ar9300_num_tx_pending(struct ath_hal *ah, u_int q);
59 static HAL_BOOL ar9300_tx_iq_cal_hw_run(struct ath_hal *ah);
60 static void ar9300_tx_iq_cal_post_proc(struct ath_hal *ah,HAL_CHANNEL_INTERNAL *ichan,
62 static void ar9300_tx_iq_cal_outlier_detection(struct ath_hal *ah,HAL_CHANNEL_INTERNAL *ichan,
65 static void ar9300_tx_iq_cal_apply(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan);
69 static inline void ar9300_prog_ini(struct ath_hal *ah, struct ar9300_ini_array *ini_arr, int column…
70 static inline void ar9300_set_rf_mode(struct ath_hal *ah, struct ieee80211_channel *chan);
71 static inline HAL_BOOL ar9300_init_cal(struct ath_hal *ah, struct ieee80211_channel *chan, HAL_BOOL…
72 static inline void ar9300_init_user_settings(struct ath_hal *ah);
[all …]
H A Dar9300_paprd.c51 ar9300_paprd_setup_single_table(struct ath_hal *ah, struct ieee80211_channel * chan) in ar9300_paprd_setup_single_table() argument
54 HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); in ar9300_paprd_setup_single_table()
55 struct ath_hal_9300 *ahp = AH9300(ah); in ar9300_paprd_setup_single_table()
58 u_int32_t val = OS_REG_READ(ah, AR_2040_MODE); in ar9300_paprd_setup_single_table()
74 ar9300_eeprom_t *eep = &AH9300(ah)->ah_eeprom; in ar9300_paprd_setup_single_table()
78 ar9300_set_target_power_from_eeprom(ah, ichan->channel, target_power_val_t2); in ar9300_paprd_setup_single_table()
105 … if (AR_SREV_HORNET(ah) || AR_SREV_WASP(ah) || AR_SREV_JUPITER(ah) || AR_SREV_APHRODITE(ah)) { in ar9300_paprd_setup_single_table()
113 } else if (AR_SREV_POSEIDON(ah)) { in ar9300_paprd_setup_single_table()
117 OS_REG_READ_FIELD_ALT(ah, AR_PHY_POWERTX_RATE5, in ar9300_paprd_setup_single_table()
122 HALDEBUG(ah, HAL_DEBUG_CALIBRATE, in ar9300_paprd_setup_single_table()
[all …]
H A Dar9300_interrupts.c33 ar9300_is_interrupt_pending(struct ath_hal *ah) in ar9300_is_interrupt_pending() argument
42 host_isr = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_CAUSE)); in ar9300_is_interrupt_pending()
47 host_isr = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_CAUSE)); in ar9300_is_interrupt_pending()
48 if (AR_SREV_POSEIDON(ah)) { in ar9300_is_interrupt_pending()
51 else if (AR_SREV_WASP(ah)) { in ar9300_is_interrupt_pending()
82 struct ath_hal *ah, in ar9300_get_pending_interrupts() argument
88 struct ath_hal_9300 *ahp = AH9300(ah); in ar9300_get_pending_interrupts()
96 HAL_CAPABILITIES *p_cap = &AH_PRIVATE(ah)->ah_caps; in ar9300_get_pending_interrupts()
103 OS_REG_WRITE(ah, AR_ISR, AR_ISR_HP_RXOK); in ar9300_get_pending_interrupts()
107 OS_REG_WRITE(ah, AR_ISR, in ar9300_get_pending_interrupts()
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_attach.c33 static void ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
35 static void ar5416DisablePCIE(struct ath_hal *ah);
36 static void ar5416WriteIni(struct ath_hal *ah,
38 static void ar5416SpurMitigate(struct ath_hal *ah,
42 ar5416AniSetup(struct ath_hal *ah) in ar5416AniSetup() argument
63 AH5416(ah)->ah_ani_function &= ~(1 << HAL_ANI_NOISE_IMMUNITY_LEVEL); in ar5416AniSetup()
64 ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE); in ar5416AniSetup()
71 ar5416olcInit(struct ath_hal *ah) in ar5416olcInit() argument
76 ar5416olcTempCompensation(struct ath_hal *ah) in ar5416olcTempCompensation() argument
88 struct ath_hal *ah; in ar5416InitState() local
[all …]
H A Dar5416_reset.c42 static void ar5416InitDMA(struct ath_hal *ah);
43 static void ar5416InitBB(struct ath_hal *ah, const struct ieee80211_channel *);
44 static void ar5416InitIMR(struct ath_hal *ah, HAL_OPMODE opmode);
45 static void ar5416InitQoS(struct ath_hal *ah);
46 static void ar5416InitUserSettings(struct ath_hal *ah);
47 static void ar5416OverrideIni(struct ath_hal *ah, const struct ieee80211_channel *);
54 static HAL_BOOL ar5416SetResetPowerOn(struct ath_hal *ah);
55 static HAL_BOOL ar5416SetReset(struct ath_hal *ah, int type);
56 static HAL_BOOL ar5416SetPowerPerRateTable(struct ath_hal *ah,
62 static void ar5416Set11nRegs(struct ath_hal *ah, const struct ieee80211_channel *chan);
[all …]
H A Dar5416_ani.c63 #define ANI_ENA(ah) \ argument
64 (AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA)
65 #define ANI_ENA_RSSI(ah) \ argument
66 (AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA)
71 enableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params) in enableAniMIBCounters() argument
73 struct ath_hal_5212 *ahp = AH5212(ah); in enableAniMIBCounters()
75 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: Enable mib counters: " in enableAniMIBCounters()
79 OS_REG_WRITE(ah, AR_FILTOFDM, 0); in enableAniMIBCounters()
80 OS_REG_WRITE(ah, AR_FILTCCK, 0); in enableAniMIBCounters()
82 OS_REG_WRITE(ah, AR_PHYCNT1, params->ofdmPhyErrBase); in enableAniMIBCounters()
[all …]
/freebsd/sys/dev/ath/ath_hal/ar9002/
H A Dar9285_cal.c49 ar9285_hw_pa_cal(struct ath_hal *ah, HAL_BOOL is_reset) in ar9285_hw_pa_cal() argument
65 if (ath_hal_eepromGet(ah, AR_EEP_TXGAIN_TYPE, AH_NULL) == in ar9285_hw_pa_cal()
69 HALDEBUG(ah, HAL_DEBUG_PERCAL, "Running PA Calibration\n"); in ar9285_hw_pa_cal()
72 regList[i][1] = OS_REG_READ(ah, regList[i][0]); in ar9285_hw_pa_cal()
74 regVal = OS_REG_READ(ah, 0x7834); in ar9285_hw_pa_cal()
76 OS_REG_WRITE(ah, 0x7834, regVal); in ar9285_hw_pa_cal()
77 regVal = OS_REG_READ(ah, 0x9808); in ar9285_hw_pa_cal()
79 OS_REG_WRITE(ah, 0x9808, regVal); in ar9285_hw_pa_cal()
81 OS_REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1); in ar9285_hw_pa_cal()
82 OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1); in ar9285_hw_pa_cal()
[all …]
H A Dar9285_attach.c69 static void ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
71 static void ar9285DisablePCIE(struct ath_hal *ah);
72 static HAL_BOOL ar9285FillCapabilityInfo(struct ath_hal *ah);
73 static void ar9285WriteIni(struct ath_hal *ah,
77 ar9285AniSetup(struct ath_hal *ah) in ar9285AniSetup() argument
103 AH5416(ah)->ah_ani_function &= ~(1 << HAL_ANI_NOISE_IMMUNITY_LEVEL); in ar9285AniSetup()
105 ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE); in ar9285AniSetup()
116 ar9285_eeprom_print_diversity_settings(struct ath_hal *ah) in ar9285_eeprom_print_diversity_settings() argument
118 const HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom; in ar9285_eeprom_print_diversity_settings()
121 ath_hal_printf(ah, "[ath] AR9285 Main LNA config: %s\n", in ar9285_eeprom_print_diversity_settings()
[all …]
H A Dar9287_attach.c68 static void ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
70 static void ar9287DisablePCIE(struct ath_hal *ah);
71 static HAL_BOOL ar9287FillCapabilityInfo(struct ath_hal *ah);
72 static void ar9287WriteIni(struct ath_hal *ah,
76 ar9287AniSetup(struct ath_hal *ah) in ar9287AniSetup() argument
102 AH5416(ah)->ah_ani_function &= ~ HAL_ANI_NOISE_IMMUNITY_LEVEL; in ar9287AniSetup()
105 ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE); in ar9287AniSetup()
119 struct ath_hal *ah; in ar9287Attach() local
137 ah = &ahp->ah_priv.h; in ar9287Attach()
139 ar5416InitState(AH5416(ah), devid, sc, st, sh, status); in ar9287Attach()
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210_reset.c70 ar5210Reset(struct ath_hal *ah, HAL_OPMODE opmode, in ar5210Reset() argument
77 struct ath_hal_5210 *ahp = AH5210(ah); in ar5210Reset()
78 const HAL_EEPROM_v1 *ee = AH_PRIVATE(ah)->ah_eeprom; in ar5210Reset()
84 HALDEBUG(ah, HAL_DEBUG_RESET, in ar5210Reset()
91 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: channel not 5GHz\n", __func__); in ar5210Reset()
97 ichan = ath_hal_checkchannel(ah, chan); in ar5210Reset()
99 HALDEBUG(ah, HAL_DEBUG_ANY, in ar5210Reset()
111 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid operating mode %u\n", in ar5210Reset()
117 ledstate = OS_REG_READ(ah, AR_PCICFG) & in ar5210Reset()
120 if (!ar5210ChipReset(ah, chan)) { in ar5210Reset()
[all …]
H A Dar5210_misc.c34 ar5210GetMacAddress(struct ath_hal *ah, uint8_t *mac) in ar5210GetMacAddress() argument
36 struct ath_hal_5210 *ahp = AH5210(ah); in ar5210GetMacAddress()
42 ar5210SetMacAddress(struct ath_hal *ah, const uint8_t *mac) in ar5210SetMacAddress() argument
44 struct ath_hal_5210 *ahp = AH5210(ah); in ar5210SetMacAddress()
51 ar5210GetBssIdMask(struct ath_hal *ah, uint8_t *mask) in ar5210GetBssIdMask() argument
59 ar5210SetBssIdMask(struct ath_hal *ah, const uint8_t *mask) in ar5210SetBssIdMask() argument
68 ar5210EepromRead(struct ath_hal *ah, u_int off, uint16_t *data) in ar5210EepromRead() argument
70 (void) OS_REG_READ(ah, AR_EP_AIR(off)); /* activate read op */ in ar5210EepromRead()
71 if (!ath_hal_wait(ah, AR_EP_STA, in ar5210EepromRead()
73 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: read failed for entry 0x%x\n", in ar5210EepromRead()
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_misc.c36 ar5212GetMacAddress(struct ath_hal *ah, uint8_t *mac) in ar5212GetMacAddress() argument
38 struct ath_hal_5212 *ahp = AH5212(ah); in ar5212GetMacAddress()
44 ar5212SetMacAddress(struct ath_hal *ah, const uint8_t *mac) in ar5212SetMacAddress() argument
46 struct ath_hal_5212 *ahp = AH5212(ah); in ar5212SetMacAddress()
53 ar5212GetBssIdMask(struct ath_hal *ah, uint8_t *mask) in ar5212GetBssIdMask() argument
55 struct ath_hal_5212 *ahp = AH5212(ah); in ar5212GetBssIdMask()
61 ar5212SetBssIdMask(struct ath_hal *ah, const uint8_t *mask) in ar5212SetBssIdMask() argument
63 struct ath_hal_5212 *ahp = AH5212(ah); in ar5212SetBssIdMask()
68 OS_REG_WRITE(ah, AR_BSSMSKL, LE_READ_4(ahp->ah_bssidmask)); in ar5212SetBssIdMask()
69 OS_REG_WRITE(ah, AR_BSSMSKU, LE_READ_2(ahp->ah_bssidmask + 4)); in ar5212SetBssIdMask()
[all …]
H A Dar5212_ani.c59 #define ANI_ENA(ah) \ argument
60 (AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA)
61 #define ANI_ENA_RSSI(ah) \ argument
62 (AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA)
67 enableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params) in enableAniMIBCounters() argument
69 struct ath_hal_5212 *ahp = AH5212(ah); in enableAniMIBCounters()
71 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: Enable mib counters: " in enableAniMIBCounters()
75 OS_REG_WRITE(ah, AR_FILTOFDM, 0); in enableAniMIBCounters()
76 OS_REG_WRITE(ah, AR_FILTCCK, 0); in enableAniMIBCounters()
78 OS_REG_WRITE(ah, AR_PHYCNT1, params->ofdmPhyErrBase); in enableAniMIBCounters()
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_misc.c34 ar5211GetMacAddress(struct ath_hal *ah, uint8_t *mac) in ar5211GetMacAddress() argument
36 struct ath_hal_5211 *ahp = AH5211(ah); in ar5211GetMacAddress()
42 ar5211SetMacAddress(struct ath_hal *ah, const uint8_t *mac) in ar5211SetMacAddress() argument
44 struct ath_hal_5211 *ahp = AH5211(ah); in ar5211SetMacAddress()
51 ar5211GetBssIdMask(struct ath_hal *ah, uint8_t *mask) in ar5211GetBssIdMask() argument
59 ar5211SetBssIdMask(struct ath_hal *ah, const uint8_t *mask) in ar5211SetBssIdMask() argument
68 ar5211EepromRead(struct ath_hal *ah, u_int off, uint16_t *data) in ar5211EepromRead() argument
70 OS_REG_WRITE(ah, AR_EEPROM_ADDR, off); in ar5211EepromRead()
71 OS_REG_WRITE(ah, AR_EEPROM_CMD, AR_EEPROM_CMD_READ); in ar5211EepromRead()
73 if (!ath_hal_wait(ah, AR_EEPROM_STS, in ar5211EepromRead()
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5312/
H A Dar5312_reset.c40 extern HAL_BOOL ar5212SetTransmitPower(struct ath_hal *ah,
56 write_common(struct ath_hal *ah, const HAL_INI_ARRAY *ia, in write_common() argument
71 OS_REG_WRITE(ah, reg, V(i, 1)); in write_common()
89 ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, in ar5312Reset() argument
97 struct ath_hal_5212 *ahp = AH5212(ah); in ar5312Reset()
110 HALASSERT(ah->ah_magic == AR5212_MAGIC); in ar5312Reset()
111 ee = AH_PRIVATE(ah)->ah_eeprom; in ar5312Reset()
113 OS_MARK(ah, AH_MARK_RESET, bChannelChange); in ar5312Reset()
117 ichan = ath_hal_checkchannel(ah, chan); in ar5312Reset()
119 HALDEBUG(ah, HAL_DEBUG_ANY, in ar5312Reset()
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H A Dar5312_misc.c38 ar5312SetLedState(struct ath_hal *ah, HAL_LED_STATE state) in ar5312SetLedState() argument
41 uint32_t resOffset = (AR5312_RSTIMER_BASE - ((uint32_t) ah->ah_sh)); in ar5312SetLedState()
42 if(IS_2316(ah)) return; /* not yet */ in ar5312SetLedState()
46 OS_REG_WRITE(ah, resOffset+AR5312_PCICFG, in ar5312SetLedState()
47 (OS_REG_READ(ah, AR5312_PCICFG) &~ in ar5312SetLedState()
57 ar5312DetectCardPresent(struct ath_hal *ah) in ar5312DetectCardPresent() argument
68 if(IS_5315(ah)) in ar5312DetectCardPresent()
70 v = (OS_REG_READ(ah, in ar5312DetectCardPresent()
71 (AR5315_RSTIMER_BASE-((uint32_t) ah->ah_sh)) + AR5315_WREV)) in ar5312DetectCardPresent()
75 return (AH_PRIVATE(ah)->ah_macVersion == macVersion && in ar5312DetectCardPresent()
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