Lines Matching refs:ah
68 static void ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
70 static void ar9287DisablePCIE(struct ath_hal *ah);
71 static HAL_BOOL ar9287FillCapabilityInfo(struct ath_hal *ah);
72 static void ar9287WriteIni(struct ath_hal *ah,
76 ar9287AniSetup(struct ath_hal *ah) in ar9287AniSetup() argument
102 AH5416(ah)->ah_ani_function &= ~ HAL_ANI_NOISE_IMMUNITY_LEVEL; in ar9287AniSetup()
105 ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE); in ar9287AniSetup()
119 struct ath_hal *ah; in ar9287Attach() local
137 ah = &ahp->ah_priv.h; in ar9287Attach()
139 ar5416InitState(AH5416(ah), devid, sc, st, sh, status); in ar9287Attach()
142 AH_PRIVATE(ah)->ah_eepromRead = ath_hal_EepromDataRead; in ar9287Attach()
143 AH_PRIVATE(ah)->ah_eepromWrite = NULL; in ar9287Attach()
144 ah->ah_eepromdata = eepromdata; in ar9287Attach()
149 AH5416(ah)->ah_initPLL = ar9280InitPLL; in ar9287Attach()
151 ah->ah_setAntennaSwitch = ar9287SetAntennaSwitch; in ar9287Attach()
152 ah->ah_configPCIE = ar9287ConfigPCIE; in ar9287Attach()
153 ah->ah_disablePCIE = ar9287DisablePCIE; in ar9287Attach()
155 AH5416(ah)->ah_cal.iqCalData.calData = &ar9287_iq_cal; in ar9287Attach()
156 AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9287_adc_gain_cal; in ar9287Attach()
157 AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9287_adc_dc_cal; in ar9287Attach()
158 AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9287_adc_init_dc_cal; in ar9287Attach()
160 AH5416(ah)->ah_cal.suppCals = ADC_DC_CAL | IQ_MISMATCH_CAL; in ar9287Attach()
162 AH5416(ah)->ah_spurMitigate = ar9280SpurMitigate; in ar9287Attach()
163 AH5416(ah)->ah_writeIni = ar9287WriteIni; in ar9287Attach()
165 ah->ah_setTxPower = ar9287SetTransmitPower; in ar9287Attach()
166 ah->ah_setBoardValues = ar9287SetBoardValues; in ar9287Attach()
168 AH5416(ah)->ah_olcInit = ar9287olcInit; in ar9287Attach()
169 AH5416(ah)->ah_olcTempCompensation = ar9287olcTemperatureCompensation; in ar9287Attach()
171 AH5416(ah)->ah_cal_initcal = ar9287InitCalHardware; in ar9287Attach()
172 AH5416(ah)->ah_cal_pacal = ar9287PACal; in ar9287Attach()
178 AH5416(ah)->ah_rx_chainmask = AR9287_DEFAULT_RXCHAINMASK; in ar9287Attach()
179 AH5416(ah)->ah_tx_chainmask = AR9287_DEFAULT_TXCHAINMASK; in ar9287Attach()
181 if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) { in ar9287Attach()
183 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n", in ar9287Attach()
189 if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) { in ar9287Attach()
190 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n", in ar9287Attach()
196 val = OS_REG_READ(ah, AR_SREV); in ar9287Attach()
197 HALDEBUG(ah, HAL_DEBUG_ATTACH, in ar9287Attach()
202 AH_PRIVATE(ah)->ah_macVersion = in ar9287Attach()
204 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION); in ar9287Attach()
205 AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0; in ar9287Attach()
208 if (! AR_SREV_KIWI_12_OR_LATER(ah)) { in ar9287Attach()
209 ath_hal_printf(ah, "[ath]: Kiwi < 1.2 is not supported\n"); in ar9287Attach()
219 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, in ar9287Attach()
226 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, in ar9287Attach()
236 ar5416AttachPCIE(ah); in ar9287Attach()
238 ecode = ath_hal_9287EepromAttach(ah); in ar9287Attach()
242 if (!ar5416ChipReset(ah, AH_NULL, HAL_RESET_NORMAL)) { /* reset chip */ in ar9287Attach()
243 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); in ar9287Attach()
248 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); in ar9287Attach()
250 if (!ar5212ChipTest(ah)) { in ar9287Attach()
251 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", in ar9287Attach()
261 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9287Attach()
264 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah); in ar9287Attach()
265 switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) { in ar9287Attach()
270 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) { in ar9287Attach()
271 AH_PRIVATE(ah)->ah_analog5GhzRev = in ar9287Attach()
276 HALDEBUG(ah, HAL_DEBUG_ANY, in ar9287Attach()
279 AH_PRIVATE(ah)->ah_analog5GhzRev); in ar9287Attach()
284 rfStatus = ar9287RfAttach(ah, &ecode); in ar9287Attach()
286 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n", in ar9287Attach()
295 if (! ath_hal_eepromGetFlag(ah, AR_EEP_OL_PWRCTRL)) { in ar9287Attach()
296 ath_hal_printf(ah, "[ath] AR9287 w/ closed-loop TX power control" in ar9287Attach()
306 (void) ath_hal_eepromGet(ah, AR_EEP_PWR_TABLE_OFFSET, &pwr_table_offset); in ar9287Attach()
308 …ath_hal_printf(ah, "[ath]: default pwr offset: %d dBm != EEPROM pwr offset: %d dBm; curves will be… in ar9287Attach()
320 if (!ar9287FillCapabilityInfo(ah)) { in ar9287Attach()
325 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); in ar9287Attach()
327 HALDEBUG(ah, HAL_DEBUG_ANY, in ar9287Attach()
333 AH_PRIVATE(ah)->ah_currentRD = in ar9287Attach()
334 ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL); in ar9287Attach()
335 AH_PRIVATE(ah)->ah_currentRDext = AR9287_RDEXT_DEFAULT; in ar9287Attach()
344 OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); in ar9287Attach()
346 ar9287AniSetup(ah); /* Anti Noise Immunity */ in ar9287Attach()
349 AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9287_2GHZ; in ar9287Attach()
350 AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9287_2GHZ; in ar9287Attach()
351 AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9287_2GHZ; in ar9287Attach()
352 AH5416(ah)->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9287_5GHZ; in ar9287Attach()
353 AH5416(ah)->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_9287_5GHZ; in ar9287Attach()
354 AH5416(ah)->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_9287_5GHZ; in ar9287Attach()
356 ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist); in ar9287Attach()
358 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); in ar9287Attach()
360 return ah; in ar9287Attach()
362 if (ah != AH_NULL) in ar9287Attach()
363 ah->ah_detach(ah); in ar9287Attach()
370 ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off) in ar9287ConfigPCIE() argument
372 if (AH_PRIVATE(ah)->ah_ispcie && !restore) { in ar9287ConfigPCIE()
373 ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0); in ar9287ConfigPCIE()
375 OS_REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); in ar9287ConfigPCIE()
377 OS_REG_WRITE(ah, AR_WA, AR9285_WA_DEFAULT); in ar9287ConfigPCIE()
382 ar9287DisablePCIE(struct ath_hal *ah) in ar9287DisablePCIE() argument
388 ar9287WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan) in ar9287WriteIni() argument
413 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9287WriteIni()
414 OS_REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC); in ar9287WriteIni()
416 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes, modesIndex, regWrites); in ar9287WriteIni()
417 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_rxgain, modesIndex, regWrites); in ar9287WriteIni()
418 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_txgain, modesIndex, regWrites); in ar9287WriteIni()
419 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common, 1, regWrites); in ar9287WriteIni()
428 ar9287FillCapabilityInfo(struct ath_hal *ah) in ar9287FillCapabilityInfo() argument
430 HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; in ar9287FillCapabilityInfo()
432 if (!ar5416FillCapabilityInfo(ah)) in ar9287FillCapabilityInfo()
477 ar9287SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings) in ar9287SetAntennaSwitch() argument