Lines Matching refs:ah
69 static void ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
71 static void ar9285DisablePCIE(struct ath_hal *ah);
72 static HAL_BOOL ar9285FillCapabilityInfo(struct ath_hal *ah);
73 static void ar9285WriteIni(struct ath_hal *ah,
77 ar9285AniSetup(struct ath_hal *ah) in ar9285AniSetup() argument
103 AH5416(ah)->ah_ani_function &= ~(1 << HAL_ANI_NOISE_IMMUNITY_LEVEL); in ar9285AniSetup()
105 ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE); in ar9285AniSetup()
116 ar9285_eeprom_print_diversity_settings(struct ath_hal *ah) in ar9285_eeprom_print_diversity_settings() argument
118 const HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom; in ar9285_eeprom_print_diversity_settings()
121 ath_hal_printf(ah, "[ath] AR9285 Main LNA config: %s\n", in ar9285_eeprom_print_diversity_settings()
123 ath_hal_printf(ah, "[ath] AR9285 Alt LNA config: %s\n", in ar9285_eeprom_print_diversity_settings()
125 ath_hal_printf(ah, "[ath] LNA diversity %s, Diversity %s\n", in ar9285_eeprom_print_diversity_settings()
141 struct ath_hal *ah; in ar9285Attach() local
158 ah = &ahp->ah_priv.h; in ar9285Attach()
160 ar5416InitState(AH5416(ah), devid, sc, st, sh, status); in ar9285Attach()
169 AH_PRIVATE(ah)->ah_eepromRead = ath_hal_EepromDataRead; in ar9285Attach()
170 AH_PRIVATE(ah)->ah_eepromWrite = NULL; in ar9285Attach()
171 ah->ah_eepromdata = eepromdata; in ar9285Attach()
175 AH5416(ah)->ah_initPLL = ar9280InitPLL; in ar9285Attach()
176 AH5416(ah)->ah_btCoexSetDiversity = ar9285BTCoexAntennaDiversity; in ar9285Attach()
178 ah->ah_setAntennaSwitch = ar9285SetAntennaSwitch; in ar9285Attach()
179 ah->ah_configPCIE = ar9285ConfigPCIE; in ar9285Attach()
180 ah->ah_disablePCIE = ar9285DisablePCIE; in ar9285Attach()
181 ah->ah_setTxPower = ar9285SetTransmitPower; in ar9285Attach()
182 ah->ah_setBoardValues = ar9285SetBoardValues; in ar9285Attach()
183 ah->ah_btCoexSetParameter = ar9285BTCoexSetParameter; in ar9285Attach()
184 ah->ah_divLnaConfGet = ar9285_antdiv_comb_conf_get; in ar9285Attach()
185 ah->ah_divLnaConfSet = ar9285_antdiv_comb_conf_set; in ar9285Attach()
187 AH5416(ah)->ah_cal.iqCalData.calData = &ar9280_iq_cal; in ar9285Attach()
188 AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9280_adc_gain_cal; in ar9285Attach()
189 AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9280_adc_dc_cal; in ar9285Attach()
190 AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9280_adc_init_dc_cal; in ar9285Attach()
191 AH5416(ah)->ah_cal.suppCals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL; in ar9285Attach()
193 AH5416(ah)->ah_spurMitigate = ar9280SpurMitigate; in ar9285Attach()
194 AH5416(ah)->ah_writeIni = ar9285WriteIni; in ar9285Attach()
195 AH5416(ah)->ah_rx_chainmask = AR9285_DEFAULT_RXCHAINMASK; in ar9285Attach()
196 AH5416(ah)->ah_tx_chainmask = AR9285_DEFAULT_TXCHAINMASK; in ar9285Attach()
200 if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) { in ar9285Attach()
202 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n", in ar9285Attach()
208 if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) { in ar9285Attach()
209 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n", in ar9285Attach()
215 val = OS_REG_READ(ah, AR_SREV); in ar9285Attach()
216 HALDEBUG(ah, HAL_DEBUG_ATTACH, in ar9285Attach()
221 AH_PRIVATE(ah)->ah_macVersion = in ar9285Attach()
223 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION); in ar9285Attach()
224 AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0; in ar9285Attach()
227 if (AR_SREV_KITE_12_OR_LATER(ah)) { in ar9285Attach()
230 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, in ar9285Attach()
235 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, in ar9285Attach()
238 ar5416AttachPCIE(ah); in ar9285Attach()
241 if (AR_SREV_KITE_12_OR_LATER(ah)) in ar9285Attach()
242 AH5416(ah)->ah_cal_initcal = ar9285InitCalHardware; in ar9285Attach()
243 if (AR_SREV_KITE_11_OR_LATER(ah)) in ar9285Attach()
244 AH5416(ah)->ah_cal_pacal = ar9002_hw_pa_cal; in ar9285Attach()
246 ecode = ath_hal_v4kEepromAttach(ah); in ar9285Attach()
250 if (!ar5416ChipReset(ah, AH_NULL, HAL_RESET_NORMAL)) { /* reset chip */ in ar9285Attach()
251 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", in ar9285Attach()
257 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); in ar9285Attach()
259 if (!ar5212ChipTest(ah)) { in ar9285Attach()
260 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", in ar9285Attach()
270 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9285Attach()
273 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah); in ar9285Attach()
274 switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) { in ar9285Attach()
279 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) { in ar9285Attach()
280 AH_PRIVATE(ah)->ah_analog5GhzRev = in ar9285Attach()
285 HALDEBUG(ah, HAL_DEBUG_ANY, in ar9285Attach()
288 AH_PRIVATE(ah)->ah_analog5GhzRev); in ar9285Attach()
293 rfStatus = ar9285RfAttach(ah, &ecode); in ar9285Attach()
295 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n", in ar9285Attach()
303 if (AR_SREV_9285E_20(ah)) in ar9285Attach()
304 ath_hal_printf(ah, "[ath] AR9285E_20 detected; using XE TX gain tables\n"); in ar9285Attach()
307 switch (ath_hal_eepromGet(ah, AR_EEP_TXGAIN_TYPE, AH_NULL)) { in ar9285Attach()
309 if (AR_SREV_9285E_20(ah)) in ar9285Attach()
317 if (AR_SREV_9285E_20(ah)) in ar9285Attach()
332 if (!ar9285FillCapabilityInfo(ah)) { in ar9285Attach()
342 ar9285_eeprom_print_diversity_settings(ah); in ar9285Attach()
345 if (ar9285_check_div_comb(ah)) { in ar9285Attach()
346 ath_hal_printf(ah, "[ath] Enabling diversity for Kite\n"); in ar9285Attach()
351 AH_PRIVATE(ah)->ah_caps.halHTSupport = AH_FALSE; in ar9285Attach()
353 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); in ar9285Attach()
355 HALDEBUG(ah, HAL_DEBUG_ANY, in ar9285Attach()
361 AH_PRIVATE(ah)->ah_currentRD = in ar9285Attach()
362 ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL); in ar9285Attach()
367 AH_PRIVATE(ah)->ah_currentRDext = AR9285_RDEXT_DEFAULT; in ar9285Attach()
376 OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); in ar9285Attach()
378 ar9285AniSetup(ah); /* Anti Noise Immunity */ in ar9285Attach()
381 AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9285_2GHZ; in ar9285Attach()
382 AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9285_2GHZ; in ar9285Attach()
383 AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9285_2GHZ; in ar9285Attach()
386 ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist); in ar9285Attach()
388 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); in ar9285Attach()
390 return ah; in ar9285Attach()
392 if (ah != AH_NULL) in ar9285Attach()
393 ah->ah_detach(ah); in ar9285Attach()
400 ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off) in ar9285ConfigPCIE() argument
413 if (AR_SREV_9285E_20(ah)) { in ar9285ConfigPCIE()
414 val = AH_PRIVATE(ah)->ah_config.ath_hal_war70c; in ar9285ConfigPCIE()
418 OS_REG_WRITE(ah, 0x570c, val); in ar9285ConfigPCIE()
423 if (AH_PRIVATE(ah)->ah_ispcie && !restore) { in ar9285ConfigPCIE()
424 ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0); in ar9285ConfigPCIE()
438 OS_REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); in ar9285ConfigPCIE()
440 val = OS_REG_READ(ah, AR_WA); in ar9285ConfigPCIE()
459 if (AR_SREV_9285E_20(ah)) in ar9285ConfigPCIE()
462 OS_REG_WRITE(ah, AR_WA, val); in ar9285ConfigPCIE()
473 if (AR_SREV_9285E_20(ah)) in ar9285ConfigPCIE()
476 OS_REG_WRITE(ah, AR_WA, val); in ar9285ConfigPCIE()
479 OS_REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); in ar9285ConfigPCIE()
484 ar9285DisablePCIE(struct ath_hal *ah) in ar9285DisablePCIE() argument
489 ar9285WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan) in ar9285WriteIni() argument
505 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9285WriteIni()
506 OS_REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC); in ar9285WriteIni()
507 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes, in ar9285WriteIni()
509 if (AR_SREV_KITE_12_OR_LATER(ah)) { in ar9285WriteIni()
510 regWrites = ath_hal_ini_write(ah, &AH9285(ah)->ah_ini_txgain, in ar9285WriteIni()
513 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common, in ar9285WriteIni()
523 ar9285FillCapabilityInfo(struct ath_hal *ah) in ar9285FillCapabilityInfo() argument
525 HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; in ar9285FillCapabilityInfo()
527 if (!ar5416FillCapabilityInfo(ah)) in ar9285FillCapabilityInfo()
539 if (ar9285_check_div_comb(ah)) in ar9285FillCapabilityInfo()
561 if (AR_SREV_KITE_12_OR_LATER(ah)) in ar9285FillCapabilityInfo()