| /linux/drivers/clk/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 6 The <linux/clk.h> calls support software clock gating and 14 select HAVE_CLK 16 Select this option when the clock API in <linux/clk.h> is implemented 18 code should select COMMON_CLK instead and not define a custom 22 bool "Common Clock Framework" 24 select HAVE_CLK_PREPARE 25 select HAVE_CLK 26 select RATIONAL 28 The common clock framework is a single definition of struct [all …]
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| /linux/drivers/rtc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 11 select RTC_LIB 14 bool "Real Time Clock" 17 select RTC_LIB 29 If you say yes here, the system time (wall clock) will be set using 39 clock, usually rtc0. Initialization is done when the system 44 This clock should be battery-backed, so that it reads the correct 45 time when the system boots from a power-off state. Otherwise, your 46 system will need an external clock source (like an NTP server). 48 If the clock you specify here is not battery backed, it may still [all …]
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| /linux/Documentation/arch/m68k/ |
| H A D | buddha-driver.rst | 8 ------------------------------------------------------------------------ 11 Buddha-part of the Catweasel Zorro-II version 21 product number: 0 (42 for Catweasel Z-II) 23 Rom-vector: $1000 25 The card should be a Z-II board, size 64K, not for freemem 26 list, Rom-Vektor is valid, no second Autoconfig-board on the 30 as the Amiga Kickstart does: The lower nibble of the 8-Bit 36 otherwise your chance is only 1:16 to find the board :-). 38 The local memory-map is even active when mapped to $e8: 41 $0-$7e Autokonfig-space, see Z-II docs. [all …]
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | ti-aemif.txt | 4 provide a glue-less interface to a variety of asynchronous memory devices like 6 can be accessed at any given time via four chip selects with 64M byte access 7 per chip select. Synchronous memories such as DDR1 SD RAM, SDR SDRAM 11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf 12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf 13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf 17 - compatible: "ti,davinci-aemif" 18 "ti,keystone-aemif" 19 "ti,da850-aemif" 21 - reg: contains offset/length value for AEMIF control registers [all …]
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| H A D | arm,pl35x-smc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl35x-smc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <miquel.raynal@bootlin.com> 13 The PL35x Static Memory Controller is a bus where you can connect two kinds 18 https://documentation-service.arm.com/static/5e8e2524fd977155116a58aa 20 # We need a select here so we don't match all nodes with 'arm,primecell' 21 select: 26 - arm,pl353-smc-r2p1 [all …]
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| /linux/drivers/clk/baikal-t1/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 bool "Baikal-T1 Clocks Control Unit interface" 7 Clocks Control Unit is the core of Baikal-T1 SoC System Controller 9 consists of multiple global clock domains, which can be reset by 12 configurable and fixed clock dividers. Enable this option to be able 13 to select Baikal-T1 CCU PLLs and Dividers drivers. 18 bool "Baikal-T1 CCU PLLs support" 19 select MFD_SYSCON 22 Enable this to support the PLLs embedded into the Baikal-T1 SoC 27 CPUs, DDR, etc.) or passed over the clock dividers to be only [all …]
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| /linux/Documentation/devicetree/bindings/bus/ |
| H A D | nvidia,tegra20-gmi.txt | 4 external memory. Can be used to attach various high speed devices such as 10 - compatible : Should contain one of the following: 11 For Tegra20 must contain "nvidia,tegra20-gmi". 12 For Tegra30 must contain "nvidia,tegra30-gmi". 13 - reg: Should contain GMI controller registers location and length. 14 - clocks: Must contain an entry for each entry in clock-names. 15 - clock-names: Must include the following entries: "gmi" 16 - resets : Must contain an entry for each entry in reset-names. 17 - reset-names : Must include the following entries: "gmi" 18 - #address-cells: The number of cells used to represent physical base [all …]
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| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | adi,ad4170-4.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/adi,ad4170-4.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Analog Devices AD4170-4 and similar Analog to Digital Converters 10 - Marcelo Schmitt <marcelo.schmitt@analog.com> 13 Analog Devices AD4170-4 series of Sigma-delta Analog to Digital Converters. 14 Specifications can be found at: 15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4170-4.pdf 16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4190-4.pdf [all …]
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| H A D | adi,ad4130.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Cosmin Tanislav <cosmin.tanislav@analog.com> 14 Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here: 15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf 20 - adi,ad4130 27 description: phandle to the master clock (mclk) 29 clock-names: 31 - const: mclk [all …]
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| /linux/Documentation/devicetree/bindings/clock/ti/ |
| H A D | dra7-atl.txt | 1 Device Tree Clock bindings for ATL (Audio Tracking Logic) of DRA7 SoC. 3 The ATL IP is used to generate clock to be used to synchronize baseband and 4 audio codec. A single ATL IP provides four ATL clock instances sharing the same 5 functional clock but can be configured to provide different clocks. 6 ATL can maintain a clock averages to some desired frequency based on the bws/aws 7 signals - can compensate the drift between the two ws signal. 9 In order to provide the support for ATL and its output clocks (which can be used 12 Clock tree binding: 13 This binding uses the common clock binding[1]. 14 To be able to integrate the ATL clocks with DT clock tree. [all …]
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| /linux/drivers/devfreq/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 4 select PM_OPP 7 devfreq, a generic DVFS framework can be registered for a device 11 Each device may have its own governor and policy. Devfreq can 16 However, because the clock frequencies of a single device are 19 clock frequency of the device, which is also attached 20 to a device by 1-to-1. The device registering devfreq takes the 22 to set its every clock accordingly with the "target" callback 39 Simple-Ondemand should be able to provide busy/total counter 81 select DEVFREQ_GOV_SIMPLE_ONDEMAND [all …]
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| /linux/arch/sh/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_CPU_CACHE_ALIASING 6 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) 7 select ARCH_HAS_BINFMT_FLAT if !MMU 8 select ARCH_HAS_CPU_FINALIZE_INIT 9 select ARCH_HAS_CURRENT_STACK_POINTER 10 select ARCH_HAS_GIGANTIC_PAGE 11 select ARCH_HAS_GCOV_PROFILE_ALL 12 select ARCH_HAS_PTE_SPECIAL [all …]
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| /linux/drivers/virtio/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 7 select VIRTIO_ANCHOR 53 select VIRTIO_PCI_LIB 54 select VIRTIO 72 select VIRTIO_PCI_LIB_LEGACY 78 If disabled, you get a slightly smaller, non-transitional driver, 82 so, you can happily disable this option and virtio will not 91 select VIRTIO 106 This driver provides access to virtio-pmem devices, storage devices 107 that are mapped into the physical address space - similar to NVDIMMs [all …]
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| /linux/kernel/time/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 24 # The generic clock events infrastructure 28 # Architecture can handle broadcast in a driver-agnostic way 43 # clock event device 47 # Generic update of CMOS clock 51 # Select to handle posix CPU timers from task_work 81 select CONTEXT_TRACKING 96 select TICK_ONESHOT 110 select NO_HZ_COMMON 113 will only trigger on an as-needed basis when the system is idle. [all …]
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| /linux/Documentation/devicetree/bindings/net/can/ |
| H A D | renesas,rcar-can.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/can/renesas,rcar-can.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car CAN Controller 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 15 - items: 16 - enum: 17 - renesas,can-r8a7778 # R-Car M1-A 18 - renesas,can-r8a7779 # R-Car H1 [all …]
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| /linux/sound/hda/codecs/hdmi/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 4 tristate "HD-audio HDMI codec support" 6 Say Y or M here to include HD-audio HDMI/DislayPort codec support. 8 This will enable all HDMI/DP codec drivers as default, but you can 15 tristate "Generic HDMI/DisplayPort HD-audio codec support" if EXPERT 16 select SND_DYNAMIC_MINORS 17 select SND_PCM_ELD 20 Say Y or M here to include Generic HDMI and DisplayPort HD-audio 24 to assure the multiple streams for DP-MST support. 27 tristate "Simple HDMI/DisplayPort HD-audio codec support" if EXPERT [all …]
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | brcm,bcm63xx-hsspi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - William Zhang <william.zhang@broadcom.com> 11 - Kursad Oney <kursad.oney@broadcom.com> 12 - Jonas Gorski <jonas.gorski@gmail.com> 19 brcm,bcm6328-hsspi compatible string. The recent ARM based chip is required to 20 use the brcm,bcmbca-hsspi-v1.0 as part of its compatible string list as 23 This rev 1.0 controller has a limitation that can not keep the chip select line [all …]
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| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | arm,sp804.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Haojian Zhuang <haojian.zhuang@linaro.org> 14 16 or 32 bit operation and capable of running in one-shot, periodic, or 15 free-running mode. The input clock is shared, but can be gated and prescaled 18 There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon 21 # Need a custom select here or 'arm,primecell' will match on lots of nodes 22 select: 27 - arm,sp804 [all …]
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| /linux/drivers/net/ethernet/intel/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 25 select MII 30 in the format 123456-001 (six digits hyphen three digits). 33 can be located at: 51 to the Adapter & Driver ID Guide that can be located at: 62 tristate "Intel(R) PRO/1000 PCI-Express Gigabit Ethernet support" 65 select CRC32 67 This driver supports the PCI-Express Intel(R) PRO/1000 gigabit 68 ethernet family of adapters. For PCI or PCI-X e1000 adapters, 71 can be located at: [all …]
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| /linux/drivers/misc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 27 See Documentation/misc-devices/ad525x_dpot.rst for the 30 This driver can also be built as a module. If so, the module 40 module will be called ad525x_dpot-i2c. 51 module will be called ad525x_dpot-spi. 65 This option enables device driver support for in-band access to the 78 website <https://www-03.ibm.com/systems/info/x86servers/serverproven/compat/us/> 112 UFS. Provides interface for in-kernel security controllers to access 115 If unsure, select N. 120 select GPIOLIB [all …]
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| /linux/arch/arm/mach-at91/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 9 select ARM_CPU_SUSPEND if PM && ARCH_MULTI_V7 10 select COMMON_CLK_AT91 11 select GPIOLIB 12 select PINCTRL 13 select SOC_BUS 14 select ARCH_MICROCHIP 18 bool "SAM Cortex-M7 family" if ARM_SINGLE_ARMV7M 19 select COMMON_CLK_AT91 20 select PINCTRL_AT91 [all …]
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| /linux/drivers/gpu/drm/omapdrm/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 7 select DRM_CLIENT_SELECTION 8 select DRM_KMS_HELPER 9 select DRM_DISPLAY_HELPER 10 select DRM_BRIDGE_CONNECTOR 11 select FB_DMAMEM_HELPERS_DEFERRED if DRM_FBDEV_EMULATION 12 select VIDEOMODE_HELPERS 13 select HDMI 25 can also be enabled by setting CONFIG_DYNAMIC_DEBUG and then setting 34 querying about clock configuration and register configuration of dss, [all …]
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| /linux/arch/x86/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 2 # Select 32 or 64 bit 4 bool "64-bit kernel" if "$(ARCH)" = "x86" 7 Say yes to build a 64-bit kernel - formerly known as x86_64 8 Say no to build a 32-bit kernel - formerly known as i386 13 # Options that are inherently 32-bit kernel only: 14 select ARCH_WANT_IPC_PARSE_VERSION 15 select CLKSRC_I8253 16 select CLONE_BACKWARDS 17 select HAVE_DEBUG_STACKOVERFLOW [all …]
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| /linux/drivers/clk/sunxi/ |
| H A D | clk-a20-gmac.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 * Copyright 2013 Chen-Yu Tsai 7 * Chen-Yu Tsai <wens@csie.org> 10 #include <linux/clk-provider.h> 24 0x00, /* Select mii_phy_tx_clk */ 25 0x02, /* Select gmac_int_tx_clk */ 29 * sun7i_a20_gmac_clk_setup - Setup function for A20/A31 GMAC clock module 30 * @node: &struct device_node for the clock 32 * This clock looks something like this 34 * MII TX clock from PHY >-----|___________ _________|----> to GMAC core [all …]
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| /linux/drivers/phy/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 15 API by which phy drivers can create PHY using the phy framework and 16 phy users can obtain reference to the PHY. All the users of this 17 framework should select this config. 21 select GENERIC_PHY 23 Generic MIPI D-PHY support. 25 Provides a number of helpers a core functions for MIPI D-PHY 32 select GENERIC_PHY 37 care of enabling and clock setup. 42 select GENERIC_PHY [all …]
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