Lines Matching +full:can +full:- +full:clock +full:- +full:select
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Stefan Popa <stefan.popa@analog.com>
14 Bindings for the Analog Devices AD7124 ADC device. Datasheet can be
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf
21 - adi,ad7124-4
22 - adi,ad7124-8
25 description: SPI chip select number for the device
30 description: phandle to the master clock (mclk)
32 clock-names:
34 - const: mclk
40 '#address-cells':
43 '#size-cells':
46 refin1-supply:
47 description: refin1 supply can be used as reference for conversion.
49 refin2-supply:
50 description: refin2 supply can be used as reference for conversion.
52 avdd-supply:
53 description: avdd supply can be used as reference for conversion.
56 - compatible
57 - reg
58 - clocks
59 - clock-names
60 - interrupts
63 "^channel@([0-9]|1[0-5])$":
72 The channel number. It can have up to 8 channels on ad7124-4
73 and 16 channels on ad7124-8, numbered from 0 to 15.
78 adi,reference-select:
80 Select the reference source to use when converting on
89 diff-channels: true
93 adi,buffered-positive:
97 adi,buffered-negative:
102 - reg
103 - diff-channels
108 - $ref: /schemas/spi/spi-peripheral-props.yaml#
113 - |
115 #address-cells = <1>;
116 #size-cells = <0>;
119 compatible = "adi,ad7124-4";
121 spi-max-frequency = <5000000>;
123 interrupt-parent = <&gpio>;
124 refin1-supply = <&adc_vref>;
126 clock-names = "mclk";
128 #address-cells = <1>;
129 #size-cells = <0>;
133 diff-channels = <0 1>;
134 adi,reference-select = <0>;
135 adi,buffered-positive;
141 diff-channels = <2 3>;
142 adi,reference-select = <0>;
143 adi,buffered-positive;
144 adi,buffered-negative;
149 diff-channels = <4 5>;
154 diff-channels = <6 7>;