Lines Matching +full:can +full:- +full:clock +full:- +full:select
1 # SPDX-License-Identifier: GPL-2.0
6 The <linux/clk.h> calls support software clock gating and
14 select HAVE_CLK
16 Select this option when the clock API in <linux/clk.h> is implemented
18 code should select COMMON_CLK instead and not define a custom
22 bool "Common Clock Framework"
24 select HAVE_CLK_PREPARE
25 select HAVE_CLK
26 select RATIONAL
28 The common clock framework is a single definition of struct
30 implementation of the clock API in include/linux/clk.h.
31 Architectures utilizing the common struct clk should select
37 tristate "Clock driver for WM831x/2x PMICs"
54 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
56 select REGMAP_SPI
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
62 tristate "Clock driver for Apple SoC NCOs"
70 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
74 clock.
77 tristate "Maxim 9485 Programmable Clock Generator"
80 This driver supports Maxim 9485 Programmable Audio Clock Generator
83 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
86 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
87 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
88 Clkout1 is always on, Clkout2 can off by control register.
91 tristate "Raspberry Pi RP1-based clock support"
95 Enable common clock framework support for Raspberry Pi RP1.
96 This multi-function device has 3 main PLLs and several clock
97 generators to drive the internal sub-peripherals.
100 tristate "Clock driver for Hi655x" if EXPERT
102 select REGMAP
105 This driver supports the hi655x PMIC clock. This
106 multi-function device has one fixed-rate oscillator, clocked
110 tristate "Clock driver controlled via SCMI interface"
117 firmware providing all the clock controls.
120 tristate "Clock driver controlled via SCPI interface"
127 firmware providing all the clock controls.
130 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
132 select REGMAP_I2C
134 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
136 by the driver, in particular it only supports XTAL input. The chip can
137 be pre-programmed to support other configurations and features not yet
141 tristate "Clock driver for SiLabs 5351A/B/C"
143 select REGMAP_I2C
145 This driver supports Silicon Labs 5351A/B/C programmable clock
149 tristate "Clock driver for SiLabs 514 devices"
152 select REGMAP_I2C
154 This driver supports the Silicon Labs 514 programmable clock
158 tristate "Clock driver for SiLabs 544 devices"
160 select REGMAP_I2C
162 This driver supports the Silicon Labs 544 programmable clock
166 tristate "Clock driver for SiLabs 570 and compatible devices"
169 select REGMAP_I2C
172 clock generators.
175 bool "Clock driver for Bitmain BM1880 SoC"
182 tristate "Clock driver for TI CDCE706 clock synthesizer"
184 select REGMAP_I2C
186 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
189 tristate "Clock Driver for TI TPS68470 PMIC"
192 select REGMAP_I2C
197 tristate "Clock driver for TI CDCE913/925/937/949 devices"
200 select REGMAP_I2C
202 This driver supports the TI CDCE913/925/937/949 programmable clock
204 For example, the CDCE925 contains two PLLs with spread-spectrum
207 Y1 is derived from the input clock
214 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
216 select REGMAP_I2C
218 If you say yes here you get support for the CS2000 clock multiplier.
221 bool "Clock driver for Airoha EN7523 SoC system clocks"
230 tristate "Clock driver for Cirrus Logic ep93xx SoC"
232 select AUXILIARY_BUS
233 select REGMAP_MMIO
238 bool "Clock driver for the Mobileye EyeQ platform"
240 select AUXILIARY_BUS
245 provides read-only PLLs, derived from the main crystal clock (which
249 tristate "Clock driver for FlexSPI on Layerscape SoCs"
253 On Layerscape SoCs there is a special clock for the FlexSPI
257 bool "Clock driver for BCLK of Freescale SAI cores"
261 to be used as a generic clock output. Some SoCs have restrictions
263 two SAI interfaces can only be enabled together. If just one is
264 needed, the BCLK pin of the second one can be used as general
265 purpose clock output. Ideally, it can be used to drive an audio
269 bool "Clock driver for Cortina Systems Gemini SoC"
271 select MFD_SYSCON
272 select RESET_CONTROLLER
278 tristate "Generic Clock Controller driver for LAN966X SoC"
283 This driver provides support for Generic Clock Controller(GCK) on
284 LAN966X SoC. GCK generates and supplies clock to various peripherals
288 bool "Clock driver for Aspeed BMC SoCs"
291 select MFD_SYSCON
292 select RESET_CONTROLLER
300 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
304 clock. These multi-function devices have two (S2MPS14) or three
305 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
308 tristate "Clock driver for the TWL PMIC family"
311 Enable support for controlling the clock resources on TWL family
312 PMICs. These devices have some 32K clock outputs which can be
317 tristate "External McPDM functional clock from twl6040"
320 Enable the external functional clock support on OMAP4+ platforms for
321 McPDM. McPDM module is using the external bit clock on the McPDM bus
322 as functional clock.
329 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
333 bool "Clock driver for Freescale QorIQ platforms"
337 This adds the clock driver support for Freescale QorIQ platforms
338 using common clock framework.
341 tristate "Clock driver for LS1028A Display output"
351 bool "Clock driver for APM XGene SoC"
355 Support for the APM X-Gene SoC reference, PLL, and device clocks.
358 tristate "Cirrus Logic Lochnagar clock driver"
365 tristate "Clock driver for the NPCM8XX SoC Family"
367 select AUXILIARY_BUS
374 bool "Clock driver for Loongson-2 SoC"
377 This driver provides support for clock controller on Loongson-2 SoC.
378 The clock controller can generates and supplies clock to various
380 Say Y here to support Loongson-2 SoC clock driver.
384 select REGMAP_MMIO if ARCH_LPC32XX
385 select MFD_SYSCON if ARCH_LPC18XX
387 Support for clock providers on NXP platforms.
390 tristate "Clock driver for TI Palmas devices"
394 using common clock framework.
397 tristate "Clock driver for PWMs used as clock outputs"
400 Adapter driver so that any PWM output can be (mis)used as clock signal
409 tristate "Clock driver for Renesas 9-series PCIe clock generators"
412 select REGMAP_I2C
414 This driver supports the Renesas 9-series PCIe clock generator
418 tristate "Clock driver for SkyWorks Si521xx PCIe clock generators"
421 select REGMAP_I2C
423 This driver supports the SkyWorks Si521xx PCIe clock generator
427 tristate "Clock driver for Renesas VersaClock 3 devices"
430 select REGMAP_I2C
432 This driver supports the Renesas VersaClock 3 programmable clock
436 tristate "Clock driver for IDT VersaClock 5,6 devices"
439 select REGMAP_I2C
442 programmable clock generators.
445 tristate "Clock driver for Renesas Versaclock 7 devices"
448 select REGMAP_I2C
450 Renesas Versaclock7 is a family of configurable clock generator
469 tristate "Clock driver for MMP2 Audio subsystem"
475 tristate "Clock driver for 32K clk gates on ROHM PMICs"
479 and BD71828 PMICs clock gates.
482 bool "Clock driver for Memory Mapped Fixed values"
489 bool "Clock driver for the Canaan Kendryte K210 SoC"
493 Support for the Canaan Kendryte K210 RISC-V SoC clocks.
496 tristate "Clock driver for Sunplus SP7021 SoC"
506 tristate "Clock driver based on RISC-V RPMI"
511 Support for clocks based on the clock service group defined by
512 the RISC-V platform management interface (RPMI) specification.
516 source "drivers/clk/baikal-t1/Kconfig"
543 source "drivers/clk/sunxi-ng/Kconfig"
556 tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS
559 select DTC
561 Kunit tests for the common clock framework.
567 select DTC
584 Kunit test for the clk-fractional-divider type.