1# SPDX-License-Identifier: GPL-2.0 2 3config HAVE_CLK 4 bool 5 help 6 The <linux/clk.h> calls support software clock gating and 7 thus are a key power management tool on many systems. 8 9config HAVE_CLK_PREPARE 10 bool 11 12config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated 13 bool 14 select HAVE_CLK 15 help 16 Select this option when the clock API in <linux/clk.h> is implemented 17 by platform/architecture code. This method is deprecated. Modern 18 code should select COMMON_CLK instead and not define a custom 19 'struct clk'. 20 21menuconfig COMMON_CLK 22 bool "Common Clock Framework" 23 depends on !HAVE_LEGACY_CLK 24 select HAVE_CLK_PREPARE 25 select HAVE_CLK 26 select RATIONAL 27 help 28 The common clock framework is a single definition of struct 29 clk, useful across many platforms, as well as an 30 implementation of the clock API in include/linux/clk.h. 31 Architectures utilizing the common struct clk should select 32 this option. 33 34if COMMON_CLK 35 36config COMMON_CLK_WM831X 37 tristate "Clock driver for WM831x/2x PMICs" 38 depends on MFD_WM831X 39 help 40 Supports the clocking subsystem of the WM831x/2x series of 41 PMICs from Wolfson Microelectronics. 42 43source "drivers/clk/versatile/Kconfig" 44 45config CLK_HSDK 46 bool "PLL Driver for HSDK platform" 47 depends on ARC_SOC_HSDK || COMPILE_TEST 48 depends on HAS_IOMEM 49 help 50 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs 51 control. 52 53config LMK04832 54 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner" 55 depends on SPI 56 select REGMAP_SPI 57 help 58 Say yes here to build support for Texas Instruments' LMK04832 Ultra 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 60 61config COMMON_CLK_APPLE_NCO 62 tristate "Clock driver for Apple SoC NCOs" 63 depends on ARCH_APPLE || COMPILE_TEST 64 help 65 This driver supports NCO (Numerically Controlled Oscillator) blocks 66 found on Apple SoCs such as t8103 (M1). The blocks are typically 67 generators of audio clocks. 68 69config COMMON_CLK_MAX77686 70 tristate "Clock driver for Maxim 77620/77686/77802 MFD" 71 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST 72 help 73 This driver supports Maxim 77620/77686/77802 crystal oscillator 74 clock. 75 76config COMMON_CLK_MAX9485 77 tristate "Maxim 9485 Programmable Clock Generator" 78 depends on I2C 79 help 80 This driver supports Maxim 9485 Programmable Audio Clock Generator 81 82config COMMON_CLK_RK808 83 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" 84 depends on MFD_RK8XX 85 help 86 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. 87 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 88 Clkout1 is always on, Clkout2 can off by control register. 89 90config COMMON_CLK_RP1 91 tristate "Raspberry Pi RP1-based clock support" 92 depends on MISC_RP1 || COMPILE_TEST 93 default MISC_RP1 94 help 95 Enable common clock framework support for Raspberry Pi RP1. 96 This multi-function device has 3 main PLLs and several clock 97 generators to drive the internal sub-peripherals. 98 99config COMMON_CLK_HI655X 100 tristate "Clock driver for Hi655x" if EXPERT 101 depends on (MFD_HI655X_PMIC || COMPILE_TEST) 102 select REGMAP 103 default MFD_HI655X_PMIC 104 help 105 This driver supports the hi655x PMIC clock. This 106 multi-function device has one fixed-rate oscillator, clocked 107 at 32KHz. 108 109config COMMON_CLK_SCMI 110 tristate "Clock driver controlled via SCMI interface" 111 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 112 help 113 This driver provides support for clocks that are controlled 114 by firmware that implements the SCMI interface. 115 116 This driver uses SCMI Message Protocol to interact with the 117 firmware providing all the clock controls. 118 119config COMMON_CLK_SCPI 120 tristate "Clock driver controlled via SCPI interface" 121 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST 122 help 123 This driver provides support for clocks that are controlled 124 by firmware that implements the SCPI interface. 125 126 This driver uses SCPI Message Protocol to interact with the 127 firmware providing all the clock controls. 128 129config COMMON_CLK_SI5341 130 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices" 131 depends on I2C 132 select REGMAP_I2C 133 help 134 This driver supports Silicon Labs Si5341 and Si5340 programmable clock 135 generators. Not all features of these chips are currently supported 136 by the driver, in particular it only supports XTAL input. The chip can 137 be pre-programmed to support other configurations and features not yet 138 implemented in the driver. 139 140config COMMON_CLK_SI5351 141 tristate "Clock driver for SiLabs 5351A/B/C" 142 depends on I2C 143 select REGMAP_I2C 144 help 145 This driver supports Silicon Labs 5351A/B/C programmable clock 146 generators. 147 148config COMMON_CLK_SI514 149 tristate "Clock driver for SiLabs 514 devices" 150 depends on I2C 151 depends on OF 152 select REGMAP_I2C 153 help 154 This driver supports the Silicon Labs 514 programmable clock 155 generator. 156 157config COMMON_CLK_SI544 158 tristate "Clock driver for SiLabs 544 devices" 159 depends on I2C 160 select REGMAP_I2C 161 help 162 This driver supports the Silicon Labs 544 programmable clock 163 generator. 164 165config COMMON_CLK_SI570 166 tristate "Clock driver for SiLabs 570 and compatible devices" 167 depends on I2C 168 depends on OF 169 select REGMAP_I2C 170 help 171 This driver supports Silicon Labs 570/571/598/599 programmable 172 clock generators. 173 174config COMMON_CLK_BM1880 175 bool "Clock driver for Bitmain BM1880 SoC" 176 depends on ARCH_BITMAIN || COMPILE_TEST 177 default ARCH_BITMAIN 178 help 179 This driver supports the clocks on Bitmain BM1880 SoC. 180 181config COMMON_CLK_CDCE706 182 tristate "Clock driver for TI CDCE706 clock synthesizer" 183 depends on I2C 184 select REGMAP_I2C 185 help 186 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 187 188config COMMON_CLK_TPS68470 189 tristate "Clock Driver for TI TPS68470 PMIC" 190 depends on I2C 191 depends on INTEL_SKL_INT3472 || COMPILE_TEST 192 select REGMAP_I2C 193 help 194 This driver supports the clocks provided by the TPS68470 PMIC. 195 196config COMMON_CLK_CDCE925 197 tristate "Clock driver for TI CDCE913/925/937/949 devices" 198 depends on I2C 199 depends on OF 200 select REGMAP_I2C 201 help 202 This driver supports the TI CDCE913/925/937/949 programmable clock 203 synthesizer. Each chip has different number of PLLs and outputs. 204 For example, the CDCE925 contains two PLLs with spread-spectrum 205 clocking support and five output dividers. The driver only supports 206 the following setup, and uses a fixed setting for the output muxes. 207 Y1 is derived from the input clock 208 Y2 and Y3 derive from PLL1 209 Y4 and Y5 derive from PLL2 210 Given a target output frequency, the driver will set the PLL and 211 divider to best approximate the desired output. 212 213config COMMON_CLK_CS2000_CP 214 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 215 depends on I2C 216 select REGMAP_I2C 217 help 218 If you say yes here you get support for the CS2000 clock multiplier. 219 220config COMMON_CLK_EN7523 221 bool "Clock driver for Airoha EN7523 SoC system clocks" 222 depends on OF 223 depends on ARCH_AIROHA || COMPILE_TEST 224 default ARCH_AIROHA 225 help 226 This driver provides the fixed clocks and gates present on Airoha 227 ARM silicon. 228 229config COMMON_CLK_EP93XX 230 tristate "Clock driver for Cirrus Logic ep93xx SoC" 231 depends on ARCH_EP93XX || COMPILE_TEST 232 select AUXILIARY_BUS 233 select REGMAP_MMIO 234 help 235 This driver supports the SoC clocks on the Cirrus Logic ep93xx. 236 237config COMMON_CLK_EYEQ 238 bool "Clock driver for the Mobileye EyeQ platform" 239 depends on MACH_EYEQ5 || MACH_EYEQ6H || COMPILE_TEST 240 select AUXILIARY_BUS 241 default MACH_EYEQ5 || MACH_EYEQ6H 242 help 243 This driver provides clocks found on Mobileye EyeQ5, EyeQ6L and Eye6H 244 SoCs. Controllers live in shared register regions called OLB. Driver 245 provides read-only PLLs, derived from the main crystal clock (which 246 must be constant). It also exposes some divider clocks. 247 248config COMMON_CLK_FSL_FLEXSPI 249 tristate "Clock driver for FlexSPI on Layerscape SoCs" 250 depends on ARCH_LAYERSCAPE || COMPILE_TEST 251 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI 252 help 253 On Layerscape SoCs there is a special clock for the FlexSPI 254 interface. 255 256config COMMON_CLK_FSL_SAI 257 bool "Clock driver for BCLK of Freescale SAI cores" 258 depends on ARCH_LAYERSCAPE || COMPILE_TEST 259 help 260 This driver supports the Freescale SAI (Synchronous Audio Interface) 261 to be used as a generic clock output. Some SoCs have restrictions 262 regarding the possible pin multiplexer settings. Eg. on some SoCs 263 two SAI interfaces can only be enabled together. If just one is 264 needed, the BCLK pin of the second one can be used as general 265 purpose clock output. Ideally, it can be used to drive an audio 266 codec (sometimes known as MCLK). 267 268config COMMON_CLK_GEMINI 269 bool "Clock driver for Cortina Systems Gemini SoC" 270 depends on ARCH_GEMINI || COMPILE_TEST 271 select MFD_SYSCON 272 select RESET_CONTROLLER 273 help 274 This driver supports the SoC clocks on the Cortina Systems Gemini 275 platform, also known as SL3516 or CS3516. 276 277config COMMON_CLK_LAN966X 278 tristate "Generic Clock Controller driver for LAN966X SoC" 279 depends on HAS_IOMEM 280 depends on OF 281 depends on SOC_LAN966 || ARCH_LAN969X || COMPILE_TEST 282 help 283 This driver provides support for Generic Clock Controller(GCK) on 284 LAN966X SoC. GCK generates and supplies clock to various peripherals 285 within the SoC. 286 287config COMMON_CLK_S2MPS11 288 tristate "Clock driver for S2MPS1X/S5M8767 MFD" 289 depends on MFD_SEC_CORE || COMPILE_TEST 290 help 291 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator 292 clock. These multi-function devices have two (S2MPS14) or three 293 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. 294 295config CLK_TWL 296 tristate "Clock driver for the TWL PMIC family" 297 depends on TWL4030_CORE 298 help 299 Enable support for controlling the clock resources on TWL family 300 PMICs. These devices have some 32K clock outputs which can be 301 controlled by software. For now, the TWL6032 and TWL6030 clocks are 302 supported. 303 304config CLK_TWL6040 305 tristate "External McPDM functional clock from twl6040" 306 depends on TWL6040_CORE 307 help 308 Enable the external functional clock support on OMAP4+ platforms for 309 McPDM. McPDM module is using the external bit clock on the McPDM bus 310 as functional clock. 311 312config COMMON_CLK_AXI_CLKGEN 313 tristate "AXI clkgen driver" 314 depends on HAS_IOMEM || COMPILE_TEST 315 depends on OF 316 help 317 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx 318 FPGAs. It is commonly used in Analog Devices' reference designs. 319 320config CLK_QORIQ 321 bool "Clock driver for Freescale QorIQ platforms" 322 depends on OF 323 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST 324 help 325 This adds the clock driver support for Freescale QorIQ platforms 326 using common clock framework. 327 328config CLK_LS1028A_PLLDIG 329 tristate "Clock driver for LS1028A Display output" 330 depends on ARCH_LAYERSCAPE || COMPILE_TEST 331 default ARCH_LAYERSCAPE 332 help 333 This driver support the Display output interfaces(LCD, DPHY) pixel clocks 334 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all 335 features of the PLL are currently supported by the driver. By default, 336 configured bypass mode with this PLL. 337 338config COMMON_CLK_XGENE 339 bool "Clock driver for APM XGene SoC" 340 default ARCH_XGENE 341 depends on ARM64 || COMPILE_TEST 342 help 343 Support for the APM X-Gene SoC reference, PLL, and device clocks. 344 345config COMMON_CLK_LOCHNAGAR 346 tristate "Cirrus Logic Lochnagar clock driver" 347 depends on MFD_LOCHNAGAR 348 help 349 This driver supports the clocking features of the Cirrus Logic 350 Lochnagar audio development board. 351 352config COMMON_CLK_NPCM8XX 353 tristate "Clock driver for the NPCM8XX SoC Family" 354 depends on ARCH_NPCM || COMPILE_TEST 355 select AUXILIARY_BUS 356 help 357 This driver supports the clocks on the Nuvoton BMC NPCM8XX SoC Family, 358 all the clocks are initialized by the bootloader, so this driver 359 allows only reading of current settings directly from the hardware. 360 361config COMMON_CLK_LOONGSON2 362 bool "Clock driver for Loongson-2 SoC" 363 depends on LOONGARCH || COMPILE_TEST 364 help 365 This driver provides support for clock controller on Loongson-2 SoC. 366 The clock controller can generates and supplies clock to various 367 peripherals within the SoC. 368 Say Y here to support Loongson-2 SoC clock driver. 369 370config COMMON_CLK_NXP 371 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) 372 select REGMAP_MMIO if ARCH_LPC32XX 373 select MFD_SYSCON if ARCH_LPC18XX 374 help 375 Support for clock providers on NXP platforms. 376 377config COMMON_CLK_PALMAS 378 tristate "Clock driver for TI Palmas devices" 379 depends on MFD_PALMAS 380 help 381 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO 382 using common clock framework. 383 384config COMMON_CLK_PWM 385 tristate "Clock driver for PWMs used as clock outputs" 386 depends on PWM 387 help 388 Adapter driver so that any PWM output can be (mis)used as clock signal 389 at 50% duty cycle. 390 391config COMMON_CLK_PXA 392 def_bool COMMON_CLK && ARCH_PXA 393 help 394 Support for the Marvell PXA SoC. 395 396config COMMON_CLK_RS9_PCIE 397 tristate "Clock driver for Renesas 9-series PCIe clock generators" 398 depends on I2C 399 depends on OF 400 select REGMAP_I2C 401 help 402 This driver supports the Renesas 9-series PCIe clock generator 403 models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ. 404 405config COMMON_CLK_SI521XX 406 tristate "Clock driver for SkyWorks Si521xx PCIe clock generators" 407 depends on I2C 408 depends on OF 409 select REGMAP_I2C 410 help 411 This driver supports the SkyWorks Si521xx PCIe clock generator 412 models Si52144/Si52146/Si52147. 413 414config COMMON_CLK_VC3 415 tristate "Clock driver for Renesas VersaClock 3 devices" 416 depends on I2C 417 depends on OF 418 select REGMAP_I2C 419 help 420 This driver supports the Renesas VersaClock 3 programmable clock 421 generators. 422 423config COMMON_CLK_VC5 424 tristate "Clock driver for IDT VersaClock 5,6 devices" 425 depends on I2C 426 depends on OF 427 select REGMAP_I2C 428 help 429 This driver supports the IDT VersaClock 5 and VersaClock 6 430 programmable clock generators. 431 432config COMMON_CLK_VC7 433 tristate "Clock driver for Renesas Versaclock 7 devices" 434 depends on I2C 435 depends on OF 436 select REGMAP_I2C 437 help 438 Renesas Versaclock7 is a family of configurable clock generator 439 and jitter attenuator ICs with fractional and integer dividers. 440 441config COMMON_CLK_STM32F 442 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) 443 help 444 Support for stm32f4 and stm32f7 SoC families clocks 445 446config COMMON_CLK_STM32H7 447 def_bool COMMON_CLK && MACH_STM32H743 448 help 449 Support for stm32h7 SoC family clocks 450 451config COMMON_CLK_MMP2 452 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT) 453 help 454 Support for Marvell MMP2 and MMP3 SoC clocks 455 456config COMMON_CLK_MMP2_AUDIO 457 tristate "Clock driver for MMP2 Audio subsystem" 458 depends on COMMON_CLK_MMP2 || COMPILE_TEST 459 help 460 This driver supports clocks for Audio subsystem on MMP2 SoC. 461 462config COMMON_CLK_BD718XX 463 tristate "Clock driver for 32K clk gates on ROHM PMICs" 464 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828 465 help 466 This driver supports ROHM BD71837, BD71847, BD71850, BD71815, 467 BD71828, and BD72720 PMICs clock gates. 468 469config COMMON_CLK_FIXED_MMIO 470 bool "Clock driver for Memory Mapped Fixed values" 471 depends on COMMON_CLK && OF 472 depends on HAS_IOMEM 473 help 474 Support for Memory Mapped IO Fixed clocks 475 476config COMMON_CLK_K210 477 bool "Clock driver for the Canaan Kendryte K210 SoC" 478 depends on OF && RISCV && SOC_CANAAN_K210 479 default SOC_CANAAN_K210 480 help 481 Support for the Canaan Kendryte K210 RISC-V SoC clocks. 482 483config COMMON_CLK_SP7021 484 tristate "Clock driver for Sunplus SP7021 SoC" 485 depends on SOC_SP7021 || COMPILE_TEST 486 default SOC_SP7021 487 help 488 This driver supports the Sunplus SP7021 SoC clocks. 489 It implements SP7021 PLLs/gate. 490 Not all features of the PLL are currently supported 491 by the driver. 492 493config COMMON_CLK_RPMI 494 tristate "Clock driver based on RISC-V RPMI" 495 depends on RISCV || COMPILE_TEST 496 depends on MAILBOX 497 default RISCV 498 help 499 Support for clocks based on the clock service group defined by 500 the RISC-V platform management interface (RPMI) specification. 501 502source "drivers/clk/actions/Kconfig" 503source "drivers/clk/analogbits/Kconfig" 504source "drivers/clk/aspeed/Kconfig" 505source "drivers/clk/baikal-t1/Kconfig" 506source "drivers/clk/bcm/Kconfig" 507source "drivers/clk/hisilicon/Kconfig" 508source "drivers/clk/imgtec/Kconfig" 509source "drivers/clk/imx/Kconfig" 510source "drivers/clk/ingenic/Kconfig" 511source "drivers/clk/keystone/Kconfig" 512source "drivers/clk/mediatek/Kconfig" 513source "drivers/clk/mmp/Kconfig" 514source "drivers/clk/meson/Kconfig" 515source "drivers/clk/mstar/Kconfig" 516source "drivers/clk/microchip/Kconfig" 517source "drivers/clk/mvebu/Kconfig" 518source "drivers/clk/nuvoton/Kconfig" 519source "drivers/clk/pistachio/Kconfig" 520source "drivers/clk/qcom/Kconfig" 521source "drivers/clk/ralink/Kconfig" 522source "drivers/clk/renesas/Kconfig" 523source "drivers/clk/rockchip/Kconfig" 524source "drivers/clk/samsung/Kconfig" 525source "drivers/clk/sifive/Kconfig" 526source "drivers/clk/socfpga/Kconfig" 527source "drivers/clk/sophgo/Kconfig" 528source "drivers/clk/spacemit/Kconfig" 529source "drivers/clk/sprd/Kconfig" 530source "drivers/clk/starfive/Kconfig" 531source "drivers/clk/sunxi/Kconfig" 532source "drivers/clk/sunxi-ng/Kconfig" 533source "drivers/clk/tegra/Kconfig" 534source "drivers/clk/thead/Kconfig" 535source "drivers/clk/stm32/Kconfig" 536source "drivers/clk/ti/Kconfig" 537source "drivers/clk/uniphier/Kconfig" 538source "drivers/clk/visconti/Kconfig" 539source "drivers/clk/x86/Kconfig" 540source "drivers/clk/xilinx/Kconfig" 541source "drivers/clk/zynqmp/Kconfig" 542 543# Kunit test cases 544config CLK_KUNIT_TEST 545 tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS 546 depends on KUNIT 547 default KUNIT_ALL_TESTS 548 select DTC 549 help 550 Kunit tests for the common clock framework. 551 552config CLK_FIXED_RATE_KUNIT_TEST 553 tristate "Basic fixed rate clk type KUnit test" if !KUNIT_ALL_TESTS 554 depends on KUNIT 555 default KUNIT_ALL_TESTS 556 select DTC 557 help 558 KUnit tests for the basic fixed rate clk type. 559 560config CLK_GATE_KUNIT_TEST 561 tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS 562 depends on KUNIT 563 depends on !S390 564 default KUNIT_ALL_TESTS 565 help 566 Kunit test for the basic clk gate type. 567 568config CLK_FD_KUNIT_TEST 569 tristate "Basic fractional divider type Kunit test" if !KUNIT_ALL_TESTS 570 depends on KUNIT 571 default KUNIT_ALL_TESTS 572 help 573 Kunit test for the clk-fractional-divider type. 574 575endif 576