xref: /linux/drivers/clk/Kconfig (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640)
1# SPDX-License-Identifier: GPL-2.0
2
3config HAVE_CLK
4	bool
5	help
6	  The <linux/clk.h> calls support software clock gating and
7	  thus are a key power management tool on many systems.
8
9config HAVE_CLK_PREPARE
10	bool
11
12config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
13	bool
14	select HAVE_CLK
15	help
16	  Select this option when the clock API in <linux/clk.h> is implemented
17	  by platform/architecture code. This method is deprecated. Modern
18	  code should select COMMON_CLK instead and not define a custom
19	  'struct clk'.
20
21menuconfig COMMON_CLK
22	bool "Common Clock Framework"
23	depends on !HAVE_LEGACY_CLK
24	select HAVE_CLK_PREPARE
25	select HAVE_CLK
26	select RATIONAL
27	help
28	  The common clock framework is a single definition of struct
29	  clk, useful across many platforms, as well as an
30	  implementation of the clock API in include/linux/clk.h.
31	  Architectures utilizing the common struct clk should select
32	  this option.
33
34if COMMON_CLK
35
36config COMMON_CLK_WM831X
37	tristate "Clock driver for WM831x/2x PMICs"
38	depends on MFD_WM831X
39	help
40	  Supports the clocking subsystem of the WM831x/2x series of
41	  PMICs from Wolfson Microelectronics.
42
43source "drivers/clk/versatile/Kconfig"
44
45config CLK_HSDK
46	bool "PLL Driver for HSDK platform"
47	depends on ARC_SOC_HSDK || COMPILE_TEST
48	depends on HAS_IOMEM
49	help
50	  This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
51	  control.
52
53config LMK04832
54	tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
55	depends on SPI
56	select REGMAP_SPI
57	help
58	  Say yes here to build support for Texas Instruments' LMK04832 Ultra
59	  Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
60
61config COMMON_CLK_APPLE_NCO
62	tristate "Clock driver for Apple SoC NCOs"
63	depends on ARCH_APPLE || COMPILE_TEST
64	help
65	  This driver supports NCO (Numerically Controlled Oscillator) blocks
66	  found on Apple SoCs such as t8103 (M1). The blocks are typically
67	  generators of audio clocks.
68
69config COMMON_CLK_MAX77686
70	tristate "Clock driver for Maxim 77620/77686/77802 MFD"
71	depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
72	help
73	  This driver supports Maxim 77620/77686/77802 crystal oscillator
74	  clock.
75
76config COMMON_CLK_MAX9485
77	tristate "Maxim 9485 Programmable Clock Generator"
78	depends on I2C
79	help
80	  This driver supports Maxim 9485 Programmable Audio Clock Generator
81
82config COMMON_CLK_RK808
83	tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
84	depends on MFD_RK8XX
85	help
86	  This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
87	  These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
88	  Clkout1 is always on, Clkout2 can off by control register.
89
90config COMMON_CLK_RP1
91	tristate "Raspberry Pi RP1-based clock support"
92	depends on MISC_RP1 || COMPILE_TEST
93	default MISC_RP1
94	help
95	  Enable common clock framework support for Raspberry Pi RP1.
96	  This multi-function device has 3 main PLLs and several clock
97	  generators to drive the internal sub-peripherals.
98
99config COMMON_CLK_HI655X
100	tristate "Clock driver for Hi655x" if EXPERT
101	depends on (MFD_HI655X_PMIC || COMPILE_TEST)
102	select REGMAP
103	default MFD_HI655X_PMIC
104	help
105	  This driver supports the hi655x PMIC clock. This
106	  multi-function device has one fixed-rate oscillator, clocked
107	  at 32KHz.
108
109config COMMON_CLK_SCMI
110	tristate "Clock driver controlled via SCMI interface"
111	depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
112	help
113	  This driver provides support for clocks that are controlled
114	  by firmware that implements the SCMI interface.
115
116	  This driver uses SCMI Message Protocol to interact with the
117	  firmware providing all the clock controls.
118
119config COMMON_CLK_SCPI
120	tristate "Clock driver controlled via SCPI interface"
121	depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
122	help
123	  This driver provides support for clocks that are controlled
124	  by firmware that implements the SCPI interface.
125
126	  This driver uses SCPI Message Protocol to interact with the
127	  firmware providing all the clock controls.
128
129config COMMON_CLK_SI5341
130	tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
131	depends on I2C
132	select REGMAP_I2C
133	help
134	  This driver supports Silicon Labs Si5341 and Si5340 programmable clock
135	  generators. Not all features of these chips are currently supported
136	  by the driver, in particular it only supports XTAL input. The chip can
137	  be pre-programmed to support other configurations and features not yet
138	  implemented in the driver.
139
140config COMMON_CLK_SI5351
141	tristate "Clock driver for SiLabs 5351A/B/C"
142	depends on I2C
143	select REGMAP_I2C
144	help
145	  This driver supports Silicon Labs 5351A/B/C programmable clock
146	  generators.
147
148config COMMON_CLK_SI514
149	tristate "Clock driver for SiLabs 514 devices"
150	depends on I2C
151	depends on OF
152	select REGMAP_I2C
153	help
154	  This driver supports the Silicon Labs 514 programmable clock
155	  generator.
156
157config COMMON_CLK_SI544
158	tristate "Clock driver for SiLabs 544 devices"
159	depends on I2C
160	select REGMAP_I2C
161	help
162	  This driver supports the Silicon Labs 544 programmable clock
163	  generator.
164
165config COMMON_CLK_SI570
166	tristate "Clock driver for SiLabs 570 and compatible devices"
167	depends on I2C
168	depends on OF
169	select REGMAP_I2C
170	help
171	  This driver supports Silicon Labs 570/571/598/599 programmable
172	  clock generators.
173
174config COMMON_CLK_BM1880
175	bool "Clock driver for Bitmain BM1880 SoC"
176	depends on ARCH_BITMAIN || COMPILE_TEST
177	default ARCH_BITMAIN
178	help
179	  This driver supports the clocks on Bitmain BM1880 SoC.
180
181config COMMON_CLK_CDCE706
182	tristate "Clock driver for TI CDCE706 clock synthesizer"
183	depends on I2C
184	select REGMAP_I2C
185	help
186	  This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
187
188config COMMON_CLK_TPS68470
189	tristate "Clock Driver for TI TPS68470 PMIC"
190	depends on I2C
191	depends on INTEL_SKL_INT3472 || COMPILE_TEST
192	select REGMAP_I2C
193	help
194	  This driver supports the clocks provided by the TPS68470 PMIC.
195
196config COMMON_CLK_CDCE925
197	tristate "Clock driver for TI CDCE913/925/937/949 devices"
198	depends on I2C
199	depends on OF
200	select REGMAP_I2C
201	help
202	  This driver supports the TI CDCE913/925/937/949 programmable clock
203	  synthesizer. Each chip has different number of PLLs and outputs.
204	  For example, the CDCE925 contains two PLLs with spread-spectrum
205	  clocking support and five output dividers. The driver only supports
206	  the following setup, and uses a fixed setting for the output muxes.
207	  Y1 is derived from the input clock
208	  Y2 and Y3 derive from PLL1
209	  Y4 and Y5 derive from PLL2
210	  Given a target output frequency, the driver will set the PLL and
211	  divider to best approximate the desired output.
212
213config COMMON_CLK_CS2000_CP
214	tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
215	depends on I2C
216	select REGMAP_I2C
217	help
218	  If you say yes here you get support for the CS2000 clock multiplier.
219
220config COMMON_CLK_EN7523
221	bool "Clock driver for Airoha EN7523 SoC system clocks"
222	depends on OF
223	depends on ARCH_AIROHA || COMPILE_TEST
224	default ARCH_AIROHA
225	help
226	  This driver provides the fixed clocks and gates present on Airoha
227	  ARM silicon.
228
229config COMMON_CLK_EP93XX
230	tristate "Clock driver for Cirrus Logic ep93xx SoC"
231	depends on ARCH_EP93XX || COMPILE_TEST
232	select AUXILIARY_BUS
233	select REGMAP_MMIO
234	help
235	  This driver supports the SoC clocks on the Cirrus Logic ep93xx.
236
237config COMMON_CLK_EYEQ
238	bool "Clock driver for the Mobileye EyeQ platform"
239	depends on MACH_EYEQ5 || MACH_EYEQ6H || COMPILE_TEST
240	select AUXILIARY_BUS
241	default MACH_EYEQ5 || MACH_EYEQ6H
242	help
243	  This driver provides clocks found on Mobileye EyeQ5, EyeQ6L and Eye6H
244	  SoCs. Controllers live in shared register regions called OLB. Driver
245	  provides read-only PLLs, derived from the main crystal clock (which
246	  must be constant). It also exposes some divider clocks.
247
248config COMMON_CLK_FSL_FLEXSPI
249	tristate "Clock driver for FlexSPI on Layerscape SoCs"
250	depends on ARCH_LAYERSCAPE || COMPILE_TEST
251	default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
252	help
253	  On Layerscape SoCs there is a special clock for the FlexSPI
254	  interface.
255
256config COMMON_CLK_FSL_SAI
257	bool "Clock driver for BCLK of Freescale SAI cores"
258	depends on ARCH_LAYERSCAPE || COMPILE_TEST
259	help
260	  This driver supports the Freescale SAI (Synchronous Audio Interface)
261	  to be used as a generic clock output. Some SoCs have restrictions
262	  regarding the possible pin multiplexer settings. Eg. on some SoCs
263	  two SAI interfaces can only be enabled together. If just one is
264	  needed, the BCLK pin of the second one can be used as general
265	  purpose clock output. Ideally, it can be used to drive an audio
266	  codec (sometimes known as MCLK).
267
268config COMMON_CLK_GEMINI
269	bool "Clock driver for Cortina Systems Gemini SoC"
270	depends on ARCH_GEMINI || COMPILE_TEST
271	select MFD_SYSCON
272	select RESET_CONTROLLER
273	help
274	  This driver supports the SoC clocks on the Cortina Systems Gemini
275	  platform, also known as SL3516 or CS3516.
276
277config COMMON_CLK_LAN966X
278	tristate "Generic Clock Controller driver for LAN966X SoC"
279	depends on HAS_IOMEM
280	depends on OF
281	depends on SOC_LAN966 || ARCH_LAN969X || COMPILE_TEST
282	help
283	  This driver provides support for Generic Clock Controller(GCK) on
284	  LAN966X SoC. GCK generates and supplies clock to various peripherals
285	  within the SoC.
286
287config COMMON_CLK_ASPEED
288	bool "Clock driver for Aspeed BMC SoCs"
289	depends on ARCH_ASPEED || COMPILE_TEST
290	default ARCH_ASPEED
291	select MFD_SYSCON
292	select RESET_CONTROLLER
293	help
294	  This driver supports the SoC clocks on the Aspeed BMC platforms.
295
296	  The G4 and G5 series, including the ast2400 and ast2500, are supported
297	  by this driver.
298
299config COMMON_CLK_S2MPS11
300	tristate "Clock driver for S2MPS1X/S5M8767 MFD"
301	depends on MFD_SEC_CORE || COMPILE_TEST
302	help
303	  This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
304	  clock. These multi-function devices have two (S2MPS14) or three
305	  (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
306
307config CLK_TWL
308	tristate "Clock driver for the TWL PMIC family"
309	depends on TWL4030_CORE
310	help
311	  Enable support for controlling the clock resources on TWL family
312	  PMICs. These devices have some 32K clock outputs which can be
313	  controlled by software. For now, the TWL6032 and TWL6030 clocks are
314	  supported.
315
316config CLK_TWL6040
317	tristate "External McPDM functional clock from twl6040"
318	depends on TWL6040_CORE
319	help
320	  Enable the external functional clock support on OMAP4+ platforms for
321	  McPDM. McPDM module is using the external bit clock on the McPDM bus
322	  as functional clock.
323
324config COMMON_CLK_AXI_CLKGEN
325	tristate "AXI clkgen driver"
326	depends on HAS_IOMEM || COMPILE_TEST
327	depends on OF
328	help
329	  Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
330	  FPGAs. It is commonly used in Analog Devices' reference designs.
331
332config CLK_QORIQ
333	bool "Clock driver for Freescale QorIQ platforms"
334	depends on OF
335	depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
336	help
337	  This adds the clock driver support for Freescale QorIQ platforms
338	  using common clock framework.
339
340config CLK_LS1028A_PLLDIG
341        tristate "Clock driver for LS1028A Display output"
342        depends on ARCH_LAYERSCAPE || COMPILE_TEST
343        default ARCH_LAYERSCAPE
344        help
345          This driver support the Display output interfaces(LCD, DPHY) pixel clocks
346          of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
347          features of the PLL are currently supported by the driver. By default,
348          configured bypass mode with this PLL.
349
350config COMMON_CLK_XGENE
351	bool "Clock driver for APM XGene SoC"
352	default ARCH_XGENE
353	depends on ARM64 || COMPILE_TEST
354	help
355	  Support for the APM X-Gene SoC reference, PLL, and device clocks.
356
357config COMMON_CLK_LOCHNAGAR
358	tristate "Cirrus Logic Lochnagar clock driver"
359	depends on MFD_LOCHNAGAR
360	help
361	  This driver supports the clocking features of the Cirrus Logic
362	  Lochnagar audio development board.
363
364config COMMON_CLK_NPCM8XX
365	tristate "Clock driver for the NPCM8XX SoC Family"
366	depends on ARCH_NPCM || COMPILE_TEST
367	help
368	  This driver supports the clocks on the Nuvoton BMC NPCM8XX SoC Family,
369	  all the clocks are initialized by the bootloader, so this driver
370	  allows only reading of current settings directly from the hardware.
371
372config COMMON_CLK_LOONGSON2
373	bool "Clock driver for Loongson-2 SoC"
374	depends on LOONGARCH || COMPILE_TEST
375	help
376          This driver provides support for clock controller on Loongson-2 SoC.
377          The clock controller can generates and supplies clock to various
378          peripherals within the SoC.
379          Say Y here to support Loongson-2 SoC clock driver.
380
381config COMMON_CLK_NXP
382	def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
383	select REGMAP_MMIO if ARCH_LPC32XX
384	select MFD_SYSCON if ARCH_LPC18XX
385	help
386	  Support for clock providers on NXP platforms.
387
388config COMMON_CLK_PALMAS
389	tristate "Clock driver for TI Palmas devices"
390	depends on MFD_PALMAS
391	help
392	  This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
393	  using common clock framework.
394
395config COMMON_CLK_PWM
396	tristate "Clock driver for PWMs used as clock outputs"
397	depends on PWM
398	help
399	  Adapter driver so that any PWM output can be (mis)used as clock signal
400	  at 50% duty cycle.
401
402config COMMON_CLK_PXA
403	def_bool COMMON_CLK && ARCH_PXA
404	help
405	  Support for the Marvell PXA SoC.
406
407config COMMON_CLK_RS9_PCIE
408	tristate "Clock driver for Renesas 9-series PCIe clock generators"
409	depends on I2C
410	depends on OF
411	select REGMAP_I2C
412	help
413	  This driver supports the Renesas 9-series PCIe clock generator
414	  models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ.
415
416config COMMON_CLK_SI521XX
417	tristate "Clock driver for SkyWorks Si521xx PCIe clock generators"
418	depends on I2C
419	depends on OF
420	select REGMAP_I2C
421	help
422	  This driver supports the SkyWorks Si521xx PCIe clock generator
423	  models Si52144/Si52146/Si52147.
424
425config COMMON_CLK_VC3
426	tristate "Clock driver for Renesas VersaClock 3 devices"
427	depends on I2C
428	depends on OF
429	select REGMAP_I2C
430	help
431	  This driver supports the Renesas VersaClock 3 programmable clock
432	  generators.
433
434config COMMON_CLK_VC5
435	tristate "Clock driver for IDT VersaClock 5,6 devices"
436	depends on I2C
437	depends on OF
438	select REGMAP_I2C
439	help
440	  This driver supports the IDT VersaClock 5 and VersaClock 6
441	  programmable clock generators.
442
443config COMMON_CLK_VC7
444	tristate "Clock driver for Renesas Versaclock 7 devices"
445	depends on I2C
446	depends on OF
447	select REGMAP_I2C
448	help
449	  Renesas Versaclock7 is a family of configurable clock generator
450	  and jitter attenuator ICs with fractional and integer dividers.
451
452config COMMON_CLK_STM32F
453	def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
454	help
455	  Support for stm32f4 and stm32f7 SoC families clocks
456
457config COMMON_CLK_STM32H7
458	def_bool COMMON_CLK && MACH_STM32H743
459	help
460	  Support for stm32h7 SoC family clocks
461
462config COMMON_CLK_MMP2
463	def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
464	help
465	  Support for Marvell MMP2 and MMP3 SoC clocks
466
467config COMMON_CLK_MMP2_AUDIO
468        tristate "Clock driver for MMP2 Audio subsystem"
469        depends on COMMON_CLK_MMP2 || COMPILE_TEST
470        help
471          This driver supports clocks for Audio subsystem on MMP2 SoC.
472
473config COMMON_CLK_BD718XX
474	tristate "Clock driver for 32K clk gates on ROHM PMICs"
475	depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
476	help
477	  This driver supports ROHM BD71837, BD71847, BD71850, BD71815
478	  and BD71828 PMICs clock gates.
479
480config COMMON_CLK_FIXED_MMIO
481	bool "Clock driver for Memory Mapped Fixed values"
482	depends on COMMON_CLK && OF
483	depends on HAS_IOMEM
484	help
485	  Support for Memory Mapped IO Fixed clocks
486
487config COMMON_CLK_K210
488	bool "Clock driver for the Canaan Kendryte K210 SoC"
489	depends on OF && RISCV && SOC_CANAAN_K210
490	default SOC_CANAAN_K210
491	help
492	  Support for the Canaan Kendryte K210 RISC-V SoC clocks.
493
494config COMMON_CLK_SP7021
495	tristate "Clock driver for Sunplus SP7021 SoC"
496	depends on SOC_SP7021 || COMPILE_TEST
497	default SOC_SP7021
498	help
499	  This driver supports the Sunplus SP7021 SoC clocks.
500	  It implements SP7021 PLLs/gate.
501	  Not all features of the PLL are currently supported
502	  by the driver.
503
504source "drivers/clk/actions/Kconfig"
505source "drivers/clk/analogbits/Kconfig"
506source "drivers/clk/baikal-t1/Kconfig"
507source "drivers/clk/bcm/Kconfig"
508source "drivers/clk/hisilicon/Kconfig"
509source "drivers/clk/imgtec/Kconfig"
510source "drivers/clk/imx/Kconfig"
511source "drivers/clk/ingenic/Kconfig"
512source "drivers/clk/keystone/Kconfig"
513source "drivers/clk/mediatek/Kconfig"
514source "drivers/clk/meson/Kconfig"
515source "drivers/clk/mstar/Kconfig"
516source "drivers/clk/microchip/Kconfig"
517source "drivers/clk/mvebu/Kconfig"
518source "drivers/clk/nuvoton/Kconfig"
519source "drivers/clk/pistachio/Kconfig"
520source "drivers/clk/qcom/Kconfig"
521source "drivers/clk/ralink/Kconfig"
522source "drivers/clk/renesas/Kconfig"
523source "drivers/clk/rockchip/Kconfig"
524source "drivers/clk/samsung/Kconfig"
525source "drivers/clk/sifive/Kconfig"
526source "drivers/clk/socfpga/Kconfig"
527source "drivers/clk/sophgo/Kconfig"
528source "drivers/clk/spacemit/Kconfig"
529source "drivers/clk/sprd/Kconfig"
530source "drivers/clk/starfive/Kconfig"
531source "drivers/clk/sunxi/Kconfig"
532source "drivers/clk/sunxi-ng/Kconfig"
533source "drivers/clk/tegra/Kconfig"
534source "drivers/clk/thead/Kconfig"
535source "drivers/clk/stm32/Kconfig"
536source "drivers/clk/ti/Kconfig"
537source "drivers/clk/uniphier/Kconfig"
538source "drivers/clk/visconti/Kconfig"
539source "drivers/clk/x86/Kconfig"
540source "drivers/clk/xilinx/Kconfig"
541source "drivers/clk/zynqmp/Kconfig"
542
543# Kunit test cases
544config CLK_KUNIT_TEST
545	tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS
546	depends on KUNIT
547	default KUNIT_ALL_TESTS
548	select DTC
549	help
550	  Kunit tests for the common clock framework.
551
552config CLK_FIXED_RATE_KUNIT_TEST
553	tristate "Basic fixed rate clk type KUnit test" if !KUNIT_ALL_TESTS
554	depends on KUNIT
555	default KUNIT_ALL_TESTS
556	select DTC
557	help
558	  KUnit tests for the basic fixed rate clk type.
559
560config CLK_GATE_KUNIT_TEST
561	tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS
562	depends on KUNIT
563	depends on !S390
564	default KUNIT_ALL_TESTS
565	help
566	  Kunit test for the basic clk gate type.
567
568config CLK_FD_KUNIT_TEST
569	tristate "Basic fractional divider type Kunit test" if !KUNIT_ALL_TESTS
570	depends on KUNIT
571	default KUNIT_ALL_TESTS
572	help
573	  Kunit test for the clk-fractional-divider type.
574
575endif
576