Lines Matching +full:can +full:- +full:clock +full:- +full:select

1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Haojian Zhuang <haojian.zhuang@linaro.org>
14   16 or 32 bit operation and capable of running in one-shot, periodic, or
15   free-running mode. The input clock is shared, but can be gated and prescaled
18   There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon
21 # Need a custom select here or 'arm,primecell' will match on lots of nodes
22 select:
27           - arm,sp804
28           - hisilicon,sp804
30     - compatible
35       - enum:
36           - arm,sp804
37           - hisilicon,sp804
38       - const: arm,primecell
45       specified by the "arm,sp804-has-irq" property.
56       be 1 or 3 clocks. With 3 clocks, the order is timer0 clock, timer1
57       clock, apb_pclk. A single clock can also be specified if the same
58       clock is used for all clock inputs.
60       - items:
61           - description: clock for timer 1
62           - description: clock for timer 2
63           - description: bus clock
64       - items:
65           - description: unified clock for both timers and the bus
67   clock-names: true
68     # The original binding did not specify any clock names, and there is no
73   arm,sp804-has-irq:
82   - compatible
83   - interrupts
84   - reg
85   - clocks
90   - |
96         clock-names = "timer1", "timer2", "apb_pclk";