1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 2daa93fabSSam Ravnborg# Select 32 or 64 bit 3daa93fabSSam Ravnborgconfig 64BIT 4104daea1SMasahiro Yamada bool "64-bit kernel" if "$(ARCH)" = "x86" 5104daea1SMasahiro Yamada default "$(ARCH)" != "i386" 6a7f7f624SMasahiro Yamada help 7daa93fabSSam Ravnborg Say yes to build a 64-bit kernel - formerly known as x86_64 8daa93fabSSam Ravnborg Say no to build a 32-bit kernel - formerly known as i386 9daa93fabSSam Ravnborg 10daa93fabSSam Ravnborgconfig X86_32 113120e25eSJan Beulich def_bool y 123120e25eSJan Beulich depends on !64BIT 13341c787eSIngo Molnar # Options that are inherently 32-bit kernel only: 14341c787eSIngo Molnar select ARCH_WANT_IPC_PARSE_VERSION 15341c787eSIngo Molnar select CLKSRC_I8253 16341c787eSIngo Molnar select CLONE_BACKWARDS 17157e118bSThomas Gleixner select GENERIC_VDSO_32 18117ed454SThomas Gleixner select HAVE_DEBUG_STACKOVERFLOW 19157e118bSThomas Gleixner select KMAP_LOCAL 20341c787eSIngo Molnar select MODULES_USE_ELF_REL 21341c787eSIngo Molnar select OLD_SIGACTION 222ca408d9SBrian Gerst select ARCH_SPLIT_ARG64 23daa93fabSSam Ravnborg 24daa93fabSSam Ravnborgconfig X86_64 253120e25eSJan Beulich def_bool y 263120e25eSJan Beulich depends on 64BIT 27d94e0685SIngo Molnar # Options that are inherently 64-bit kernel only: 284eb0716eSAlexandre Ghiti select ARCH_HAS_GIGANTIC_PAGE 29f9aad622SAnshuman Khandual select ARCH_HAS_PTDUMP 303049def1SJeff Xu select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS 31c12d3362SArd Biesheuvel select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 320bff0aaeSSuren Baghdasaryan select ARCH_SUPPORTS_PER_VMA_LOCK 3375182022SPeter Xu select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 34d94e0685SIngo Molnar select HAVE_ARCH_SOFT_DIRTY 35d94e0685SIngo Molnar select MODULES_USE_ELF_RELA 36f616ab59SChristoph Hellwig select NEED_DMA_MAP_STATE 3709230cbcSChristoph Hellwig select SWIOTLB 387facdc42SAl Viro select ARCH_HAS_ELFCORE_COMPAT 3963703f37SKefeng Wang select ZONE_DMA32 4014e56fb2SMike Rapoport (IBM) select EXECMEM if DYNAMIC_FTRACE 41b9020bdbSTony Luck select ACPI_MRRM if ACPI 421032c0baSSam Ravnborg 43518049d9SSteven Rostedt (VMware)config FORCE_DYNAMIC_FTRACE 44518049d9SSteven Rostedt (VMware) def_bool y 45518049d9SSteven Rostedt (VMware) depends on X86_32 46518049d9SSteven Rostedt (VMware) depends on FUNCTION_TRACER 47518049d9SSteven Rostedt (VMware) select DYNAMIC_FTRACE 48518049d9SSteven Rostedt (VMware) help 49518049d9SSteven Rostedt (VMware) We keep the static function tracing (!DYNAMIC_FTRACE) around 50518049d9SSteven Rostedt (VMware) in order to test the non static function tracing in the 51518049d9SSteven Rostedt (VMware) generic code, as other architectures still use it. But we 52518049d9SSteven Rostedt (VMware) only need to keep it around for x86_64. No need to keep it 53518049d9SSteven Rostedt (VMware) for x86_32. For x86_32, force DYNAMIC_FTRACE. 54d94e0685SIngo Molnar# 55d94e0685SIngo Molnar# Arch settings 56d94e0685SIngo Molnar# 57d94e0685SIngo Molnar# ( Note that options that are marked 'if X86_64' could in principle be 58d94e0685SIngo Molnar# ported to 32-bit as well. ) 59d94e0685SIngo Molnar# 608d5fffb9SSam Ravnborgconfig X86 613c2362e6SHarvey Harrison def_bool y 62c763ea26SIngo Molnar # 63c763ea26SIngo Molnar # Note: keep this list sorted alphabetically 64c763ea26SIngo Molnar # 656471b825SIngo Molnar select ACPI_LEGACY_TABLES_LOOKUP if ACPI 666e0a0ea1SGraeme Gregory select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 67a02f66bbSJames Morse select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 68942fa985SYury Norov select ARCH_32BIT_OFF_T if X86_32 692a21ad57SThomas Gleixner select ARCH_CLOCKSOURCE_INIT 70fe42754bSSean Christopherson select ARCH_CONFIGURES_CPU_MITIGATIONS 711f6d3a8fSMasami Hiramatsu select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE 721e866974SAnshuman Khandual select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION 735c11f00bSDavid Hildenbrand select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64 7491024b3cSAnshuman Khandual select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG 75cebc774fSAnshuman Khandual select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE) 761e866974SAnshuman Khandual select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE 7791dda51aSAleksey Makarov select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 78735e5920SDavid Kaplan select ARCH_HAS_CPU_ATTACK_VECTORS if CPU_MITIGATIONS 79c2280be8SAnshuman Khandual select ARCH_HAS_CACHE_LINE_SIZE 801156b441SDavidlohr Bueso select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION 817c7077a7SThomas Gleixner select ARCH_HAS_CPU_FINALIZE_INIT 828f23f5dbSJason Gunthorpe select ARCH_HAS_CPU_PASID if IOMMU_SVA 832792d84eSKees Cook select ARCH_HAS_CURRENT_STACK_POINTER 84fa5b6ec9SLaura Abbott select ARCH_HAS_DEBUG_VIRTUAL 85399145f9SAnshuman Khandual select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE 8621266be9SDan Williams select ARCH_HAS_DEVMEM_IS_ALLOWED 87de6c85bfSChristoph Hellwig select ARCH_HAS_DMA_OPS if GART_IOMMU || XEN 88b1a57bbfSDouglas Anderson select ARCH_HAS_EARLY_DEBUG if KGDB 896471b825SIngo Molnar select ARCH_HAS_ELF_RANDOMIZE 9047410d83SMike Rapoport (Microsoft) select ARCH_HAS_EXECMEM_ROX if X86_64 && STRICT_MODULE_RWX 9172d93104SLinus Torvalds select ARCH_HAS_FAST_MULTIPLIER 926974f0c4SDaniel Micay select ARCH_HAS_FORTIFY_SOURCE 93957e3facSRiku Voipio select ARCH_HAS_GCOV_PROFILE_ALL 94bece04b5SMarco Elver select ARCH_HAS_KCOV if X86_64 95b0b8a15bSSamuel Holland select ARCH_HAS_KERNEL_FPU_SUPPORT 960c9c1d56SThiago Jung Bauermann select ARCH_HAS_MEM_ENCRYPT 9710bcc80eSMathieu Desnoyers select ARCH_HAS_MEMBARRIER_SYNC_CORE 9849f88c70SPaul E. McKenney select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 990ebeea8cSDaniel Borkmann select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 100c763ea26SIngo Molnar select ARCH_HAS_PMEM_API if X86_64 101476e8583SPeter Zijlstra select ARCH_HAS_PREEMPT_LAZY 1023010a5eaSLaurent Dufour select ARCH_HAS_PTE_SPECIAL 10371ce1ab5SKinsey Ho select ARCH_HAS_HW_PTE_YOUNG 104eed9a328SYu Zhao select ARCH_HAS_NONLEAF_PMD_YOUNG if PGTABLE_LEVELS > 2 1050aed55afSDan Williams select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64 106ec6347bbSDan Williams select ARCH_HAS_COPY_MC if X86_64 107d2852a22SDaniel Borkmann select ARCH_HAS_SET_MEMORY 108d253ca0cSRick Edgecombe select ARCH_HAS_SET_DIRECT_MAP 109ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_KERNEL_RWX 110ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_MODULE_RWX 111ac1ab12aSMathieu Desnoyers select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 11225c619e5SBrian Gerst select ARCH_HAS_SYSCALL_WRAPPER 113918327e9SKees Cook select ARCH_HAS_UBSAN 1147e01ccb4SZong Li select ARCH_HAS_DEBUG_WX 11563703f37SKefeng Wang select ARCH_HAS_ZONE_DMA_SET if EXPERT 1166471b825SIngo Molnar select ARCH_HAVE_NMI_SAFE_CMPXCHG 117ba386777SVignesh Balasubramanian select ARCH_HAVE_EXTRA_ELF_NOTES 11804d5ea46SAneesh Kumar K.V select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE 1196471b825SIngo Molnar select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI 12077fbbc81SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 1215e2c18c0SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 1223599fe12SThomas Gleixner select ARCH_STACKWALK 1232c870e61SArnd Bergmann select ARCH_SUPPORTS_ACPI 1246471b825SIngo Molnar select ARCH_SUPPORTS_ATOMIC_RMW 1255d6ad668SMike Rapoport select ARCH_SUPPORTS_DEBUG_PAGEALLOC 1266470fb2bSAnshuman Khandual select ARCH_SUPPORTS_HUGETLBFS 127d283d422SPasha Tatashin select ARCH_SUPPORTS_PAGE_TABLE_CHECK if X86_64 1286471b825SIngo Molnar select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 12914df3267SThomas Gleixner select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP if NR_CPUS <= 4096 1303c516f89SSami Tolvanen select ARCH_SUPPORTS_CFI_CLANG if X86_64 1313c516f89SSami Tolvanen select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG 132583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG 133583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG_THIN 134d2d6422fSSebastian Andrzej Siewior select ARCH_SUPPORTS_RT 135315ad878SRong Xu select ARCH_SUPPORTS_AUTOFDO_CLANG 136d5dc9583SRong Xu select ARCH_SUPPORTS_PROPELLER_CLANG if X86_64 1376471b825SIngo Molnar select ARCH_USE_BUILTIN_BSWAP 138909639aaSH. Peter Anvin (Intel) select ARCH_USE_CMPXCHG_LOCKREF if X86_CX8 139dce44566SAnshuman Khandual select ARCH_USE_MEMTEST 1406471b825SIngo Molnar select ARCH_USE_QUEUED_RWLOCKS 1416471b825SIngo Molnar select ARCH_USE_QUEUED_SPINLOCKS 1422ce0d7f9SMark Brown select ARCH_USE_SYM_ANNOTATIONS 143ce4a4e56SAndy Lutomirski select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH 14481c22041SDaniel Borkmann select ARCH_WANT_DEFAULT_BPF_JIT if X86_64 145c763ea26SIngo Molnar select ARCH_WANTS_DYNAMIC_TASK_STRUCT 14651c2ee6dSNick Desaulniers select ARCH_WANTS_NO_INSTR 14707431506SAnshuman Khandual select ARCH_WANT_GENERAL_HUGETLB 14876303ee8SJann Horn select ARCH_WANT_HUGE_PMD_SHARE if X86_64 14959612b24SNathan Chancellor select ARCH_WANT_LD_ORPHAN_WARN 1500b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP if X86_64 1510b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if X86_64 15208efe293SFrank van der Linden select ARCH_WANT_HUGETLB_VMEMMAP_PREINIT if X86_64 15338d8b4e6SHuang Ying select ARCH_WANTS_THP_SWAP if X86_64 154b5f06f64SBalbir Singh select ARCH_HAS_PARANOID_L1D_FLUSH 155af896715SAndy Lutomirski select ARCH_WANT_IRQS_OFF_ACTIVATE_MM 15610916706SShile Zhang select BUILDTIME_TABLE_SORT 1576471b825SIngo Molnar select CLKEVT_I8253 1586471b825SIngo Molnar select CLOCKSOURCE_WATCHDOG 1597cf8f44aSAlexander Potapenko # Word-size accesses may read uninitialized data past the trailing \0 1607cf8f44aSAlexander Potapenko # in strings and cause false KMSAN reports. 1617cf8f44aSAlexander Potapenko select DCACHE_WORD_ACCESS if !KMSAN 1623aac3ebeSThomas Gleixner select DYNAMIC_SIGFRAME 16345471cd9SLinus Torvalds select EDAC_ATOMIC_SCRUB 16445471cd9SLinus Torvalds select EDAC_SUPPORT 1656471b825SIngo Molnar select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC) 166cb81deefSThomas Gleixner select GENERIC_CLOCKEVENTS_BROADCAST_IDLE if GENERIC_CLOCKEVENTS_BROADCAST 1676471b825SIngo Molnar select GENERIC_CLOCKEVENTS_MIN_ADJUST 1686471b825SIngo Molnar select GENERIC_CMOS_UPDATE 1696471b825SIngo Molnar select GENERIC_CPU_AUTOPROBE 1705b95f94cSJames Morse select GENERIC_CPU_DEVICES 17161dc0f55SThomas Gleixner select GENERIC_CPU_VULNERABILITIES 1726471b825SIngo Molnar select GENERIC_EARLY_IOREMAP 17327d6b4d1SThomas Gleixner select GENERIC_ENTRY 1746471b825SIngo Molnar select GENERIC_IOMAP 175c7d6c9ddSThomas Gleixner select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1760fa115daSThomas Gleixner select GENERIC_IRQ_MATRIX_ALLOCATOR if X86_LOCAL_APIC 177ad7a929fSThomas Gleixner select GENERIC_IRQ_MIGRATION if SMP 1786471b825SIngo Molnar select GENERIC_IRQ_PROBE 179c201c917SThomas Gleixner select GENERIC_IRQ_RESERVATION_MODE 1806471b825SIngo Molnar select GENERIC_IRQ_SHOW 1816471b825SIngo Molnar select GENERIC_PENDING_IRQ if SMP 1826471b825SIngo Molnar select GENERIC_SMP_IDLE_THREAD 1836471b825SIngo Molnar select GENERIC_TIME_VSYSCALL 1847ac87074SVincenzo Frascino select GENERIC_GETTIMEOFDAY 185dafde296SThomas Weißschuh select GENERIC_VDSO_DATA_STORE 186550a77a7SDmitry Safonov select GENERIC_VDSO_TIME_NS 1877e90ffb7SAdrian Hunter select GENERIC_VDSO_OVERFLOW_PROTECT 1886ca297d4SPeter Zijlstra select GUP_GET_PXX_LOW_HIGH if X86_PAE 18917e5888eSHans de Goede select HARDIRQS_SW_RESEND 1907edaeb68SThomas Gleixner select HARDLOCKUP_CHECK_TIMESTAMP if X86_64 191fcbfe812SNiklas Schnelle select HAS_IOPORT 1926471b825SIngo Molnar select HAVE_ACPI_APEI if ACPI 1936471b825SIngo Molnar select HAVE_ACPI_APEI_NMI if ACPI 1942a19be61SVlastimil Babka select HAVE_ALIGNED_STRUCT_PAGE 1956471b825SIngo Molnar select HAVE_ARCH_AUDITSYSCALL 1966471b825SIngo Molnar select HAVE_ARCH_HUGE_VMAP if X86_64 || X86_PAE 197eed1fceeSSong Liu select HAVE_ARCH_HUGE_VMALLOC if X86_64 1986471b825SIngo Molnar select HAVE_ARCH_JUMP_LABEL 199b34006c4SArd Biesheuvel select HAVE_ARCH_JUMP_LABEL_RELATIVE 200d17a1d97SAndrey Ryabinin select HAVE_ARCH_KASAN if X86_64 2010609ae01SDaniel Axtens select HAVE_ARCH_KASAN_VMALLOC if X86_64 2021dc0da6eSAlexander Potapenko select HAVE_ARCH_KFENCE 2034ca8cc8dSAlexander Potapenko select HAVE_ARCH_KMSAN if X86_64 2046471b825SIngo Molnar select HAVE_ARCH_KGDB 20557fbad15SKees Cook select HAVE_ARCH_KSTACK_ERASE 2069e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_BITS if MMU 2079e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 2081b028f78SDmitry Safonov select HAVE_ARCH_COMPAT_MMAP_BASES if MMU && COMPAT 209271ca788SArd Biesheuvel select HAVE_ARCH_PREL32_RELOCATIONS 2106471b825SIngo Molnar select HAVE_ARCH_SECCOMP_FILTER 211f7d83c1cSKees Cook select HAVE_ARCH_THREAD_STRUCT_WHITELIST 2126471b825SIngo Molnar select HAVE_ARCH_TRACEHOOK 2136471b825SIngo Molnar select HAVE_ARCH_TRANSPARENT_HUGEPAGE 214a00cc7d9SMatthew Wilcox select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64 215b64d8d1eSPeter Xu select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD 2167677f7fdSAxel Rasmussen select HAVE_ARCH_USERFAULTFD_MINOR if X86_64 && USERFAULTFD 217e37e43a4SAndy Lutomirski select HAVE_ARCH_VMAP_STACK if X86_64 218fe950f60SKees Cook select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 219c763ea26SIngo Molnar select HAVE_ARCH_WITHIN_STACK_FRAMES 2202ff2b7ecSMasahiro Yamada select HAVE_ASM_MODVERSIONS 2216471b825SIngo Molnar select HAVE_CMPXCHG_DOUBLE 2226471b825SIngo Molnar select HAVE_CMPXCHG_LOCAL 22324a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER if X86_64 22424a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER_OFFSTACK if HAVE_CONTEXT_TRACKING_USER 2256471b825SIngo Molnar select HAVE_C_RECORDMCOUNT 22603f16cd0SJosh Poimboeuf select HAVE_OBJTOOL_MCOUNT if HAVE_OBJTOOL 227280981d6SSathvika Vasireddy select HAVE_OBJTOOL_NOP_MCOUNT if HAVE_OBJTOOL_MCOUNT 2284ed308c4SSteven Rostedt (Google) select HAVE_BUILDTIME_MCOUNT_SORT 2296471b825SIngo Molnar select HAVE_DEBUG_KMEMLEAK 2309c5a3621SAkinobu Mita select HAVE_DMA_CONTIGUOUS 231677aa9f7SSteven Rostedt select HAVE_DYNAMIC_FTRACE 23206aeaaeaSMasami Hiramatsu select HAVE_DYNAMIC_FTRACE_WITH_REGS 23302a474caSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_ARGS if X86_64 234762abbc0SMasami Hiramatsu (Google) select HAVE_FTRACE_REGS_HAVING_PT_REGS if X86_64 235562955feSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 236c316eb44SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT if X86_64 237503e4510SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT_MULTI if X86_64 23803f5781bSWang YanQing select HAVE_EBPF_JIT 23958340a07SJohannes Berg select HAVE_EFFICIENT_UNALIGNED_ACCESS 240976ba8daSArnd Bergmann select HAVE_EISA if X86_32 2415f56a5dfSJiri Slaby select HAVE_EXIT_THREAD 24225176ad0SDavid Hildenbrand select HAVE_GUP_FAST 243644e0e8dSSteven Rostedt (VMware) select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE 244a762e926SMasami Hiramatsu (Google) select HAVE_FTRACE_GRAPH_FUNC if HAVE_FUNCTION_GRAPH_TRACER 245a3ed4157SMasami Hiramatsu (Google) select HAVE_FUNCTION_GRAPH_FREGS if HAVE_FUNCTION_GRAPH_TRACER 2464a30e4c9SSteven Rostedt (VMware) select HAVE_FUNCTION_GRAPH_TRACER if X86_32 || (X86_64 && DYNAMIC_FTRACE) 2476471b825SIngo Molnar select HAVE_FUNCTION_TRACER 2486b90bd4bSEmese Revfy select HAVE_GCC_PLUGINS 2490067f129SK.Prasad select HAVE_HW_BREAKPOINT 2506471b825SIngo Molnar select HAVE_IOREMAP_PROT 251624db9eaSThomas Gleixner select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64 2526471b825SIngo Molnar select HAVE_IRQ_TIME_ACCOUNTING 2534ab7674fSJosh Poimboeuf select HAVE_JUMP_LABEL_HACK if HAVE_OBJTOOL 2546471b825SIngo Molnar select HAVE_KERNEL_BZIP2 2556471b825SIngo Molnar select HAVE_KERNEL_GZIP 2566471b825SIngo Molnar select HAVE_KERNEL_LZ4 2576471b825SIngo Molnar select HAVE_KERNEL_LZMA 2586471b825SIngo Molnar select HAVE_KERNEL_LZO 2596471b825SIngo Molnar select HAVE_KERNEL_XZ 260fb46d057SNick Terrell select HAVE_KERNEL_ZSTD 2616471b825SIngo Molnar select HAVE_KPROBES 2626471b825SIngo Molnar select HAVE_KPROBES_ON_FTRACE 263540adea3SMasami Hiramatsu select HAVE_FUNCTION_ERROR_INJECTION 2646471b825SIngo Molnar select HAVE_KRETPROBES 265f3a112c0SMasami Hiramatsu select HAVE_RETHOOK 2666471b825SIngo Molnar select HAVE_LIVEPATCH if X86_64 2670102752eSFrederic Weisbecker select HAVE_MIXED_BREAKPOINTS_REGS 268ee9f8fceSJosh Poimboeuf select HAVE_MOD_ARCH_SPECIFIC 2699f132f7eSJoel Fernandes (Google) select HAVE_MOVE_PMD 270be37c98dSKalesh Singh select HAVE_MOVE_PUD 27122102f45SJosh Poimboeuf select HAVE_NOINSTR_HACK if HAVE_OBJTOOL 27242a0bb3fSPetr Mladek select HAVE_NMI 273489e355bSJosh Poimboeuf select HAVE_NOINSTR_VALIDATION if HAVE_OBJTOOL 27403f16cd0SJosh Poimboeuf select HAVE_OBJTOOL if X86_64 2756471b825SIngo Molnar select HAVE_OPTPROBES 2765394f1e9SArnd Bergmann select HAVE_PAGE_SIZE_4KB 2776471b825SIngo Molnar select HAVE_PCSPKR_PLATFORM 2786471b825SIngo Molnar select HAVE_PERF_EVENTS 279c01d4323SFrederic Weisbecker select HAVE_PERF_EVENTS_NMI 28092e5aae4SNicholas Piggin select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI 281eb01d42aSChristoph Hellwig select HAVE_PCI 282c5e63197SJiri Olsa select HAVE_PERF_REGS 283c5ebcedbSJiri Olsa select HAVE_PERF_USER_STACK_DUMP 284a3725973SRik van Riel select MMU_GATHER_RCU_TABLE_FREE 2851e9fdf21SPeter Zijlstra select MMU_GATHER_MERGE_VMAS 28600998085SThomas Gleixner select HAVE_POSIX_CPU_TIMERS_TASK_WORK 2876471b825SIngo Molnar select HAVE_REGS_AND_STACK_ACCESS_API 28803f16cd0SJosh Poimboeuf select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC || STACK_VALIDATION 2893c88ee19SMasami Hiramatsu select HAVE_FUNCTION_ARG_ACCESS_API 2907ecd19cfSKefeng Wang select HAVE_SETUP_PER_CPU_AREA 291cd1a41ceSThomas Gleixner select HAVE_SOFTIRQ_ON_OWN_STACK 2920ee2689bSBrian Gerst select HAVE_STACKPROTECTOR 29303f16cd0SJosh Poimboeuf select HAVE_STACK_VALIDATION if HAVE_OBJTOOL 294e6d6c071SJosh Poimboeuf select HAVE_STATIC_CALL 29503f16cd0SJosh Poimboeuf select HAVE_STATIC_CALL_INLINE if HAVE_OBJTOOL 29699cf983cSMark Rutland select HAVE_PREEMPT_DYNAMIC_CALL 297d6761b8fSMathieu Desnoyers select HAVE_RSEQ 29809498135SMiguel Ojeda select HAVE_RUST if X86_64 2996471b825SIngo Molnar select HAVE_SYSCALL_TRACEPOINTS 3005f3da8c0SJosh Poimboeuf select HAVE_UACCESS_VALIDATION if HAVE_OBJTOOL 3016471b825SIngo Molnar select HAVE_UNSTABLE_SCHED_CLOCK 3027c68af6eSAvi Kivity select HAVE_USER_RETURN_NOTIFIER 3037ac87074SVincenzo Frascino select HAVE_GENERIC_VDSO 30433385150SJason A. Donenfeld select VDSO_GETRANDOM if X86_64 3050c7ffa32SThomas Gleixner select HOTPLUG_PARALLEL if SMP && X86_64 30605736e4aSThomas Gleixner select HOTPLUG_SMT if SMP 3070c7ffa32SThomas Gleixner select HOTPLUG_SPLIT_STARTUP if SMP && X86_32 308c0185808SThomas Gleixner select IRQ_FORCED_THREADING 309c2508ec5SLinus Torvalds select LOCK_MM_AND_FIND_VMA 3107ecd19cfSKefeng Wang select NEED_PER_CPU_EMBED_FIRST_CHUNK 3117ecd19cfSKefeng Wang select NEED_PER_CPU_PAGE_FIRST_CHUNK 31286596f0aSChristoph Hellwig select NEED_SG_DMA_LENGTH 31387482708SMike Rapoport (Microsoft) select NUMA_MEMBLKS if NUMA 3142eac9c2dSChristoph Hellwig select PCI_DOMAINS if PCI 315625210cfSSinan Kaya select PCI_LOCKLESS_CONFIG if PCI 3166471b825SIngo Molnar select PERF_EVENTS 3173195ef59SPrarit Bhargava select RTC_LIB 318d6faca40SArnd Bergmann select RTC_MC146818_LIB 3196471b825SIngo Molnar select SPARSE_IRQ 3206471b825SIngo Molnar select SYSCTL_EXCEPTION_TRACE 32115f4eae7SAndy Lutomirski select THREAD_INFO_IN_TASK 3224aae683fSMasahiro Yamada select TRACE_IRQFLAGS_SUPPORT 3234510bffbSMark Rutland select TRACE_IRQFLAGS_NMI_SUPPORT 3246471b825SIngo Molnar select USER_STACKTRACE_SUPPORT 3253b02a051SIngo Molnar select HAVE_ARCH_KCSAN if X86_64 3260c608dadSAubrey Li select PROC_PID_ARCH_STATUS if PROC_FS 32750468e43SJarkko Sakkinen select HAVE_ARCH_NODE_DEV_GROUP if X86_SGX 328d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_16B if X86_64 || X86_ALIGNMENT_16 329d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_4B 3309e2b4be3SNayna Jain imply IMA_SECURE_AND_OR_TRUSTED_BOOT if EFI 331ceea991aSJiri Olsa select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 3324817f70cSQi Zheng select ARCH_SUPPORTS_PT_RECLAIM if X86_64 3337d8330a5SBalbir Singh 334ba7e4d13SIngo Molnarconfig INSTRUCTION_DECODER 3353120e25eSJan Beulich def_bool y 3363120e25eSJan Beulich depends on KPROBES || PERF_EVENTS || UPROBES 337ba7e4d13SIngo Molnar 33851b26adaSLinus Torvaldsconfig OUTPUT_FORMAT 33951b26adaSLinus Torvalds string 34051b26adaSLinus Torvalds default "elf32-i386" if X86_32 34151b26adaSLinus Torvalds default "elf64-x86-64" if X86_64 34251b26adaSLinus Torvalds 3438d5fffb9SSam Ravnborgconfig LOCKDEP_SUPPORT 3443c2362e6SHarvey Harrison def_bool y 3458d5fffb9SSam Ravnborg 3468d5fffb9SSam Ravnborgconfig STACKTRACE_SUPPORT 3473c2362e6SHarvey Harrison def_bool y 3488d5fffb9SSam Ravnborg 3498d5fffb9SSam Ravnborgconfig MMU 3503c2362e6SHarvey Harrison def_bool y 3518d5fffb9SSam Ravnborg 3529e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MIN 3539e08f57dSDaniel Cashman default 28 if 64BIT 3549e08f57dSDaniel Cashman default 8 3559e08f57dSDaniel Cashman 3569e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MAX 3579e08f57dSDaniel Cashman default 32 if 64BIT 3589e08f57dSDaniel Cashman default 16 3599e08f57dSDaniel Cashman 3609e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3619e08f57dSDaniel Cashman default 8 3629e08f57dSDaniel Cashman 3639e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3649e08f57dSDaniel Cashman default 16 3659e08f57dSDaniel Cashman 3668d5fffb9SSam Ravnborgconfig SBUS 3678d5fffb9SSam Ravnborg bool 3688d5fffb9SSam Ravnborg 3698d5fffb9SSam Ravnborgconfig GENERIC_ISA_DMA 3703120e25eSJan Beulich def_bool y 3713120e25eSJan Beulich depends on ISA_DMA_API 3728d5fffb9SSam Ravnborg 373d911c67eSAlexander Potapenkoconfig GENERIC_CSUM 374d911c67eSAlexander Potapenko bool 375d911c67eSAlexander Potapenko default y if KMSAN || KASAN 376d911c67eSAlexander Potapenko 3778d5fffb9SSam Ravnborgconfig GENERIC_BUG 3783c2362e6SHarvey Harrison def_bool y 3798d5fffb9SSam Ravnborg depends on BUG 380b93a531eSJan Beulich select GENERIC_BUG_RELATIVE_POINTERS if X86_64 381b93a531eSJan Beulich 382b93a531eSJan Beulichconfig GENERIC_BUG_RELATIVE_POINTERS 383b93a531eSJan Beulich bool 3848d5fffb9SSam Ravnborg 3858d5fffb9SSam Ravnborgconfig ARCH_MAY_HAVE_PC_FDC 3863120e25eSJan Beulich def_bool y 3873120e25eSJan Beulich depends on ISA_DMA_API 3888d5fffb9SSam Ravnborg 3891032c0baSSam Ravnborgconfig GENERIC_CALIBRATE_DELAY 3901032c0baSSam Ravnborg def_bool y 3911032c0baSSam Ravnborg 3929a0b8415Svenkatesh.pallipadi@intel.comconfig ARCH_HAS_CPU_RELAX 3939a0b8415Svenkatesh.pallipadi@intel.com def_bool y 3948d5fffb9SSam Ravnborg 395801e4062SJohannes Bergconfig ARCH_HIBERNATION_POSSIBLE 396801e4062SJohannes Berg def_bool y 397801e4062SJohannes Berg 398f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 399f4cb5700SJohannes Berg def_bool y 400f4cb5700SJohannes Berg 4018d5fffb9SSam Ravnborgconfig AUDIT_ARCH 402e0fd24a3SJan Beulich def_bool y if X86_64 4038d5fffb9SSam Ravnborg 404d6f2d75aSAndrey Ryabininconfig KASAN_SHADOW_OFFSET 405d6f2d75aSAndrey Ryabinin hex 406d6f2d75aSAndrey Ryabinin depends on KASAN 407d6f2d75aSAndrey Ryabinin default 0xdffffc0000000000 408d6f2d75aSAndrey Ryabinin 40969575d38SShane Wangconfig HAVE_INTEL_TXT 41069575d38SShane Wang def_bool y 4116ea30386SKees Cook depends on INTEL_IOMMU && ACPI 41269575d38SShane Wang 4136b0c3d44SSam Ravnborgconfig X86_64_SMP 4146b0c3d44SSam Ravnborg def_bool y 4156b0c3d44SSam Ravnborg depends on X86_64 && SMP 4166b0c3d44SSam Ravnborg 4172b144498SSrikar Dronamrajuconfig ARCH_SUPPORTS_UPROBES 4182b144498SSrikar Dronamraju def_bool y 4192b144498SSrikar Dronamraju 420d20642f0SRob Herringconfig FIX_EARLYCON_MEM 421d20642f0SRob Herring def_bool y 422d20642f0SRob Herring 42394d49eb3SKirill A. Shutemovconfig DYNAMIC_PHYSICAL_MASK 42494d49eb3SKirill A. Shutemov bool 42594d49eb3SKirill A. Shutemov 42698233368SKirill A. Shutemovconfig PGTABLE_LEVELS 42798233368SKirill A. Shutemov int 4287212b58dSKirill A. Shutemov default 5 if X86_64 42998233368SKirill A. Shutemov default 3 if X86_PAE 43098233368SKirill A. Shutemov default 2 43198233368SKirill A. Shutemov 432506f1d07SSam Ravnborgmenu "Processor type and features" 433506f1d07SSam Ravnborg 434506f1d07SSam Ravnborgconfig SMP 435506f1d07SSam Ravnborg bool "Symmetric multi-processing support" 436a7f7f624SMasahiro Yamada help 437506f1d07SSam Ravnborg This enables support for systems with more than one CPU. If you have 4384a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 4394a474157SRobert Graffham than one CPU, say Y. 440506f1d07SSam Ravnborg 4414a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 442506f1d07SSam Ravnborg machines, but will use only one CPU of a multiprocessor machine. If 443506f1d07SSam Ravnborg you say Y here, the kernel will run on many, but not all, 4444a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 445506f1d07SSam Ravnborg will run faster if you say N here. 446506f1d07SSam Ravnborg 447506f1d07SSam Ravnborg Note that if you say Y here and choose architecture "586" or 448506f1d07SSam Ravnborg "Pentium" under "Processor family", the kernel will not work on 486 449506f1d07SSam Ravnborg architectures. Similarly, multiprocessor kernels for the "PPro" 450506f1d07SSam Ravnborg architecture may not work on all Pentium based boards. 451506f1d07SSam Ravnborg 452506f1d07SSam Ravnborg People using multiprocessor machines who say Y here should also say 453506f1d07SSam Ravnborg Y to "Enhanced Real Time Clock Support", below. The "Advanced Power 454506f1d07SSam Ravnborg Management" code will be disabled if you say Y here. 455506f1d07SSam Ravnborg 456ff61f079SJonathan Corbet See also <file:Documentation/arch/x86/i386/IO-APIC.rst>, 4574f4cfa6cSMauro Carvalho Chehab <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at 458506f1d07SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 459506f1d07SSam Ravnborg 460506f1d07SSam Ravnborg If you don't know what to do here, say N. 461506f1d07SSam Ravnborg 46206cd9a7dSYinghai Luconfig X86_X2APIC 4639232c49fSMateusz Jończyk bool "x2APIC interrupt controller architecture support" 46419e3d60dSJan Kiszka depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST) 4659232c49fSMateusz Jończyk default y 466a7f7f624SMasahiro Yamada help 4679232c49fSMateusz Jończyk x2APIC is an interrupt controller architecture, a component of which 4689232c49fSMateusz Jończyk (the local APIC) is present in the CPU. It allows faster access to 4699232c49fSMateusz Jończyk the local APIC and supports a larger number of CPUs in the system 4709232c49fSMateusz Jończyk than the predecessors. 47106cd9a7dSYinghai Lu 4729232c49fSMateusz Jończyk x2APIC was introduced in Intel CPUs around 2008 and in AMD EPYC CPUs 4739232c49fSMateusz Jończyk in 2019, but it can be disabled by the BIOS. It is also frequently 4749232c49fSMateusz Jończyk emulated in virtual machines, even when the host CPU does not support 4759232c49fSMateusz Jończyk it. Support in the CPU can be checked by executing 47699bb1bd8SMateusz Jończyk grep x2apic /proc/cpuinfo 47706cd9a7dSYinghai Lu 47899bb1bd8SMateusz Jończyk If this configuration option is disabled, the kernel will boot with 47999bb1bd8SMateusz Jończyk very reduced functionality and performance on some platforms that 48099bb1bd8SMateusz Jończyk have x2APIC enabled. On the other hand, on hardware that does not 48199bb1bd8SMateusz Jończyk support x2APIC, a kernel with this option enabled will just fallback 48299bb1bd8SMateusz Jończyk to older APIC implementations. 483b8d1d163SDaniel Sneddon 48499bb1bd8SMateusz Jończyk If in doubt, say Y. 48506cd9a7dSYinghai Lu 4867fec07fdSJacob Panconfig X86_POSTED_MSI 4877fec07fdSJacob Pan bool "Enable MSI and MSI-x delivery by posted interrupts" 4887fec07fdSJacob Pan depends on X86_64 && IRQ_REMAP 4897fec07fdSJacob Pan help 4907fec07fdSJacob Pan This enables MSIs that are under interrupt remapping to be delivered as 4917fec07fdSJacob Pan posted interrupts to the host kernel. Interrupt throughput can 4927fec07fdSJacob Pan potentially be improved by coalescing CPU notifications during high 4937fec07fdSJacob Pan frequency bursts. 4947fec07fdSJacob Pan 4957fec07fdSJacob Pan If you don't know what to do here, say N. 4967fec07fdSJacob Pan 4976695c85bSYinghai Luconfig X86_MPPARSE 4984590d98fSAndy Shevchenko bool "Enable MPS table" if ACPI 4997a527688SJan Beulich default y 5005ab74722SIngo Molnar depends on X86_LOCAL_APIC 501a7f7f624SMasahiro Yamada help 5026695c85bSYinghai Lu For old smp systems that do not have proper acpi support. Newer systems 5036695c85bSYinghai Lu (esp with 64bit cpus) with acpi support, MADT and DSDT will override it 5046695c85bSYinghai Lu 505e6d42931SJohannes Weinerconfig X86_CPU_RESCTRL 506e6d42931SJohannes Weiner bool "x86 CPU resource control support" 5076fe07ce3SBabu Moger depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD) 508bff70402SJames Morse depends on MISC_FILESYSTEMS 509bff70402SJames Morse select ARCH_HAS_CPU_RESCTRL 510bff70402SJames Morse select RESCTRL_FS 51170288405SJames Morse select RESCTRL_FS_PSEUDO_LOCK 51278e99b4aSFenghua Yu help 513e6d42931SJohannes Weiner Enable x86 CPU resource control support. 5146fe07ce3SBabu Moger 5156fe07ce3SBabu Moger Provide support for the allocation and monitoring of system resources 5166fe07ce3SBabu Moger usage by the CPU. 5176fe07ce3SBabu Moger 5186fe07ce3SBabu Moger Intel calls this Intel Resource Director Technology 5196fe07ce3SBabu Moger (Intel(R) RDT). More information about RDT can be found in the 5206fe07ce3SBabu Moger Intel x86 Architecture Software Developer Manual. 5216fe07ce3SBabu Moger 5226fe07ce3SBabu Moger AMD calls this AMD Platform Quality of Service (AMD QoS). 5236fe07ce3SBabu Moger More information about AMD QoS can be found in the AMD64 Technology 5246fe07ce3SBabu Moger Platform Quality of Service Extensions manual. 52578e99b4aSFenghua Yu 52678e99b4aSFenghua Yu Say N if unsure. 52778e99b4aSFenghua Yu 5282cce9591SH. Peter Anvin (Intel)config X86_FRED 5292cce9591SH. Peter Anvin (Intel) bool "Flexible Return and Event Delivery" 5302cce9591SH. Peter Anvin (Intel) depends on X86_64 5312cce9591SH. Peter Anvin (Intel) help 5322cce9591SH. Peter Anvin (Intel) When enabled, try to use Flexible Return and Event Delivery 5332cce9591SH. Peter Anvin (Intel) instead of the legacy SYSCALL/SYSENTER/IDT architecture for 5342cce9591SH. Peter Anvin (Intel) ring transitions and exception/interrupt handling if the 5353c41786cSPaul Menzel system supports it. 5362cce9591SH. Peter Anvin (Intel) 537c5c606d9SRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM 538c5c606d9SRavikiran G Thirumalai bool "Support for extended (non-PC) x86 platforms" 539c5c606d9SRavikiran G Thirumalai default y 540a7f7f624SMasahiro Yamada help 54106ac8346SIngo Molnar If you disable this option then the kernel will only support 54206ac8346SIngo Molnar standard PC platforms. (which covers the vast majority of 54306ac8346SIngo Molnar systems out there.) 54406ac8346SIngo Molnar 5458425091fSRavikiran G Thirumalai If you enable this option then you'll be able to select support 54671d99ea4SMasahiro Yamada for the following non-PC x86 platforms, depending on the value of 54771d99ea4SMasahiro Yamada CONFIG_64BIT. 54871d99ea4SMasahiro Yamada 54971d99ea4SMasahiro Yamada 32-bit platforms (CONFIG_64BIT=n): 5504047e877SMateusz Jończyk Goldfish (mostly Android emulator) 5514047e877SMateusz Jończyk Intel CE media processor (CE4100) SoC 5524047e877SMateusz Jończyk Intel Quark 5538425091fSRavikiran G Thirumalai RDC R-321x SoC 55406ac8346SIngo Molnar 55571d99ea4SMasahiro Yamada 64-bit platforms (CONFIG_64BIT=y): 55644b111b5SSteffen Persvold Numascale NumaChip 5578425091fSRavikiran G Thirumalai ScaleMP vSMP 5588425091fSRavikiran G Thirumalai SGI Ultraviolet 559ca5955ddSArnd Bergmann Merrifield/Moorefield MID devices 5604047e877SMateusz Jończyk Goldfish (mostly Android emulator) 5618425091fSRavikiran G Thirumalai 5628425091fSRavikiran G Thirumalai If you have one of these systems, or if you want to build a 5638425091fSRavikiran G Thirumalai generic distribution kernel, say Y here - otherwise say N. 56471d99ea4SMasahiro Yamada 565c5c606d9SRavikiran G Thirumalai# This is an alphabetically sorted list of 64 bit extended platforms 566c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 56744b111b5SSteffen Persvoldconfig X86_NUMACHIP 56844b111b5SSteffen Persvold bool "Numascale NumaChip" 56944b111b5SSteffen Persvold depends on X86_64 57044b111b5SSteffen Persvold depends on X86_EXTENDED_PLATFORM 57144b111b5SSteffen Persvold depends on NUMA 57244b111b5SSteffen Persvold depends on SMP 57344b111b5SSteffen Persvold depends on X86_X2APIC 574f9726bfdSDaniel J Blueman depends on PCI_MMCONFIG 575a7f7f624SMasahiro Yamada help 57644b111b5SSteffen Persvold Adds support for Numascale NumaChip large-SMP systems. Needed to 57744b111b5SSteffen Persvold enable more than ~168 cores. 57844b111b5SSteffen Persvold If you don't have one of these, you should say N here. 57903b48632SNick Piggin 5806a48565eSIngo Molnarconfig X86_VSMP 581c5c606d9SRavikiran G Thirumalai bool "ScaleMP vSMP" 5826276a074SBorislav Petkov select HYPERVISOR_GUEST 5836a48565eSIngo Molnar select PARAVIRT 5846a48565eSIngo Molnar depends on X86_64 && PCI 585c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 586ead91d4bSShai Fultheim depends on SMP 587a7f7f624SMasahiro Yamada help 5886a48565eSIngo Molnar Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is 5896a48565eSIngo Molnar supposed to run on these EM64T-based machines. Only choose this option 5906a48565eSIngo Molnar if you have one of these machines. 5916a48565eSIngo Molnar 592c5c606d9SRavikiran G Thirumalaiconfig X86_UV 593c5c606d9SRavikiran G Thirumalai bool "SGI Ultraviolet" 594c5c606d9SRavikiran G Thirumalai depends on X86_64 595c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 59654c28d29SJack Steiner depends on NUMA 5971ecb4ae5SAndrew Morton depends on EFI 598c2209ea5SIngo Molnar depends on KEXEC_CORE 5999d6c26e7SSuresh Siddha depends on X86_X2APIC 6001222e564SIngo Molnar depends on PCI 601a7f7f624SMasahiro Yamada help 602c5c606d9SRavikiran G Thirumalai This option is needed in order to support SGI Ultraviolet systems. 603c5c606d9SRavikiran G Thirumalai If you don't have one of these, you should say N here. 604c5c606d9SRavikiran G Thirumalai 605ca5955ddSArnd Bergmannconfig X86_INTEL_MID 606ca5955ddSArnd Bergmann bool "Intel Z34xx/Z35xx MID platform support" 607ca5955ddSArnd Bergmann depends on X86_EXTENDED_PLATFORM 608ca5955ddSArnd Bergmann depends on X86_PLATFORM_DEVICES 609ca5955ddSArnd Bergmann depends on PCI 610ca5955ddSArnd Bergmann depends on X86_64 || (EXPERT && PCI_GOANY) 611ca5955ddSArnd Bergmann depends on X86_IO_APIC 612ca5955ddSArnd Bergmann select I2C 613ca5955ddSArnd Bergmann select DW_APB_TIMER 614ca5955ddSArnd Bergmann select INTEL_SCU_PCI 615ca5955ddSArnd Bergmann help 616ca5955ddSArnd Bergmann Select to build a kernel capable of supporting 64-bit Intel MID 617ca5955ddSArnd Bergmann (Mobile Internet Device) platform systems which do not have 618ca5955ddSArnd Bergmann the PCI legacy interfaces. 619ca5955ddSArnd Bergmann 620ca5955ddSArnd Bergmann The only supported devices are the 22nm Merrified (Z34xx) 621ca5955ddSArnd Bergmann and Moorefield (Z35xx) SoC used in the Intel Edison board and 622ca5955ddSArnd Bergmann a small number of Android devices such as the Asus Zenfone 2, 623ca5955ddSArnd Bergmann Asus FonePad 8 and Dell Venue 7. 624ca5955ddSArnd Bergmann 625ca5955ddSArnd Bergmann If you are building for a PC class system or non-MID tablet 626ca5955ddSArnd Bergmann SoCs like Bay Trail (Z36xx/Z37xx), say N here. 627ca5955ddSArnd Bergmann 628ca5955ddSArnd Bergmann Intel MID platforms are based on an Intel processor and chipset which 629ca5955ddSArnd Bergmann consume less power than most of the x86 derivatives. 630506f1d07SSam Ravnborg 631ddd70cf9SJun Nakajimaconfig X86_GOLDFISH 632ddd70cf9SJun Nakajima bool "Goldfish (Virtual Platform)" 633cb7b8023SBen Hutchings depends on X86_EXTENDED_PLATFORM 634a7f7f624SMasahiro Yamada help 635ddd70cf9SJun Nakajima Enable support for the Goldfish virtual platform used primarily 636ddd70cf9SJun Nakajima for Android development. Unless you are building for the Android 637ddd70cf9SJun Nakajima Goldfish emulator say N here. 638ddd70cf9SJun Nakajima 639ca5955ddSArnd Bergmann# Following is an alphabetically sorted list of 32 bit extended platforms 640ca5955ddSArnd Bergmann# Please maintain the alphabetic order if and when there are additions 641ca5955ddSArnd Bergmann 642c751e17bSThomas Gleixnerconfig X86_INTEL_CE 643c751e17bSThomas Gleixner bool "CE4100 TV platform" 644c751e17bSThomas Gleixner depends on PCI 645c751e17bSThomas Gleixner depends on PCI_GODIRECT 6466084a6e2SJiang Liu depends on X86_IO_APIC 647c751e17bSThomas Gleixner depends on X86_32 648c751e17bSThomas Gleixner depends on X86_EXTENDED_PLATFORM 64937bc9f50SDirk Brandewie select X86_REBOOTFIXUPS 650da6b737bSSebastian Andrzej Siewior select OF 651da6b737bSSebastian Andrzej Siewior select OF_EARLY_FLATTREE 652a7f7f624SMasahiro Yamada help 653c751e17bSThomas Gleixner Select for the Intel CE media processor (CE4100) SOC. 654c751e17bSThomas Gleixner This option compiles in support for the CE4100 SOC for settop 655c751e17bSThomas Gleixner boxes and media devices. 656c751e17bSThomas Gleixner 6578bbc2a13SBryan O'Donoghueconfig X86_INTEL_QUARK 6588bbc2a13SBryan O'Donoghue bool "Intel Quark platform support" 6598bbc2a13SBryan O'Donoghue depends on X86_32 6608bbc2a13SBryan O'Donoghue depends on X86_EXTENDED_PLATFORM 6618bbc2a13SBryan O'Donoghue depends on X86_PLATFORM_DEVICES 6628bbc2a13SBryan O'Donoghue depends on X86_TSC 6638bbc2a13SBryan O'Donoghue depends on PCI 6648bbc2a13SBryan O'Donoghue depends on PCI_GOANY 6658bbc2a13SBryan O'Donoghue depends on X86_IO_APIC 6668bbc2a13SBryan O'Donoghue select IOSF_MBI 6678bbc2a13SBryan O'Donoghue select INTEL_IMR 6689ab6eb51SAndy Shevchenko select COMMON_CLK 669a7f7f624SMasahiro Yamada help 6708bbc2a13SBryan O'Donoghue Select to include support for Quark X1000 SoC. 6718bbc2a13SBryan O'Donoghue Say Y here if you have a Quark based system such as the Arduino 6728bbc2a13SBryan O'Donoghue compatible Intel Galileo. 6738bbc2a13SBryan O'Donoghue 674e35e328dSMateusz Jończykconfig X86_RDC321X 675e35e328dSMateusz Jończyk bool "RDC R-321x SoC" 676e35e328dSMateusz Jończyk depends on X86_32 677e35e328dSMateusz Jończyk depends on X86_EXTENDED_PLATFORM 678e35e328dSMateusz Jończyk select M486 679e35e328dSMateusz Jończyk select X86_REBOOTFIXUPS 680e35e328dSMateusz Jończyk help 681e35e328dSMateusz Jończyk This option is needed for RDC R-321x system-on-chip, also known 682e35e328dSMateusz Jończyk as R-8610-(G). 683e35e328dSMateusz Jończyk If you don't have one of these chips, you should say N here. 684e35e328dSMateusz Jończyk 6853d48aab1SMika Westerbergconfig X86_INTEL_LPSS 6863d48aab1SMika Westerberg bool "Intel Low Power Subsystem Support" 6875962dd22SSinan Kaya depends on X86 && ACPI && PCI 6883d48aab1SMika Westerberg select COMMON_CLK 6890f531431SMathias Nyman select PINCTRL 690eebb3e8dSAndy Shevchenko select IOSF_MBI 691a7f7f624SMasahiro Yamada help 6923d48aab1SMika Westerberg Select to build support for Intel Low Power Subsystem such as 6933d48aab1SMika Westerberg found on Intel Lynxpoint PCH. Selecting this option enables 6940f531431SMathias Nyman things like clock tree (common clock framework) and pincontrol 6950f531431SMathias Nyman which are needed by the LPSS peripheral drivers. 6963d48aab1SMika Westerberg 69792082a88SKen Xueconfig X86_AMD_PLATFORM_DEVICE 69892082a88SKen Xue bool "AMD ACPI2Platform devices support" 69992082a88SKen Xue depends on ACPI 70092082a88SKen Xue select COMMON_CLK 70192082a88SKen Xue select PINCTRL 702a7f7f624SMasahiro Yamada help 70392082a88SKen Xue Select to interpret AMD specific ACPI device to platform device 70492082a88SKen Xue such as I2C, UART, GPIO found on AMD Carrizo and later chipsets. 70592082a88SKen Xue I2C and UART depend on COMMON_CLK to set clock. GPIO driver is 70692082a88SKen Xue implemented under PINCTRL subsystem. 70792082a88SKen Xue 708ced3ce76SDavid E. Boxconfig IOSF_MBI 709ced3ce76SDavid E. Box tristate "Intel SoC IOSF Sideband support for SoC platforms" 710ced3ce76SDavid E. Box depends on PCI 711a7f7f624SMasahiro Yamada help 712ced3ce76SDavid E. Box This option enables sideband register access support for Intel SoC 713ced3ce76SDavid E. Box platforms. On these platforms the IOSF sideband is used in lieu of 714ced3ce76SDavid E. Box MSR's for some register accesses, mostly but not limited to thermal 715ced3ce76SDavid E. Box and power. Drivers may query the availability of this device to 716ced3ce76SDavid E. Box determine if they need the sideband in order to work on these 717ced3ce76SDavid E. Box platforms. The sideband is available on the following SoC products. 718ced3ce76SDavid E. Box This list is not meant to be exclusive. 719ced3ce76SDavid E. Box - BayTrail 720ced3ce76SDavid E. Box - Braswell 721ced3ce76SDavid E. Box - Quark 722ced3ce76SDavid E. Box 723ced3ce76SDavid E. Box You should say Y if you are running a kernel on one of these SoC's. 724ced3ce76SDavid E. Box 725ed2226bdSDavid E. Boxconfig IOSF_MBI_DEBUG 726ed2226bdSDavid E. Box bool "Enable IOSF sideband access through debugfs" 727ed2226bdSDavid E. Box depends on IOSF_MBI && DEBUG_FS 728a7f7f624SMasahiro Yamada help 729ed2226bdSDavid E. Box Select this option to expose the IOSF sideband access registers (MCR, 730ed2226bdSDavid E. Box MDR, MCRX) through debugfs to write and read register information from 731ed2226bdSDavid E. Box different units on the SoC. This is most useful for obtaining device 732ed2226bdSDavid E. Box state information for debug and analysis. As this is a general access 733ed2226bdSDavid E. Box mechanism, users of this option would have specific knowledge of the 734ed2226bdSDavid E. Box device they want to access. 735ed2226bdSDavid E. Box 736ed2226bdSDavid E. Box If you don't require the option or are in doubt, say N. 737ed2226bdSDavid E. Box 738d949f36fSLinus Torvaldsconfig X86_SUPPORTS_MEMORY_FAILURE 7396fc108a0SJan Beulich def_bool y 740d949f36fSLinus Torvalds # MCE code calls memory_failure(): 741d949f36fSLinus Torvalds depends on X86_MCE 742d949f36fSLinus Torvalds # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags: 743d949f36fSLinus Torvalds # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH: 744d949f36fSLinus Torvalds depends on X86_64 || !SPARSEMEM 745d949f36fSLinus Torvalds select ARCH_SUPPORTS_MEMORY_FAILURE 746d949f36fSLinus Torvalds 74782148d1dSShérabconfig X86_32_IRIS 74882148d1dSShérab tristate "Eurobraille/Iris poweroff module" 74982148d1dSShérab depends on X86_32 750a7f7f624SMasahiro Yamada help 75182148d1dSShérab The Iris machines from EuroBraille do not have APM or ACPI support 75282148d1dSShérab to shut themselves down properly. A special I/O sequence is 75382148d1dSShérab needed to do so, which is what this module does at 75482148d1dSShérab kernel shutdown. 75582148d1dSShérab 75682148d1dSShérab This is only for Iris machines from EuroBraille. 75782148d1dSShérab 75882148d1dSShérab If unused, say N. 75982148d1dSShérab 760ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 7613c2362e6SHarvey Harrison def_bool y 7623c2362e6SHarvey Harrison prompt "Single-depth WCHAN output" 763a87d0914SKen Chen depends on X86 764a7f7f624SMasahiro Yamada help 765506f1d07SSam Ravnborg Calculate simpler /proc/<PID>/wchan values. If this option 766506f1d07SSam Ravnborg is disabled then wchan values will recurse back to the 767506f1d07SSam Ravnborg caller function. This provides more accurate wchan values, 768506f1d07SSam Ravnborg at the expense of slightly more scheduling overhead. 769506f1d07SSam Ravnborg 770506f1d07SSam Ravnborg If in doubt, say "Y". 771506f1d07SSam Ravnborg 7726276a074SBorislav Petkovmenuconfig HYPERVISOR_GUEST 7736276a074SBorislav Petkov bool "Linux guest support" 774a7f7f624SMasahiro Yamada help 7756276a074SBorislav Petkov Say Y here to enable options for running Linux under various hyper- 7766276a074SBorislav Petkov visors. This option enables basic hypervisor detection and platform 7776276a074SBorislav Petkov setup. 778506f1d07SSam Ravnborg 7796276a074SBorislav Petkov If you say N, all options in this submenu will be skipped and 7806276a074SBorislav Petkov disabled, and Linux guest support won't be built in. 781506f1d07SSam Ravnborg 7826276a074SBorislav Petkovif HYPERVISOR_GUEST 783506f1d07SSam Ravnborg 784e61bd94aSEduardo Pereira Habkostconfig PARAVIRT 785e61bd94aSEduardo Pereira Habkost bool "Enable paravirtualization code" 786a0e2bf7cSJuergen Gross depends on HAVE_STATIC_CALL 787a7f7f624SMasahiro Yamada help 788e61bd94aSEduardo Pereira Habkost This changes the kernel so it can modify itself when it is run 789e61bd94aSEduardo Pereira Habkost under a hypervisor, potentially improving performance significantly 790e61bd94aSEduardo Pereira Habkost over full virtualization. However, when run without a hypervisor 791e61bd94aSEduardo Pereira Habkost the kernel is theoretically slower and slightly larger. 792e61bd94aSEduardo Pereira Habkost 793c00a280aSJuergen Grossconfig PARAVIRT_XXL 794c00a280aSJuergen Gross bool 79509230b75SKirill A. Shutemov depends on X86_64 796c00a280aSJuergen Gross 7976276a074SBorislav Petkovconfig PARAVIRT_DEBUG 7986276a074SBorislav Petkov bool "paravirt-ops debugging" 7996276a074SBorislav Petkov depends on PARAVIRT && DEBUG_KERNEL 800a7f7f624SMasahiro Yamada help 8016276a074SBorislav Petkov Enable to debug paravirt_ops internals. Specifically, BUG if 8026276a074SBorislav Petkov a paravirt_op is missing when it is called. 8036276a074SBorislav Petkov 804b4ecc126SJeremy Fitzhardingeconfig PARAVIRT_SPINLOCKS 805b4ecc126SJeremy Fitzhardinge bool "Paravirtualization layer for spinlocks" 8066ea30386SKees Cook depends on PARAVIRT && SMP 807a7f7f624SMasahiro Yamada help 808b4ecc126SJeremy Fitzhardinge Paravirtualized spinlocks allow a pvops backend to replace the 809b4ecc126SJeremy Fitzhardinge spinlock implementation with something virtualization-friendly 810b4ecc126SJeremy Fitzhardinge (for example, block the virtual CPU rather than spinning). 811b4ecc126SJeremy Fitzhardinge 8124c4e4f61SRaghavendra K T It has a minimal impact on native kernels and gives a nice performance 8134c4e4f61SRaghavendra K T benefit on paravirtualized KVM / Xen kernels. 814b4ecc126SJeremy Fitzhardinge 8154c4e4f61SRaghavendra K T If you are unsure how to answer this question, answer Y. 816b4ecc126SJeremy Fitzhardinge 817ecca2502SZhao Yakuiconfig X86_HV_CALLBACK_VECTOR 818ecca2502SZhao Yakui def_bool n 819ecca2502SZhao Yakui 8206276a074SBorislav Petkovsource "arch/x86/xen/Kconfig" 8216276a074SBorislav Petkov 8226276a074SBorislav Petkovconfig KVM_GUEST 8236276a074SBorislav Petkov bool "KVM Guest support (including kvmclock)" 8246276a074SBorislav Petkov depends on PARAVIRT 8256276a074SBorislav Petkov select PARAVIRT_CLOCK 826a1c4423bSMarcelo Tosatti select ARCH_CPUIDLE_HALTPOLL 827b1d40575SVitaly Kuznetsov select X86_HV_CALLBACK_VECTOR 8286276a074SBorislav Petkov default y 829a7f7f624SMasahiro Yamada help 8306276a074SBorislav Petkov This option enables various optimizations for running under the KVM 8316276a074SBorislav Petkov hypervisor. It includes a paravirtualized clock, so that instead 8326276a074SBorislav Petkov of relying on a PIT (or probably other) emulation by the 8336276a074SBorislav Petkov underlying device model, the host provides the guest with 8346276a074SBorislav Petkov timing infrastructure such as time of day, and system time 8356276a074SBorislav Petkov 836a1c4423bSMarcelo Tosatticonfig ARCH_CPUIDLE_HALTPOLL 837a1c4423bSMarcelo Tosatti def_bool n 838a1c4423bSMarcelo Tosatti prompt "Disable host haltpoll when loading haltpoll driver" 839a1c4423bSMarcelo Tosatti help 840a1c4423bSMarcelo Tosatti If virtualized under KVM, disable host haltpoll. 841a1c4423bSMarcelo Tosatti 8427733607fSMaran Wilsonconfig PVH 8437733607fSMaran Wilson bool "Support for running PVH guests" 844a7f7f624SMasahiro Yamada help 8457733607fSMaran Wilson This option enables the PVH entry point for guest virtual machines 8467733607fSMaran Wilson as specified in the x86/HVM direct boot ABI. 8477733607fSMaran Wilson 8486276a074SBorislav Petkovconfig PARAVIRT_TIME_ACCOUNTING 8496276a074SBorislav Petkov bool "Paravirtual steal time accounting" 8506276a074SBorislav Petkov depends on PARAVIRT 851a7f7f624SMasahiro Yamada help 8526276a074SBorislav Petkov Select this option to enable fine granularity task steal time 8536276a074SBorislav Petkov accounting. Time spent executing other tasks in parallel with 8546276a074SBorislav Petkov the current vCPU is discounted from the vCPU power. To account for 8556276a074SBorislav Petkov that, there can be a small performance impact. 8566276a074SBorislav Petkov 8576276a074SBorislav Petkov If in doubt, say N here. 8586276a074SBorislav Petkov 8597af192c9SGerd Hoffmannconfig PARAVIRT_CLOCK 8607af192c9SGerd Hoffmann bool 8617af192c9SGerd Hoffmann 8624a362601SJan Kiszkaconfig JAILHOUSE_GUEST 8634a362601SJan Kiszka bool "Jailhouse non-root cell support" 864abde587bSArnd Bergmann depends on X86_64 && PCI 86587e65d05SJan Kiszka select X86_PM_TIMER 866a7f7f624SMasahiro Yamada help 8674a362601SJan Kiszka This option allows to run Linux as guest in a Jailhouse non-root 8684a362601SJan Kiszka cell. You can leave this option disabled if you only want to start 8694a362601SJan Kiszka Jailhouse and run Linux afterwards in the root cell. 8704a362601SJan Kiszka 871ec7972c9SZhao Yakuiconfig ACRN_GUEST 872ec7972c9SZhao Yakui bool "ACRN Guest support" 873ec7972c9SZhao Yakui depends on X86_64 874498ad393SZhao Yakui select X86_HV_CALLBACK_VECTOR 875ec7972c9SZhao Yakui help 876ec7972c9SZhao Yakui This option allows to run Linux as guest in the ACRN hypervisor. ACRN is 877ec7972c9SZhao Yakui a flexible, lightweight reference open-source hypervisor, built with 878ec7972c9SZhao Yakui real-time and safety-criticality in mind. It is built for embedded 879ec7972c9SZhao Yakui IOT with small footprint and real-time features. More details can be 880ec7972c9SZhao Yakui found in https://projectacrn.org/. 881ec7972c9SZhao Yakui 88259bd54a8SKuppuswamy Sathyanarayananconfig INTEL_TDX_GUEST 88359bd54a8SKuppuswamy Sathyanarayanan bool "Intel TDX (Trust Domain Extensions) - Guest Support" 88459bd54a8SKuppuswamy Sathyanarayanan depends on X86_64 && CPU_SUP_INTEL 88559bd54a8SKuppuswamy Sathyanarayanan depends on X86_X2APIC 88675d090fdSKirill A. Shutemov depends on EFI_STUB 8879f98a4f4SVishal Annapurve depends on PARAVIRT 88841394e33SKirill A. Shutemov select ARCH_HAS_CC_PLATFORM 889968b4931SKirill A. Shutemov select X86_MEM_ENCRYPT 89077a512e3SSean Christopherson select X86_MCE 89175d090fdSKirill A. Shutemov select UNACCEPTED_MEMORY 89259bd54a8SKuppuswamy Sathyanarayanan help 89359bd54a8SKuppuswamy Sathyanarayanan Support running as a guest under Intel TDX. Without this support, 89459bd54a8SKuppuswamy Sathyanarayanan the guest kernel can not boot or run under TDX. 89559bd54a8SKuppuswamy Sathyanarayanan TDX includes memory encryption and integrity capabilities 89659bd54a8SKuppuswamy Sathyanarayanan which protect the confidentiality and integrity of guest 89759bd54a8SKuppuswamy Sathyanarayanan memory contents and CPU state. TDX guests are protected from 89859bd54a8SKuppuswamy Sathyanarayanan some attacks from the VMM. 89959bd54a8SKuppuswamy Sathyanarayanan 9006276a074SBorislav Petkovendif # HYPERVISOR_GUEST 90197349135SJeremy Fitzhardinge 902506f1d07SSam Ravnborgsource "arch/x86/Kconfig.cpu" 903506f1d07SSam Ravnborg 904506f1d07SSam Ravnborgconfig HPET_TIMER 9053c2362e6SHarvey Harrison def_bool X86_64 906506f1d07SSam Ravnborg prompt "HPET Timer Support" if X86_32 907a7f7f624SMasahiro Yamada help 908506f1d07SSam Ravnborg Use the IA-PC HPET (High Precision Event Timer) to manage 909506f1d07SSam Ravnborg time in preference to the PIT and RTC, if a HPET is 910506f1d07SSam Ravnborg present. 911506f1d07SSam Ravnborg HPET is the next generation timer replacing legacy 8254s. 912506f1d07SSam Ravnborg The HPET provides a stable time base on SMP 913506f1d07SSam Ravnborg systems, unlike the TSC, but it is more expensive to access, 9144e7f9df2SMichael S. Tsirkin as it is off-chip. The interface used is documented 9154e7f9df2SMichael S. Tsirkin in the HPET spec, revision 1. 916506f1d07SSam Ravnborg 917506f1d07SSam Ravnborg You can safely choose Y here. However, HPET will only be 918506f1d07SSam Ravnborg activated if the platform and the BIOS support this feature. 919506f1d07SSam Ravnborg Otherwise the 8254 will be used for timing services. 920506f1d07SSam Ravnborg 921506f1d07SSam Ravnborg Choose N to continue using the legacy 8254 timer. 922506f1d07SSam Ravnborg 923506f1d07SSam Ravnborgconfig HPET_EMULATE_RTC 9243c2362e6SHarvey Harrison def_bool y 9253228e1dcSAnand K Mistry depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y) 926506f1d07SSam Ravnborg 9276a108a14SDavid Rientjes# Mark as expert because too many people got it wrong. 928506f1d07SSam Ravnborg# The code disables itself when not needed. 9297ae9392cSThomas Petazzoniconfig DMI 9307ae9392cSThomas Petazzoni default y 931cf074402SArd Biesheuvel select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 9326a108a14SDavid Rientjes bool "Enable DMI scanning" if EXPERT 933a7f7f624SMasahiro Yamada help 9347ae9392cSThomas Petazzoni Enabled scanning of DMI to identify machine quirks. Say Y 9357ae9392cSThomas Petazzoni here unless you have verified that your setup is not 9367ae9392cSThomas Petazzoni affected by entries in the DMI blacklist. Required by PNP 9377ae9392cSThomas Petazzoni BIOS code. 9387ae9392cSThomas Petazzoni 939506f1d07SSam Ravnborgconfig GART_IOMMU 94038901f1cSAndi Kleen bool "Old AMD GART IOMMU support" 941a4ce5a48SChristoph Hellwig select IOMMU_HELPER 942506f1d07SSam Ravnborg select SWIOTLB 94323ac4ae8SAndreas Herrmann depends on X86_64 && PCI && AMD_NB 944a7f7f624SMasahiro Yamada help 945ced3c42cSIngo Molnar Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron 946ced3c42cSIngo Molnar GART based hardware IOMMUs. 947ced3c42cSIngo Molnar 948ced3c42cSIngo Molnar The GART supports full DMA access for devices with 32-bit access 949ced3c42cSIngo Molnar limitations, on systems with more than 3 GB. This is usually needed 950ced3c42cSIngo Molnar for USB, sound, many IDE/SATA chipsets and some other devices. 951ced3c42cSIngo Molnar 952ced3c42cSIngo Molnar Newer systems typically have a modern AMD IOMMU, supported via 953ced3c42cSIngo Molnar the CONFIG_AMD_IOMMU=y config option. 954ced3c42cSIngo Molnar 955ced3c42cSIngo Molnar In normal configurations this driver is only active when needed: 956ced3c42cSIngo Molnar there's more than 3 GB of memory and the system contains a 957ced3c42cSIngo Molnar 32-bit limited device. 958ced3c42cSIngo Molnar 959ced3c42cSIngo Molnar If unsure, say Y. 960506f1d07SSam Ravnborg 9618b766b0fSMichal Suchanekconfig BOOT_VESA_SUPPORT 9628b766b0fSMichal Suchanek bool 9638b766b0fSMichal Suchanek help 9648b766b0fSMichal Suchanek If true, at least one selected framebuffer driver can take advantage 9658b766b0fSMichal Suchanek of VESA video modes set at an early boot stage via the vga= parameter. 9668b766b0fSMichal Suchanek 9671184dc2fSMike Travisconfig MAXSMP 968ddb0c5a6SSamuel Thibault bool "Enable Maximum number of SMP Processors and NUMA Nodes" 9696ea30386SKees Cook depends on X86_64 && SMP && DEBUG_KERNEL 97036f5101aSMike Travis select CPUMASK_OFFSTACK 971a7f7f624SMasahiro Yamada help 972ddb0c5a6SSamuel Thibault Enable maximum number of CPUS and NUMA Nodes for this architecture. 9731184dc2fSMike Travis If unsure, say N. 974506f1d07SSam Ravnborg 975aec6487eSIngo Molnar# 976aec6487eSIngo Molnar# The maximum number of CPUs supported: 977aec6487eSIngo Molnar# 978aec6487eSIngo Molnar# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT, 979aec6487eSIngo Molnar# and which can be configured interactively in the 980aec6487eSIngo Molnar# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range. 981aec6487eSIngo Molnar# 982aec6487eSIngo Molnar# The ranges are different on 32-bit and 64-bit kernels, depending on 983aec6487eSIngo Molnar# hardware capabilities and scalability features of the kernel. 984aec6487eSIngo Molnar# 985aec6487eSIngo Molnar# ( If MAXSMP is enabled we just use the highest possible value and disable 986aec6487eSIngo Molnar# interactive configuration. ) 987aec6487eSIngo Molnar# 988a0d0bb4dSRandy Dunlap 989aec6487eSIngo Molnarconfig NR_CPUS_RANGE_BEGIN 990a0d0bb4dSRandy Dunlap int 991aec6487eSIngo Molnar default NR_CPUS_RANGE_END if MAXSMP 992a0d0bb4dSRandy Dunlap default 1 if !SMP 993a0d0bb4dSRandy Dunlap default 2 994a0d0bb4dSRandy Dunlap 995aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 996a0d0bb4dSRandy Dunlap int 997a0d0bb4dSRandy Dunlap depends on X86_32 9980abf5086SArnd Bergmann default 8 if SMP 999a0d0bb4dSRandy Dunlap default 1 if !SMP 1000a0d0bb4dSRandy Dunlap 1001aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1002a0d0bb4dSRandy Dunlap int 1003a0d0bb4dSRandy Dunlap depends on X86_64 10041edae1aeSScott Wood default 8192 if SMP && CPUMASK_OFFSTACK 10051edae1aeSScott Wood default 512 if SMP && !CPUMASK_OFFSTACK 1006a0d0bb4dSRandy Dunlap default 1 if !SMP 1007aec6487eSIngo Molnar 1008aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1009aec6487eSIngo Molnar int 1010aec6487eSIngo Molnar depends on X86_32 1011aec6487eSIngo Molnar default 8 if SMP 1012aec6487eSIngo Molnar default 1 if !SMP 1013aec6487eSIngo Molnar 1014aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1015aec6487eSIngo Molnar int 1016aec6487eSIngo Molnar depends on X86_64 1017a0d0bb4dSRandy Dunlap default 8192 if MAXSMP 1018a0d0bb4dSRandy Dunlap default 64 if SMP 1019aec6487eSIngo Molnar default 1 if !SMP 1020a0d0bb4dSRandy Dunlap 1021506f1d07SSam Ravnborgconfig NR_CPUS 102236f5101aSMike Travis int "Maximum number of CPUs" if SMP && !MAXSMP 1023aec6487eSIngo Molnar range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END 1024aec6487eSIngo Molnar default NR_CPUS_DEFAULT 1025a7f7f624SMasahiro Yamada help 1026506f1d07SSam Ravnborg This allows you to specify the maximum number of CPUs which this 1027bb61ccc7SJosh Boyer kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum 1028cad14bb9SKirill A. Shutemov supported value is 8192, otherwise the maximum value is 512. The 1029506f1d07SSam Ravnborg minimum value which makes sense is 2. 1030506f1d07SSam Ravnborg 1031aec6487eSIngo Molnar This is purely to save memory: each supported CPU adds about 8KB 1032aec6487eSIngo Molnar to the kernel image. 1033506f1d07SSam Ravnborg 103466558b73STim Chenconfig SCHED_CLUSTER 103566558b73STim Chen bool "Cluster scheduler support" 103666558b73STim Chen depends on SMP 103766558b73STim Chen default y 103866558b73STim Chen help 103966558b73STim Chen Cluster scheduler support improves the CPU scheduler's decision 104066558b73STim Chen making when dealing with machines that have clusters of CPUs. 104166558b73STim Chen Cluster usually means a couple of CPUs which are placed closely 104266558b73STim Chen by sharing mid-level caches, last-level cache tags or internal 104366558b73STim Chen busses. 104466558b73STim Chen 1045506f1d07SSam Ravnborgconfig SCHED_SMT 1046dbe73364SThomas Gleixner def_bool y if SMP 1047506f1d07SSam Ravnborg 1048506f1d07SSam Ravnborgconfig SCHED_MC 10493c2362e6SHarvey Harrison def_bool y 10503c2362e6SHarvey Harrison prompt "Multi-core scheduler support" 1051c8e56d20SBorislav Petkov depends on SMP 1052a7f7f624SMasahiro Yamada help 1053506f1d07SSam Ravnborg Multi-core scheduler support improves the CPU scheduler's decision 1054506f1d07SSam Ravnborg making when dealing with multi-core CPU chips at a cost of slightly 1055506f1d07SSam Ravnborg increased overhead in some places. If unsure say N here. 1056506f1d07SSam Ravnborg 1057de966cf4STim Chenconfig SCHED_MC_PRIO 1058de966cf4STim Chen bool "CPU core priorities scheduler support" 10593598e577SMeng Li depends on SCHED_MC 10603598e577SMeng Li select X86_INTEL_PSTATE if CPU_SUP_INTEL 10613598e577SMeng Li select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI 10620a21fc12SIngo Molnar select CPU_FREQ 1063de966cf4STim Chen default y 1064a7f7f624SMasahiro Yamada help 1065de966cf4STim Chen Intel Turbo Boost Max Technology 3.0 enabled CPUs have a 1066de966cf4STim Chen core ordering determined at manufacturing time, which allows 1067de966cf4STim Chen certain cores to reach higher turbo frequencies (when running 1068de966cf4STim Chen single threaded workloads) than others. 1069de966cf4STim Chen 1070de966cf4STim Chen Enabling this kernel feature teaches the scheduler about 1071de966cf4STim Chen the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the 1072de966cf4STim Chen scheduler's CPU selection logic accordingly, so that higher 1073de966cf4STim Chen overall system performance can be achieved. 1074de966cf4STim Chen 1075de966cf4STim Chen This feature will have no effect on CPUs without this feature. 1076de966cf4STim Chen 1077de966cf4STim Chen If unsure say Y here. 10785e76b2abSTim Chen 107930b8b006SThomas Gleixnerconfig UP_LATE_INIT 108030b8b006SThomas Gleixner def_bool y 1081ba360f88SThomas Gleixner depends on !SMP && X86_LOCAL_APIC 108230b8b006SThomas Gleixner 1083506f1d07SSam Ravnborgconfig X86_UP_APIC 108450849eefSJan Beulich bool "Local APIC support on uniprocessors" if !PCI_MSI 108550849eefSJan Beulich default PCI_MSI 1086dcbb01fbSArnd Bergmann depends on X86_32 && !SMP 1087a7f7f624SMasahiro Yamada help 1088506f1d07SSam Ravnborg A local APIC (Advanced Programmable Interrupt Controller) is an 1089506f1d07SSam Ravnborg integrated interrupt controller in the CPU. If you have a single-CPU 1090506f1d07SSam Ravnborg system which has a processor with a local APIC, you can say Y here to 1091506f1d07SSam Ravnborg enable and use it. If you say Y here even though your machine doesn't 1092506f1d07SSam Ravnborg have a local APIC, then the kernel will still run with no slowdown at 1093506f1d07SSam Ravnborg all. The local APIC supports CPU-generated self-interrupts (timer, 1094506f1d07SSam Ravnborg performance counters), and the NMI watchdog which detects hard 1095506f1d07SSam Ravnborg lockups. 1096506f1d07SSam Ravnborg 1097506f1d07SSam Ravnborgconfig X86_UP_IOAPIC 1098506f1d07SSam Ravnborg bool "IO-APIC support on uniprocessors" 1099506f1d07SSam Ravnborg depends on X86_UP_APIC 1100a7f7f624SMasahiro Yamada help 1101506f1d07SSam Ravnborg An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an 1102506f1d07SSam Ravnborg SMP-capable replacement for PC-style interrupt controllers. Most 1103506f1d07SSam Ravnborg SMP systems and many recent uniprocessor systems have one. 1104506f1d07SSam Ravnborg 1105506f1d07SSam Ravnborg If you have a single-CPU system with an IO-APIC, you can say Y here 1106506f1d07SSam Ravnborg to use it. If you say Y here even though your machine doesn't have 1107506f1d07SSam Ravnborg an IO-APIC, then the kernel will still run with no slowdown at all. 1108506f1d07SSam Ravnborg 1109506f1d07SSam Ravnborgconfig X86_LOCAL_APIC 11103c2362e6SHarvey Harrison def_bool y 1111dcbb01fbSArnd Bergmann depends on X86_64 || SMP || X86_UP_APIC || PCI_MSI 1112b5dc8e6cSJiang Liu select IRQ_DOMAIN_HIERARCHY 1113506f1d07SSam Ravnborg 11142b5e22afSKirill A. Shutemovconfig ACPI_MADT_WAKEUP 11152b5e22afSKirill A. Shutemov def_bool y 11162b5e22afSKirill A. Shutemov depends on X86_64 11172b5e22afSKirill A. Shutemov depends on ACPI 11182b5e22afSKirill A. Shutemov depends on SMP 11192b5e22afSKirill A. Shutemov depends on X86_LOCAL_APIC 11202b5e22afSKirill A. Shutemov 1121506f1d07SSam Ravnborgconfig X86_IO_APIC 1122b1da1e71SJan Beulich def_bool y 1123b1da1e71SJan Beulich depends on X86_LOCAL_APIC || X86_UP_IOAPIC 1124506f1d07SSam Ravnborg 112541b9eb26SStefan Assmannconfig X86_REROUTE_FOR_BROKEN_BOOT_IRQS 112641b9eb26SStefan Assmann bool "Reroute for broken boot IRQs" 112741b9eb26SStefan Assmann depends on X86_IO_APIC 1128a7f7f624SMasahiro Yamada help 112941b9eb26SStefan Assmann This option enables a workaround that fixes a source of 113041b9eb26SStefan Assmann spurious interrupts. This is recommended when threaded 113141b9eb26SStefan Assmann interrupt handling is used on systems where the generation of 113241b9eb26SStefan Assmann superfluous "boot interrupts" cannot be disabled. 113341b9eb26SStefan Assmann 113441b9eb26SStefan Assmann Some chipsets generate a legacy INTx "boot IRQ" when the IRQ 113541b9eb26SStefan Assmann entry in the chipset's IO-APIC is masked (as, e.g. the RT 113641b9eb26SStefan Assmann kernel does during interrupt handling). On chipsets where this 113741b9eb26SStefan Assmann boot IRQ generation cannot be disabled, this workaround keeps 113841b9eb26SStefan Assmann the original IRQ line masked so that only the equivalent "boot 113941b9eb26SStefan Assmann IRQ" is delivered to the CPUs. The workaround also tells the 114041b9eb26SStefan Assmann kernel to set up the IRQ handler on the boot IRQ line. In this 114141b9eb26SStefan Assmann way only one interrupt is delivered to the kernel. Otherwise 114241b9eb26SStefan Assmann the spurious second interrupt may cause the kernel to bring 114341b9eb26SStefan Assmann down (vital) interrupt lines. 114441b9eb26SStefan Assmann 114541b9eb26SStefan Assmann Only affects "broken" chipsets. Interrupt sharing may be 114641b9eb26SStefan Assmann increased on these systems. 114741b9eb26SStefan Assmann 1148506f1d07SSam Ravnborgconfig X86_MCE 1149bab9bc65SAndi Kleen bool "Machine Check / overheating reporting" 1150648ed940SChen, Gong select GENERIC_ALLOCATOR 1151e57dbaf7SBorislav Petkov default y 1152a7f7f624SMasahiro Yamada help 1153bab9bc65SAndi Kleen Machine Check support allows the processor to notify the 1154bab9bc65SAndi Kleen kernel if it detects a problem (e.g. overheating, data corruption). 1155506f1d07SSam Ravnborg The action the kernel takes depends on the severity of the problem, 1156bab9bc65SAndi Kleen ranging from warning messages to halting the machine. 11574efc0670SAndi Kleen 11585de97c9fSTony Luckconfig X86_MCELOG_LEGACY 11595de97c9fSTony Luck bool "Support for deprecated /dev/mcelog character device" 11605de97c9fSTony Luck depends on X86_MCE 1161a7f7f624SMasahiro Yamada help 11625de97c9fSTony Luck Enable support for /dev/mcelog which is needed by the old mcelog 11635de97c9fSTony Luck userspace logging daemon. Consider switching to the new generation 11645de97c9fSTony Luck rasdaemon solution. 11655de97c9fSTony Luck 1166506f1d07SSam Ravnborgconfig X86_MCE_INTEL 11673c2362e6SHarvey Harrison def_bool y 11683c2362e6SHarvey Harrison prompt "Intel MCE features" 1169c1ebf835SAndi Kleen depends on X86_MCE && X86_LOCAL_APIC 1170a7f7f624SMasahiro Yamada help 1171506f1d07SSam Ravnborg Additional support for intel specific MCE features such as 1172506f1d07SSam Ravnborg the thermal monitor. 1173506f1d07SSam Ravnborg 1174506f1d07SSam Ravnborgconfig X86_MCE_AMD 11753c2362e6SHarvey Harrison def_bool y 11763c2362e6SHarvey Harrison prompt "AMD MCE features" 1177d35fb312SYazen Ghannam depends on X86_MCE && X86_LOCAL_APIC 1178a7f7f624SMasahiro Yamada help 1179506f1d07SSam Ravnborg Additional support for AMD specific MCE features such as 1180506f1d07SSam Ravnborg the DRAM Error Threshold. 1181506f1d07SSam Ravnborg 11824efc0670SAndi Kleenconfig X86_ANCIENT_MCE 11836fc108a0SJan Beulich bool "Support for old Pentium 5 / WinChip machine checks" 1184c31d9633SAndi Kleen depends on X86_32 && X86_MCE 1185a7f7f624SMasahiro Yamada help 11864efc0670SAndi Kleen Include support for machine check handling on old Pentium 5 or WinChip 11875065a706SMasanari Iida systems. These typically need to be enabled explicitly on the command 11884efc0670SAndi Kleen line. 11894efc0670SAndi Kleen 1190b2762686SAndi Kleenconfig X86_MCE_THRESHOLD 1191b2762686SAndi Kleen depends on X86_MCE_AMD || X86_MCE_INTEL 11926fc108a0SJan Beulich def_bool y 1193b2762686SAndi Kleen 1194ea149b36SAndi Kleenconfig X86_MCE_INJECT 1195bc8e80d5SBorislav Petkov depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS 1196ea149b36SAndi Kleen tristate "Machine check injector support" 1197a7f7f624SMasahiro Yamada help 1198ea149b36SAndi Kleen Provide support for injecting machine checks for testing purposes. 1199ea149b36SAndi Kleen If you don't know what a machine check is and you don't do kernel 1200ea149b36SAndi Kleen QA it is safe to say n. 1201ea149b36SAndi Kleen 120207dc900eSPeter Zijlstrasource "arch/x86/events/Kconfig" 1203e633c65aSKan Liang 12045aef51c3SAndy Lutomirskiconfig X86_LEGACY_VM86 12051e642812SIngo Molnar bool "Legacy VM86 support" 1206506f1d07SSam Ravnborg depends on X86_32 1207a7f7f624SMasahiro Yamada help 12085aef51c3SAndy Lutomirski This option allows user programs to put the CPU into V8086 12095aef51c3SAndy Lutomirski mode, which is an 80286-era approximation of 16-bit real mode. 12105aef51c3SAndy Lutomirski 12115aef51c3SAndy Lutomirski Some very old versions of X and/or vbetool require this option 12125aef51c3SAndy Lutomirski for user mode setting. Similarly, DOSEMU will use it if 12135aef51c3SAndy Lutomirski available to accelerate real mode DOS programs. However, any 12145aef51c3SAndy Lutomirski recent version of DOSEMU, X, or vbetool should be fully 12155aef51c3SAndy Lutomirski functional even without kernel VM86 support, as they will all 12161e642812SIngo Molnar fall back to software emulation. Nevertheless, if you are using 12171e642812SIngo Molnar a 16-bit DOS program where 16-bit performance matters, vm86 12181e642812SIngo Molnar mode might be faster than emulation and you might want to 12191e642812SIngo Molnar enable this option. 12205aef51c3SAndy Lutomirski 12211e642812SIngo Molnar Note that any app that works on a 64-bit kernel is unlikely to 12221e642812SIngo Molnar need this option, as 64-bit kernels don't, and can't, support 12231e642812SIngo Molnar V8086 mode. This option is also unrelated to 16-bit protected 12241e642812SIngo Molnar mode and is not needed to run most 16-bit programs under Wine. 12255aef51c3SAndy Lutomirski 12261e642812SIngo Molnar Enabling this option increases the complexity of the kernel 12271e642812SIngo Molnar and slows down exception handling a tiny bit. 12285aef51c3SAndy Lutomirski 12291e642812SIngo Molnar If unsure, say N here. 12305aef51c3SAndy Lutomirski 12315aef51c3SAndy Lutomirskiconfig VM86 12325aef51c3SAndy Lutomirski bool 12335aef51c3SAndy Lutomirski default X86_LEGACY_VM86 123434273f41SH. Peter Anvin 123534273f41SH. Peter Anvinconfig X86_16BIT 123634273f41SH. Peter Anvin bool "Enable support for 16-bit segments" if EXPERT 123734273f41SH. Peter Anvin default y 1238a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 1239a7f7f624SMasahiro Yamada help 124034273f41SH. Peter Anvin This option is required by programs like Wine to run 16-bit 124134273f41SH. Peter Anvin protected mode legacy code on x86 processors. Disabling 124234273f41SH. Peter Anvin this option saves about 300 bytes on i386, or around 6K text 124334273f41SH. Peter Anvin plus 16K runtime memory on x86-64, 124434273f41SH. Peter Anvin 124534273f41SH. Peter Anvinconfig X86_ESPFIX32 124634273f41SH. Peter Anvin def_bool y 124734273f41SH. Peter Anvin depends on X86_16BIT && X86_32 1248506f1d07SSam Ravnborg 1249197725deSH. Peter Anvinconfig X86_ESPFIX64 1250197725deSH. Peter Anvin def_bool y 125134273f41SH. Peter Anvin depends on X86_16BIT && X86_64 1252506f1d07SSam Ravnborg 12531ad83c85SAndy Lutomirskiconfig X86_VSYSCALL_EMULATION 12541ad83c85SAndy Lutomirski bool "Enable vsyscall emulation" if EXPERT 12551ad83c85SAndy Lutomirski default y 12561ad83c85SAndy Lutomirski depends on X86_64 1257a7f7f624SMasahiro Yamada help 12581ad83c85SAndy Lutomirski This enables emulation of the legacy vsyscall page. Disabling 12591ad83c85SAndy Lutomirski it is roughly equivalent to booting with vsyscall=none, except 12601ad83c85SAndy Lutomirski that it will also disable the helpful warning if a program 12611ad83c85SAndy Lutomirski tries to use a vsyscall. With this option set to N, offending 12621ad83c85SAndy Lutomirski programs will just segfault, citing addresses of the form 12631ad83c85SAndy Lutomirski 0xffffffffff600?00. 12641ad83c85SAndy Lutomirski 12651ad83c85SAndy Lutomirski This option is required by many programs built before 2013, and 12661ad83c85SAndy Lutomirski care should be used even with newer programs if set to N. 12671ad83c85SAndy Lutomirski 12681ad83c85SAndy Lutomirski Disabling this option saves about 7K of kernel size and 12691ad83c85SAndy Lutomirski possibly 4K of additional runtime pagetable memory. 12701ad83c85SAndy Lutomirski 1271111e7b15SThomas Gleixnerconfig X86_IOPL_IOPERM 1272111e7b15SThomas Gleixner bool "IOPERM and IOPL Emulation" 1273a24ca997SThomas Gleixner default y 1274a7f7f624SMasahiro Yamada help 1275111e7b15SThomas Gleixner This enables the ioperm() and iopl() syscalls which are necessary 1276111e7b15SThomas Gleixner for legacy applications. 1277111e7b15SThomas Gleixner 1278c8137aceSThomas Gleixner Legacy IOPL support is an overbroad mechanism which allows user 1279c8137aceSThomas Gleixner space aside of accessing all 65536 I/O ports also to disable 1280c8137aceSThomas Gleixner interrupts. To gain this access the caller needs CAP_SYS_RAWIO 1281c8137aceSThomas Gleixner capabilities and permission from potentially active security 1282c8137aceSThomas Gleixner modules. 1283c8137aceSThomas Gleixner 1284c8137aceSThomas Gleixner The emulation restricts the functionality of the syscall to 1285c8137aceSThomas Gleixner only allowing the full range I/O port access, but prevents the 1286a24ca997SThomas Gleixner ability to disable interrupts from user space which would be 1287a24ca997SThomas Gleixner granted if the hardware IOPL mechanism would be used. 1288c8137aceSThomas Gleixner 1289506f1d07SSam Ravnborgconfig TOSHIBA 1290506f1d07SSam Ravnborg tristate "Toshiba Laptop support" 1291506f1d07SSam Ravnborg depends on X86_32 1292a7f7f624SMasahiro Yamada help 1293506f1d07SSam Ravnborg This adds a driver to safely access the System Management Mode of 1294506f1d07SSam Ravnborg the CPU on Toshiba portables with a genuine Toshiba BIOS. It does 1295506f1d07SSam Ravnborg not work on models with a Phoenix BIOS. The System Management Mode 1296506f1d07SSam Ravnborg is used to set the BIOS and power saving options on Toshiba portables. 1297506f1d07SSam Ravnborg 1298506f1d07SSam Ravnborg For information on utilities to make use of this driver see the 1299506f1d07SSam Ravnborg Toshiba Linux utilities web site at: 1300506f1d07SSam Ravnborg <http://www.buzzard.org.uk/toshiba/>. 1301506f1d07SSam Ravnborg 1302506f1d07SSam Ravnborg Say Y if you intend to run this kernel on a Toshiba portable. 1303506f1d07SSam Ravnborg Say N otherwise. 1304506f1d07SSam Ravnborg 1305506f1d07SSam Ravnborgconfig X86_REBOOTFIXUPS 13069ba16087SJan Beulich bool "Enable X86 board specific fixups for reboot" 13079ba16087SJan Beulich depends on X86_32 1308a7f7f624SMasahiro Yamada help 1309506f1d07SSam Ravnborg This enables chipset and/or board specific fixups to be done 1310506f1d07SSam Ravnborg in order to get reboot to work correctly. This is only needed on 1311506f1d07SSam Ravnborg some combinations of hardware and BIOS. The symptom, for which 1312506f1d07SSam Ravnborg this config is intended, is when reboot ends with a stalled/hung 1313506f1d07SSam Ravnborg system. 1314506f1d07SSam Ravnborg 1315506f1d07SSam Ravnborg Currently, the only fixup is for the Geode machines using 13165e3a77e9SFlorian Fainelli CS5530A and CS5536 chipsets and the RDC R-321x SoC. 1317506f1d07SSam Ravnborg 1318506f1d07SSam Ravnborg Say Y if you want to enable the fixup. Currently, it's safe to 1319506f1d07SSam Ravnborg enable this option even if you don't need it. 1320506f1d07SSam Ravnborg Say N otherwise. 1321506f1d07SSam Ravnborg 1322506f1d07SSam Ravnborgconfig MICROCODE 1323e6bcfdd7SThomas Gleixner def_bool y 132480030e3dSBorislav Petkov depends on CPU_SUP_AMD || CPU_SUP_INTEL 132550cef76dSBorislav Petkov (AMD) select CRYPTO_LIB_SHA256 if CPU_SUP_AMD 132680cc9f10SPeter Oruba 1327fdbd4381SThomas Gleixnerconfig MICROCODE_INITRD32 1328fdbd4381SThomas Gleixner def_bool y 1329fdbd4381SThomas Gleixner depends on MICROCODE && X86_32 && BLK_DEV_INITRD 1330fdbd4381SThomas Gleixner 1331a77a94f8SBorislav Petkovconfig MICROCODE_LATE_LOADING 1332a77a94f8SBorislav Petkov bool "Late microcode loading (DANGEROUS)" 1333c02f48e0SBorislav Petkov default n 1334634ac23aSThomas Gleixner depends on MICROCODE && SMP 1335a7f7f624SMasahiro Yamada help 1336a77a94f8SBorislav Petkov Loading microcode late, when the system is up and executing instructions 1337a77a94f8SBorislav Petkov is a tricky business and should be avoided if possible. Just the sequence 1338a77a94f8SBorislav Petkov of synchronizing all cores and SMT threads is one fragile dance which does 1339a77a94f8SBorislav Petkov not guarantee that cores might not softlock after the loading. Therefore, 13409407bda8SThomas Gleixner use this at your own risk. Late loading taints the kernel unless the 13419407bda8SThomas Gleixner microcode header indicates that it is safe for late loading via the 13429407bda8SThomas Gleixner minimal revision check. This minimal revision check can be enforced on 13439407bda8SThomas Gleixner the kernel command line with "microcode.minrev=Y". 13449407bda8SThomas Gleixner 13459407bda8SThomas Gleixnerconfig MICROCODE_LATE_FORCE_MINREV 13469407bda8SThomas Gleixner bool "Enforce late microcode loading minimal revision check" 13479407bda8SThomas Gleixner default n 13489407bda8SThomas Gleixner depends on MICROCODE_LATE_LOADING 13499407bda8SThomas Gleixner help 13509407bda8SThomas Gleixner To prevent that users load microcode late which modifies already 13519407bda8SThomas Gleixner in use features, newer microcode patches have a minimum revision field 13529407bda8SThomas Gleixner in the microcode header, which tells the kernel which minimum 13539407bda8SThomas Gleixner revision must be active in the CPU to safely load that new microcode 13549407bda8SThomas Gleixner late into the running system. If disabled the check will not 13559407bda8SThomas Gleixner be enforced but the kernel will be tainted when the minimal 13569407bda8SThomas Gleixner revision check fails. 13579407bda8SThomas Gleixner 13589407bda8SThomas Gleixner This minimal revision check can also be controlled via the 13599407bda8SThomas Gleixner "microcode.minrev" parameter on the kernel command line. 13609407bda8SThomas Gleixner 13619407bda8SThomas Gleixner If unsure say Y. 1362506f1d07SSam Ravnborg 1363506f1d07SSam Ravnborgconfig X86_MSR 1364506f1d07SSam Ravnborg tristate "/dev/cpu/*/msr - Model-specific register support" 1365a7f7f624SMasahiro Yamada help 1366506f1d07SSam Ravnborg This device gives privileged processes access to the x86 1367506f1d07SSam Ravnborg Model-Specific Registers (MSRs). It is a character device with 1368506f1d07SSam Ravnborg major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr. 1369506f1d07SSam Ravnborg MSR accesses are directed to a specific CPU on multi-processor 1370506f1d07SSam Ravnborg systems. 1371506f1d07SSam Ravnborg 1372506f1d07SSam Ravnborgconfig X86_CPUID 1373506f1d07SSam Ravnborg tristate "/dev/cpu/*/cpuid - CPU information support" 1374a7f7f624SMasahiro Yamada help 1375506f1d07SSam Ravnborg This device gives processes access to the x86 CPUID instruction to 1376506f1d07SSam Ravnborg be executed on a specific processor. It is a character device 1377506f1d07SSam Ravnborg with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to 1378506f1d07SSam Ravnborg /dev/cpu/31/cpuid. 1379506f1d07SSam Ravnborg 1380bbeb69ceSArnd Bergmannconfig HIGHMEM4G 1381bbeb69ceSArnd Bergmann bool "High Memory Support" 1382506f1d07SSam Ravnborg depends on X86_32 1383a7f7f624SMasahiro Yamada help 1384bbeb69ceSArnd Bergmann Linux can use up to 4 Gigabytes of physical memory on x86 systems. 1385506f1d07SSam Ravnborg However, the address space of 32-bit x86 processors is only 4 1386506f1d07SSam Ravnborg Gigabytes large. That means that, if you have a large amount of 1387506f1d07SSam Ravnborg physical memory, not all of it can be "permanently mapped" by the 1388506f1d07SSam Ravnborg kernel. The physical memory that's not permanently mapped is called 1389506f1d07SSam Ravnborg "high memory". 1390506f1d07SSam Ravnborg 1391506f1d07SSam Ravnborg If you are compiling a kernel which will never run on a machine with 1392506f1d07SSam Ravnborg more than 1 Gigabyte total physical RAM, answer "off" here (default 1393506f1d07SSam Ravnborg choice and suitable for most users). This will result in a "3GB/1GB" 1394506f1d07SSam Ravnborg split: 3GB are mapped so that each process sees a 3GB virtual memory 1395506f1d07SSam Ravnborg space and the remaining part of the 4GB virtual memory space is used 1396506f1d07SSam Ravnborg by the kernel to permanently map as much physical memory as 1397506f1d07SSam Ravnborg possible. 1398506f1d07SSam Ravnborg 1399506f1d07SSam Ravnborg If the machine has between 1 and 4 Gigabytes physical RAM, then 1400bbeb69ceSArnd Bergmann answer "Y" here. 1401506f1d07SSam Ravnborg 1402bbeb69ceSArnd Bergmann If unsure, say N. 1403506f1d07SSam Ravnborg 1404506f1d07SSam Ravnborgchoice 14056a108a14SDavid Rientjes prompt "Memory split" if EXPERT 1406506f1d07SSam Ravnborg default VMSPLIT_3G 1407506f1d07SSam Ravnborg depends on X86_32 1408a7f7f624SMasahiro Yamada help 1409506f1d07SSam Ravnborg Select the desired split between kernel and user memory. 1410506f1d07SSam Ravnborg 1411506f1d07SSam Ravnborg If the address range available to the kernel is less than the 1412506f1d07SSam Ravnborg physical memory installed, the remaining memory will be available 1413506f1d07SSam Ravnborg as "high memory". Accessing high memory is a little more costly 1414506f1d07SSam Ravnborg than low memory, as it needs to be mapped into the kernel first. 1415506f1d07SSam Ravnborg Note that increasing the kernel address space limits the range 1416506f1d07SSam Ravnborg available to user programs, making the address space there 1417506f1d07SSam Ravnborg tighter. Selecting anything other than the default 3G/1G split 1418506f1d07SSam Ravnborg will also likely make your kernel incompatible with binary-only 1419506f1d07SSam Ravnborg kernel modules. 1420506f1d07SSam Ravnborg 1421506f1d07SSam Ravnborg If you are not absolutely sure what you are doing, leave this 1422506f1d07SSam Ravnborg option alone! 1423506f1d07SSam Ravnborg 1424506f1d07SSam Ravnborg config VMSPLIT_3G 1425506f1d07SSam Ravnborg bool "3G/1G user/kernel split" 1426506f1d07SSam Ravnborg config VMSPLIT_3G_OPT 1427506f1d07SSam Ravnborg depends on !X86_PAE 1428506f1d07SSam Ravnborg bool "3G/1G user/kernel split (for full 1G low memory)" 1429506f1d07SSam Ravnborg config VMSPLIT_2G 1430506f1d07SSam Ravnborg bool "2G/2G user/kernel split" 1431506f1d07SSam Ravnborg config VMSPLIT_2G_OPT 1432506f1d07SSam Ravnborg depends on !X86_PAE 1433506f1d07SSam Ravnborg bool "2G/2G user/kernel split (for full 2G low memory)" 1434506f1d07SSam Ravnborg config VMSPLIT_1G 1435506f1d07SSam Ravnborg bool "1G/3G user/kernel split" 1436506f1d07SSam Ravnborgendchoice 1437506f1d07SSam Ravnborg 1438506f1d07SSam Ravnborgconfig PAGE_OFFSET 1439506f1d07SSam Ravnborg hex 1440506f1d07SSam Ravnborg default 0xB0000000 if VMSPLIT_3G_OPT 1441506f1d07SSam Ravnborg default 0x80000000 if VMSPLIT_2G 1442506f1d07SSam Ravnborg default 0x78000000 if VMSPLIT_2G_OPT 1443506f1d07SSam Ravnborg default 0x40000000 if VMSPLIT_1G 1444506f1d07SSam Ravnborg default 0xC0000000 1445506f1d07SSam Ravnborg depends on X86_32 1446506f1d07SSam Ravnborg 1447506f1d07SSam Ravnborgconfig HIGHMEM 1448bbeb69ceSArnd Bergmann def_bool HIGHMEM4G 1449506f1d07SSam Ravnborg 1450506f1d07SSam Ravnborgconfig X86_PAE 14519ba16087SJan Beulich bool "PAE (Physical Address Extension) Support" 145288a2b4edSArnd Bergmann depends on X86_32 && X86_HAVE_PAE 1453d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 1454a7f7f624SMasahiro Yamada help 1455506f1d07SSam Ravnborg PAE is required for NX support, and furthermore enables 1456506f1d07SSam Ravnborg larger swapspace support for non-overcommit purposes. It 1457506f1d07SSam Ravnborg has the cost of more pagetable lookup overhead, and also 1458506f1d07SSam Ravnborg consumes more pagetable space per process. 1459506f1d07SSam Ravnborg 146010971ab2SIngo Molnarconfig X86_DIRECT_GBPAGES 1461e5008abeSLuis R. Rodriguez def_bool y 14622e1da13fSVlastimil Babka depends on X86_64 1463a7f7f624SMasahiro Yamada help 146410971ab2SIngo Molnar Certain kernel features effectively disable kernel 146510971ab2SIngo Molnar linear 1 GB mappings (even if the CPU otherwise 146610971ab2SIngo Molnar supports them), so don't confuse the user by printing 146710971ab2SIngo Molnar that we have them enabled. 14689e899816SNick Piggin 14695c280cf6SThomas Gleixnerconfig X86_CPA_STATISTICS 14705c280cf6SThomas Gleixner bool "Enable statistic for Change Page Attribute" 14715c280cf6SThomas Gleixner depends on DEBUG_FS 1472a7f7f624SMasahiro Yamada help 1473b75baaf3SIngo Molnar Expose statistics about the Change Page Attribute mechanism, which 1474a943245aSColin Ian King helps to determine the effectiveness of preserving large and huge 14755c280cf6SThomas Gleixner page mappings when mapping protections are changed. 14765c280cf6SThomas Gleixner 147720f07a04SKirill A. Shutemovconfig X86_MEM_ENCRYPT 147820f07a04SKirill A. Shutemov select ARCH_HAS_FORCE_DMA_UNENCRYPTED 147920f07a04SKirill A. Shutemov select DYNAMIC_PHYSICAL_MASK 148020f07a04SKirill A. Shutemov def_bool n 148120f07a04SKirill A. Shutemov 14827744ccdbSTom Lendackyconfig AMD_MEM_ENCRYPT 14837744ccdbSTom Lendacky bool "AMD Secure Memory Encryption (SME) support" 14847744ccdbSTom Lendacky depends on X86_64 && CPU_SUP_AMD 14856c321179STom Lendacky depends on EFI_STUB 148682fef0adSDavid Rientjes select DMA_COHERENT_POOL 1487ce9084baSArd Biesheuvel select ARCH_USE_MEMREMAP_PROT 1488597cfe48SJoerg Roedel select INSTRUCTION_DECODER 1489aa5a4611STom Lendacky select ARCH_HAS_CC_PLATFORM 149020f07a04SKirill A. Shutemov select X86_MEM_ENCRYPT 14916c321179STom Lendacky select UNACCEPTED_MEMORY 1492c5529418SNikunj A Dadhania select CRYPTO_LIB_AESGCM 1493a7f7f624SMasahiro Yamada help 14947744ccdbSTom Lendacky Say yes to enable support for the encryption of system memory. 14957744ccdbSTom Lendacky This requires an AMD processor that supports Secure Memory 14967744ccdbSTom Lendacky Encryption (SME). 14977744ccdbSTom Lendacky 1498506f1d07SSam Ravnborg# Common NUMA Features 1499506f1d07SSam Ravnborgconfig NUMA 1500e133f6eaSRandy Dunlap bool "NUMA Memory Allocation and Scheduler Support" 1501506f1d07SSam Ravnborg depends on SMP 15020abf5086SArnd Bergmann depends on X86_64 15037ecd19cfSKefeng Wang select USE_PERCPU_NUMA_NODE_ID 15040c436a58SSaurabh Sengar select OF_NUMA if OF 1505a7f7f624SMasahiro Yamada help 1506e133f6eaSRandy Dunlap Enable NUMA (Non-Uniform Memory Access) support. 1507fd51b2d7SKOSAKI Motohiro 1508506f1d07SSam Ravnborg The kernel will try to allocate memory used by a CPU on the 1509506f1d07SSam Ravnborg local memory controller of the CPU and add some more 1510506f1d07SSam Ravnborg NUMA awareness to the kernel. 1511506f1d07SSam Ravnborg 1512c280ea5eSIngo Molnar For 64-bit this is recommended if the system is Intel Core i7 1513fd51b2d7SKOSAKI Motohiro (or later), AMD Opteron, or EM64T NUMA. 1514fd51b2d7SKOSAKI Motohiro 1515fd51b2d7SKOSAKI Motohiro Otherwise, you should say N. 1516506f1d07SSam Ravnborg 1517eec1d4faSHans Rosenfeldconfig AMD_NUMA 15183c2362e6SHarvey Harrison def_bool y 15193c2362e6SHarvey Harrison prompt "Old style AMD Opteron NUMA detection" 15205da0ef9aSTejun Heo depends on X86_64 && NUMA && PCI 1521a7f7f624SMasahiro Yamada help 1522eec1d4faSHans Rosenfeld Enable AMD NUMA node topology detection. You should say Y here if 1523eec1d4faSHans Rosenfeld you have a multi processor AMD system. This uses an old method to 1524eec1d4faSHans Rosenfeld read the NUMA configuration directly from the builtin Northbridge 1525eec1d4faSHans Rosenfeld of Opteron. It is recommended to use X86_64_ACPI_NUMA instead, 1526eec1d4faSHans Rosenfeld which also takes priority if both are compiled in. 1527506f1d07SSam Ravnborg 1528506f1d07SSam Ravnborgconfig X86_64_ACPI_NUMA 15293c2362e6SHarvey Harrison def_bool y 15303c2362e6SHarvey Harrison prompt "ACPI NUMA detection" 1531506f1d07SSam Ravnborg depends on X86_64 && NUMA && ACPI && PCI 1532506f1d07SSam Ravnborg select ACPI_NUMA 1533a7f7f624SMasahiro Yamada help 1534506f1d07SSam Ravnborg Enable ACPI SRAT based node topology detection. 1535506f1d07SSam Ravnborg 1536506f1d07SSam Ravnborgconfig NODES_SHIFT 1537d25e26b6SLinus Torvalds int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP 153851591e31SDavid Rientjes range 1 10 153951591e31SDavid Rientjes default "10" if MAXSMP 1540506f1d07SSam Ravnborg default "6" if X86_64 1541506f1d07SSam Ravnborg default "3" 1542a9ee6cf5SMike Rapoport depends on NUMA 1543a7f7f624SMasahiro Yamada help 15441184dc2fSMike Travis Specify the maximum number of NUMA Nodes available on the target 1545692105b8SMatt LaPlante system. Increases memory reserved to accommodate various tables. 1546506f1d07SSam Ravnborg 1547506f1d07SSam Ravnborgconfig ARCH_FLATMEM_ENABLE 1548506f1d07SSam Ravnborg def_bool y 15493b16651fSTejun Heo depends on X86_32 && !NUMA 1550506f1d07SSam Ravnborg 1551506f1d07SSam Ravnborgconfig ARCH_SPARSEMEM_ENABLE 1552506f1d07SSam Ravnborg def_bool y 1553506f1d07SSam Ravnborg select SPARSEMEM_STATIC if X86_32 1554506f1d07SSam Ravnborg select SPARSEMEM_VMEMMAP_ENABLE if X86_64 1555cba5d9b3SKirill A. Shutemov select SPARSEMEM_VMEMMAP if X86_64 1556506f1d07SSam Ravnborg 15573b16651fSTejun Heoconfig ARCH_SPARSEMEM_DEFAULT 15586ad57f7fSMike Rapoport def_bool X86_64 || (NUMA && X86_32) 15593b16651fSTejun Heo 1560506f1d07SSam Ravnborgconfig ARCH_SELECT_MEMORY_MODEL 1561506f1d07SSam Ravnborg def_bool y 15624eda2bc3SDavid Hildenbrand depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE 1563506f1d07SSam Ravnborg 1564506f1d07SSam Ravnborgconfig ARCH_MEMORY_PROBE 1565a0842b70SToshi Kani bool "Enable sysfs memory/probe interface" 15665c11f00bSDavid Hildenbrand depends on MEMORY_HOTPLUG 1567a0842b70SToshi Kani help 1568a0842b70SToshi Kani This option enables a sysfs memory/probe interface for testing. 1569cb1aaebeSMauro Carvalho Chehab See Documentation/admin-guide/mm/memory-hotplug.rst for more information. 1570a0842b70SToshi Kani If you are unsure how to answer this question, answer N. 1571506f1d07SSam Ravnborg 15723b16651fSTejun Heoconfig ARCH_PROC_KCORE_TEXT 15733b16651fSTejun Heo def_bool y 15743b16651fSTejun Heo depends on X86_64 && PROC_KCORE 15753b16651fSTejun Heo 1576a29815a3SAvi Kivityconfig ILLEGAL_POINTER_VALUE 1577a29815a3SAvi Kivity hex 1578a29815a3SAvi Kivity default 0 if X86_32 1579a29815a3SAvi Kivity default 0xdead000000000000 if X86_64 1580a29815a3SAvi Kivity 15817a67832cSDan Williamsconfig X86_PMEM_LEGACY_DEVICE 15827a67832cSDan Williams bool 15837a67832cSDan Williams 1584ec776ef6SChristoph Hellwigconfig X86_PMEM_LEGACY 15857a67832cSDan Williams tristate "Support non-standard NVDIMMs and ADR protected memory" 15869f53f9faSDan Williams depends on PHYS_ADDR_T_64BIT 15879f53f9faSDan Williams depends on BLK_DEV 15887a67832cSDan Williams select X86_PMEM_LEGACY_DEVICE 15897b27a862SDan Williams select NUMA_KEEP_MEMINFO if NUMA 15909f53f9faSDan Williams select LIBNVDIMM 1591ec776ef6SChristoph Hellwig help 1592ec776ef6SChristoph Hellwig Treat memory marked using the non-standard e820 type of 12 as used 1593ec776ef6SChristoph Hellwig by the Intel Sandy Bridge-EP reference BIOS as protected memory. 1594ec776ef6SChristoph Hellwig The kernel will offer these regions to the 'pmem' driver so 1595ec776ef6SChristoph Hellwig they can be used for persistent storage. 1596ec776ef6SChristoph Hellwig 1597ec776ef6SChristoph Hellwig Say Y if unsure. 1598ec776ef6SChristoph Hellwig 15999f077871SJeremy Fitzhardingeconfig X86_CHECK_BIOS_CORRUPTION 16009f077871SJeremy Fitzhardinge bool "Check for low memory corruption" 1601a7f7f624SMasahiro Yamada help 16029f077871SJeremy Fitzhardinge Periodically check for memory corruption in low memory, which 16039f077871SJeremy Fitzhardinge is suspected to be caused by BIOS. Even when enabled in the 16049f077871SJeremy Fitzhardinge configuration, it is disabled at runtime. Enable it by 16059f077871SJeremy Fitzhardinge setting "memory_corruption_check=1" on the kernel command 16069f077871SJeremy Fitzhardinge line. By default it scans the low 64k of memory every 60 16079f077871SJeremy Fitzhardinge seconds; see the memory_corruption_check_size and 16089f077871SJeremy Fitzhardinge memory_corruption_check_period parameters in 16098c27ceffSMauro Carvalho Chehab Documentation/admin-guide/kernel-parameters.rst to adjust this. 16109f077871SJeremy Fitzhardinge 16119f077871SJeremy Fitzhardinge When enabled with the default parameters, this option has 16129f077871SJeremy Fitzhardinge almost no overhead, as it reserves a relatively small amount 16139f077871SJeremy Fitzhardinge of memory and scans it infrequently. It both detects corruption 16149f077871SJeremy Fitzhardinge and prevents it from affecting the running system. 16159f077871SJeremy Fitzhardinge 16169f077871SJeremy Fitzhardinge It is, however, intended as a diagnostic tool; if repeatable 16179f077871SJeremy Fitzhardinge BIOS-originated corruption always affects the same memory, 16189f077871SJeremy Fitzhardinge you can use memmap= to prevent the kernel from using that 16199f077871SJeremy Fitzhardinge memory. 16209f077871SJeremy Fitzhardinge 1621c885df50SJeremy Fitzhardingeconfig X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK 1622c885df50SJeremy Fitzhardinge bool "Set the default setting of memory_corruption_check" 1623c885df50SJeremy Fitzhardinge depends on X86_CHECK_BIOS_CORRUPTION 1624c885df50SJeremy Fitzhardinge default y 1625a7f7f624SMasahiro Yamada help 1626c885df50SJeremy Fitzhardinge Set whether the default state of memory_corruption_check is 1627c885df50SJeremy Fitzhardinge on or off. 1628c885df50SJeremy Fitzhardinge 1629506f1d07SSam Ravnborgconfig MATH_EMULATION 1630506f1d07SSam Ravnborg bool 1631a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 163287d6021bSArnd Bergmann prompt "Math emulation" if X86_32 && (M486SX || MELAN) 1633a7f7f624SMasahiro Yamada help 1634506f1d07SSam Ravnborg Linux can emulate a math coprocessor (used for floating point 1635506f1d07SSam Ravnborg operations) if you don't have one. 486DX and Pentium processors have 1636506f1d07SSam Ravnborg a math coprocessor built in, 486SX and 386 do not, unless you added 1637506f1d07SSam Ravnborg a 487DX or 387, respectively. (The messages during boot time can 1638506f1d07SSam Ravnborg give you some hints here ["man dmesg"].) Everyone needs either a 1639506f1d07SSam Ravnborg coprocessor or this emulation. 1640506f1d07SSam Ravnborg 1641506f1d07SSam Ravnborg If you don't have a math coprocessor, you need to say Y here; if you 1642506f1d07SSam Ravnborg say Y here even though you have a coprocessor, the coprocessor will 1643506f1d07SSam Ravnborg be used nevertheless. (This behavior can be changed with the kernel 1644506f1d07SSam Ravnborg command line option "no387", which comes handy if your coprocessor 1645506f1d07SSam Ravnborg is broken. Try "man bootparam" or see the documentation of your boot 1646506f1d07SSam Ravnborg loader (lilo or loadlin) about how to pass options to the kernel at 1647506f1d07SSam Ravnborg boot time.) This means that it is a good idea to say Y here if you 1648506f1d07SSam Ravnborg intend to use this kernel on different machines. 1649506f1d07SSam Ravnborg 1650506f1d07SSam Ravnborg More information about the internals of the Linux math coprocessor 1651506f1d07SSam Ravnborg emulation can be found in <file:arch/x86/math-emu/README>. 1652506f1d07SSam Ravnborg 1653506f1d07SSam Ravnborg If you are not sure, say Y; apart from resulting in a 66 KB bigger 1654506f1d07SSam Ravnborg kernel, it won't hurt. 1655506f1d07SSam Ravnborg 1656506f1d07SSam Ravnborgconfig MTRR 16576fc108a0SJan Beulich def_bool y 16586a108a14SDavid Rientjes prompt "MTRR (Memory Type Range Register) support" if EXPERT 1659a7f7f624SMasahiro Yamada help 1660506f1d07SSam Ravnborg On Intel P6 family processors (Pentium Pro, Pentium II and later) 1661506f1d07SSam Ravnborg the Memory Type Range Registers (MTRRs) may be used to control 1662506f1d07SSam Ravnborg processor access to memory ranges. This is most useful if you have 1663506f1d07SSam Ravnborg a video (VGA) card on a PCI or AGP bus. Enabling write-combining 1664506f1d07SSam Ravnborg allows bus write transfers to be combined into a larger transfer 1665506f1d07SSam Ravnborg before bursting over the PCI/AGP bus. This can increase performance 1666506f1d07SSam Ravnborg of image write operations 2.5 times or more. Saying Y here creates a 1667506f1d07SSam Ravnborg /proc/mtrr file which may be used to manipulate your processor's 1668506f1d07SSam Ravnborg MTRRs. Typically the X server should use this. 1669506f1d07SSam Ravnborg 1670506f1d07SSam Ravnborg This code has a reasonably generic interface so that similar 1671506f1d07SSam Ravnborg control registers on other processors can be easily supported 1672506f1d07SSam Ravnborg as well: 1673506f1d07SSam Ravnborg 1674506f1d07SSam Ravnborg The Cyrix 6x86, 6x86MX and M II processors have Address Range 1675506f1d07SSam Ravnborg Registers (ARRs) which provide a similar functionality to MTRRs. For 1676506f1d07SSam Ravnborg these, the ARRs are used to emulate the MTRRs. 1677506f1d07SSam Ravnborg The AMD K6-2 (stepping 8 and above) and K6-3 processors have two 1678506f1d07SSam Ravnborg MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing 1679506f1d07SSam Ravnborg write-combining. All of these processors are supported by this code 1680506f1d07SSam Ravnborg and it makes sense to say Y here if you have one of them. 1681506f1d07SSam Ravnborg 1682506f1d07SSam Ravnborg Saying Y here also fixes a problem with buggy SMP BIOSes which only 1683506f1d07SSam Ravnborg set the MTRRs for the boot CPU and not for the secondary CPUs. This 1684506f1d07SSam Ravnborg can lead to all sorts of problems, so it's good to say Y here. 1685506f1d07SSam Ravnborg 1686506f1d07SSam Ravnborg You can safely say Y even if your machine doesn't have MTRRs, you'll 1687506f1d07SSam Ravnborg just add about 9 KB to your kernel. 1688506f1d07SSam Ravnborg 1689ff61f079SJonathan Corbet See <file:Documentation/arch/x86/mtrr.rst> for more information. 1690506f1d07SSam Ravnborg 169195ffa243SYinghai Luconfig MTRR_SANITIZER 16922ffb3501SYinghai Lu def_bool y 169395ffa243SYinghai Lu prompt "MTRR cleanup support" 169495ffa243SYinghai Lu depends on MTRR 1695a7f7f624SMasahiro Yamada help 1696aba3728cSThomas Gleixner Convert MTRR layout from continuous to discrete, so X drivers can 1697aba3728cSThomas Gleixner add writeback entries. 169895ffa243SYinghai Lu 1699aba3728cSThomas Gleixner Can be disabled with disable_mtrr_cleanup on the kernel command line. 1700692105b8SMatt LaPlante The largest mtrr entry size for a continuous block can be set with 1701aba3728cSThomas Gleixner mtrr_chunk_size. 170295ffa243SYinghai Lu 17032ffb3501SYinghai Lu If unsure, say Y. 170495ffa243SYinghai Lu 170595ffa243SYinghai Luconfig MTRR_SANITIZER_ENABLE_DEFAULT 1706f5098d62SYinghai Lu int "MTRR cleanup enable value (0-1)" 1707f5098d62SYinghai Lu range 0 1 1708f5098d62SYinghai Lu default "0" 170995ffa243SYinghai Lu depends on MTRR_SANITIZER 1710a7f7f624SMasahiro Yamada help 1711f5098d62SYinghai Lu Enable mtrr cleanup default value 171295ffa243SYinghai Lu 171312031a62SYinghai Luconfig MTRR_SANITIZER_SPARE_REG_NR_DEFAULT 171412031a62SYinghai Lu int "MTRR cleanup spare reg num (0-7)" 171512031a62SYinghai Lu range 0 7 171612031a62SYinghai Lu default "1" 171712031a62SYinghai Lu depends on MTRR_SANITIZER 1718a7f7f624SMasahiro Yamada help 171912031a62SYinghai Lu mtrr cleanup spare entries default, it can be changed via 1720aba3728cSThomas Gleixner mtrr_spare_reg_nr=N on the kernel command line. 172112031a62SYinghai Lu 17222e5d9c85Svenkatesh.pallipadi@intel.comconfig X86_PAT 17236fc108a0SJan Beulich def_bool y 17246a108a14SDavid Rientjes prompt "x86 PAT support" if EXPERT 17252a8a2719SIngo Molnar depends on MTRR 17267a87225aSMatthew Wilcox (Oracle) select ARCH_USES_PG_ARCH_2 1727a7f7f624SMasahiro Yamada help 17282e5d9c85Svenkatesh.pallipadi@intel.com Use PAT attributes to setup page level cache control. 1729042b78e4SVenki Pallipadi 17302e5d9c85Svenkatesh.pallipadi@intel.com PATs are the modern equivalents of MTRRs and are much more 17312e5d9c85Svenkatesh.pallipadi@intel.com flexible than MTRRs. 17322e5d9c85Svenkatesh.pallipadi@intel.com 17332e5d9c85Svenkatesh.pallipadi@intel.com Say N here if you see bootup problems (boot crash, boot hang, 1734042b78e4SVenki Pallipadi spontaneous reboots) or a non-working video driver. 17352e5d9c85Svenkatesh.pallipadi@intel.com 17362e5d9c85Svenkatesh.pallipadi@intel.com If unsure, say Y. 17372e5d9c85Svenkatesh.pallipadi@intel.com 1738b971880fSBabu Mogerconfig X86_UMIP 1739796ebc81SRicardo Neri def_bool y 1740b971880fSBabu Moger prompt "User Mode Instruction Prevention" if EXPERT 1741a7f7f624SMasahiro Yamada help 1742b971880fSBabu Moger User Mode Instruction Prevention (UMIP) is a security feature in 1743b971880fSBabu Moger some x86 processors. If enabled, a general protection fault is 1744b971880fSBabu Moger issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are 1745b971880fSBabu Moger executed in user mode. These instructions unnecessarily expose 1746b971880fSBabu Moger information about the hardware state. 1747796ebc81SRicardo Neri 1748796ebc81SRicardo Neri The vast majority of applications do not use these instructions. 1749796ebc81SRicardo Neri For the very few that do, software emulation is provided in 1750796ebc81SRicardo Neri specific cases in protected and virtual-8086 modes. Emulated 1751796ebc81SRicardo Neri results are dummy. 1752aa35f896SRicardo Neri 1753156ff4a5SPeter Zijlstraconfig CC_HAS_IBT 1754156ff4a5SPeter Zijlstra # GCC >= 9 and binutils >= 2.29 1755156ff4a5SPeter Zijlstra # Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654 1756156ff4a5SPeter Zijlstra # Clang/LLVM >= 14 1757262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f 1758262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332 1759156ff4a5SPeter Zijlstra def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \ 1760262448f3SNathan Chancellor (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \ 1761156ff4a5SPeter Zijlstra $(as-instr,endbr64) 1762156ff4a5SPeter Zijlstra 176318e66b69SRick Edgecombeconfig X86_CET 176418e66b69SRick Edgecombe def_bool n 176518e66b69SRick Edgecombe help 176618e66b69SRick Edgecombe CET features configured (Shadow stack or IBT) 176718e66b69SRick Edgecombe 1768156ff4a5SPeter Zijlstraconfig X86_KERNEL_IBT 1769156ff4a5SPeter Zijlstra prompt "Indirect Branch Tracking" 17704fd5f70cSKees Cook def_bool y 177103f16cd0SJosh Poimboeuf depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL 1772f6a2c2b2SNathan Chancellor # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f 1773f6a2c2b2SNathan Chancellor depends on !LD_IS_LLD || LLD_VERSION >= 140000 177403f16cd0SJosh Poimboeuf select OBJTOOL 177518e66b69SRick Edgecombe select X86_CET 1776156ff4a5SPeter Zijlstra help 1777156ff4a5SPeter Zijlstra Build the kernel with support for Indirect Branch Tracking, a 1778156ff4a5SPeter Zijlstra hardware support course-grain forward-edge Control Flow Integrity 1779156ff4a5SPeter Zijlstra protection. It enforces that all indirect calls must land on 1780156ff4a5SPeter Zijlstra an ENDBR instruction, as such, the compiler will instrument the 1781156ff4a5SPeter Zijlstra code with them to make this happen. 1782156ff4a5SPeter Zijlstra 1783ed53a0d9SPeter Zijlstra In addition to building the kernel with IBT, seal all functions that 17844cdfc11bSNur Hussein are not indirect call targets, avoiding them ever becoming one. 1785ed53a0d9SPeter Zijlstra 1786ed53a0d9SPeter Zijlstra This requires LTO like objtool runs and will slow down the build. It 1787ed53a0d9SPeter Zijlstra does significantly reduce the number of ENDBR instructions in the 1788ed53a0d9SPeter Zijlstra kernel image. 1789ed53a0d9SPeter Zijlstra 179035e97790SDave Hansenconfig X86_INTEL_MEMORY_PROTECTION_KEYS 179138f3e775SBabu Moger prompt "Memory Protection Keys" 179235e97790SDave Hansen def_bool y 1793284244a9SDave Hansen # Note: only available in 64-bit mode 179438f3e775SBabu Moger depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD) 179552c8e601SIngo Molnar select ARCH_USES_HIGH_VMA_FLAGS 179652c8e601SIngo Molnar select ARCH_HAS_PKEYS 1797a7f7f624SMasahiro Yamada help 1798284244a9SDave Hansen Memory Protection Keys provides a mechanism for enforcing 1799284244a9SDave Hansen page-based protections, but without requiring modification of the 1800284244a9SDave Hansen page tables when an application changes protection domains. 1801284244a9SDave Hansen 18021eecbcdcSMauro Carvalho Chehab For details, see Documentation/core-api/protection-keys.rst 1803284244a9SDave Hansen 1804284244a9SDave Hansen If unsure, say y. 180535e97790SDave Hansen 18065626f8d4SJoey Goulyconfig ARCH_PKEY_BITS 18075626f8d4SJoey Gouly int 18085626f8d4SJoey Gouly default 4 18095626f8d4SJoey Gouly 1810db616173SMichal Hockochoice 1811db616173SMichal Hocko prompt "TSX enable mode" 1812db616173SMichal Hocko depends on CPU_SUP_INTEL 1813db616173SMichal Hocko default X86_INTEL_TSX_MODE_OFF 1814db616173SMichal Hocko help 1815db616173SMichal Hocko Intel's TSX (Transactional Synchronization Extensions) feature 1816db616173SMichal Hocko allows to optimize locking protocols through lock elision which 1817db616173SMichal Hocko can lead to a noticeable performance boost. 1818db616173SMichal Hocko 1819db616173SMichal Hocko On the other hand it has been shown that TSX can be exploited 1820db616173SMichal Hocko to form side channel attacks (e.g. TAA) and chances are there 1821db616173SMichal Hocko will be more of those attacks discovered in the future. 1822db616173SMichal Hocko 1823db616173SMichal Hocko Therefore TSX is not enabled by default (aka tsx=off). An admin 1824db616173SMichal Hocko might override this decision by tsx=on the command line parameter. 1825db616173SMichal Hocko Even with TSX enabled, the kernel will attempt to enable the best 1826db616173SMichal Hocko possible TAA mitigation setting depending on the microcode available 1827db616173SMichal Hocko for the particular machine. 1828db616173SMichal Hocko 1829db616173SMichal Hocko This option allows to set the default tsx mode between tsx=on, =off 1830db616173SMichal Hocko and =auto. See Documentation/admin-guide/kernel-parameters.txt for more 1831db616173SMichal Hocko details. 1832db616173SMichal Hocko 1833db616173SMichal Hocko Say off if not sure, auto if TSX is in use but it should be used on safe 1834db616173SMichal Hocko platforms or on if TSX is in use and the security aspect of tsx is not 1835db616173SMichal Hocko relevant. 1836db616173SMichal Hocko 1837db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_OFF 1838db616173SMichal Hocko bool "off" 1839db616173SMichal Hocko help 1840db616173SMichal Hocko TSX is disabled if possible - equals to tsx=off command line parameter. 1841db616173SMichal Hocko 1842db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_ON 1843db616173SMichal Hocko bool "on" 1844db616173SMichal Hocko help 1845db616173SMichal Hocko TSX is always enabled on TSX capable HW - equals the tsx=on command 1846db616173SMichal Hocko line parameter. 1847db616173SMichal Hocko 1848db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_AUTO 1849db616173SMichal Hocko bool "auto" 1850db616173SMichal Hocko help 1851db616173SMichal Hocko TSX is enabled on TSX capable HW that is believed to be safe against 1852db616173SMichal Hocko side channel attacks- equals the tsx=auto command line parameter. 1853db616173SMichal Hockoendchoice 1854db616173SMichal Hocko 1855e7e05452SSean Christophersonconfig X86_SGX 1856e7e05452SSean Christopherson bool "Software Guard eXtensions (SGX)" 1857b8d1d163SDaniel Sneddon depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC 1858e59236b5SEric Biggers select CRYPTO_LIB_SHA256 1859e7e05452SSean Christopherson select MMU_NOTIFIER 1860901ddbb9SJarkko Sakkinen select NUMA_KEEP_MEMINFO if NUMA 186140e0e784STony Luck select XARRAY_MULTI 1862e7e05452SSean Christopherson help 1863e7e05452SSean Christopherson Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions 1864e7e05452SSean Christopherson that can be used by applications to set aside private regions of code 1865e7e05452SSean Christopherson and data, referred to as enclaves. An enclave's private memory can 1866e7e05452SSean Christopherson only be accessed by code running within the enclave. Accesses from 1867e7e05452SSean Christopherson outside the enclave, including other enclaves, are disallowed by 1868e7e05452SSean Christopherson hardware. 1869e7e05452SSean Christopherson 1870e7e05452SSean Christopherson If unsure, say N. 1871e7e05452SSean Christopherson 187218e66b69SRick Edgecombeconfig X86_USER_SHADOW_STACK 187318e66b69SRick Edgecombe bool "X86 userspace shadow stack" 187418e66b69SRick Edgecombe depends on AS_WRUSS 187518e66b69SRick Edgecombe depends on X86_64 187618e66b69SRick Edgecombe select ARCH_USES_HIGH_VMA_FLAGS 1877bcc9d04eSMark Brown select ARCH_HAS_USER_SHADOW_STACK 187818e66b69SRick Edgecombe select X86_CET 187918e66b69SRick Edgecombe help 188018e66b69SRick Edgecombe Shadow stack protection is a hardware feature that detects function 188118e66b69SRick Edgecombe return address corruption. This helps mitigate ROP attacks. 188218e66b69SRick Edgecombe Applications must be enabled to use it, and old userspace does not 188318e66b69SRick Edgecombe get protection "for free". 188418e66b69SRick Edgecombe 188518e66b69SRick Edgecombe CPUs supporting shadow stacks were first released in 2020. 188618e66b69SRick Edgecombe 188754acee60SDave Hansen See Documentation/arch/x86/shstk.rst for more information. 188818e66b69SRick Edgecombe 188918e66b69SRick Edgecombe If unsure, say N. 189018e66b69SRick Edgecombe 1891c33621b4SKai Huangconfig INTEL_TDX_HOST 1892c33621b4SKai Huang bool "Intel Trust Domain Extensions (TDX) host support" 1893c33621b4SKai Huang depends on CPU_SUP_INTEL 1894c33621b4SKai Huang depends on X86_64 1895c33621b4SKai Huang depends on KVM_INTEL 18963115cabdSKai Huang depends on X86_X2APIC 1897abe8dbabSKai Huang select ARCH_KEEP_MEMBLOCK 1898ac3a2208SKai Huang depends on CONTIG_ALLOC 1899cb8eb06dSDave Hansen depends on !KEXEC_CORE 190083e1bdc9SKai Huang depends on X86_MCE 1901c33621b4SKai Huang help 1902c33621b4SKai Huang Intel Trust Domain Extensions (TDX) protects guest VMs from malicious 1903c33621b4SKai Huang host and certain physical attacks. This option enables necessary TDX 1904c33621b4SKai Huang support in the host kernel to run confidential VMs. 1905c33621b4SKai Huang 1906c33621b4SKai Huang If unsure, say N. 1907c33621b4SKai Huang 1908506f1d07SSam Ravnborgconfig EFI 19099ba16087SJan Beulich bool "EFI runtime service support" 19105b83683fSHuang, Ying depends on ACPI 1911f6ce5002SSergey Vlasov select UCS2_STRING 1912022ee6c5SArd Biesheuvel select EFI_RUNTIME_WRAPPERS 19131ff2fc02STom Lendacky select ARCH_USE_MEMREMAP_PROT 1914aba7e066SArd Biesheuvel select EFI_RUNTIME_MAP if KEXEC_CORE 1915a7f7f624SMasahiro Yamada help 19168b2cb7a8SHuang, Ying This enables the kernel to use EFI runtime services that are 1917506f1d07SSam Ravnborg available (such as the EFI variable services). 1918506f1d07SSam Ravnborg 19198b2cb7a8SHuang, Ying This option is only useful on systems that have EFI firmware. 19208b2cb7a8SHuang, Ying In addition, you should use the latest ELILO loader available 19218b2cb7a8SHuang, Ying at <http://elilo.sourceforge.net> in order to take advantage 19228b2cb7a8SHuang, Ying of EFI runtime services. However, even with this option, the 19238b2cb7a8SHuang, Ying resultant kernel should continue to boot on existing non-EFI 19248b2cb7a8SHuang, Ying platforms. 1925506f1d07SSam Ravnborg 1926291f3632SMatt Flemingconfig EFI_STUB 1927291f3632SMatt Fleming bool "EFI stub support" 1928c6dbd3e5SPeter Zijlstra depends on EFI 19297b2a583aSMatt Fleming select RELOCATABLE 1930a7f7f624SMasahiro Yamada help 1931291f3632SMatt Fleming This kernel feature allows a bzImage to be loaded directly 1932291f3632SMatt Fleming by EFI firmware without the use of a bootloader. 1933291f3632SMatt Fleming 19344f4cfa6cSMauro Carvalho Chehab See Documentation/admin-guide/efi-stub.rst for more information. 19350c759662SMatt Fleming 1936cc3fdda2SArd Biesheuvelconfig EFI_HANDOVER_PROTOCOL 1937cc3fdda2SArd Biesheuvel bool "EFI handover protocol (DEPRECATED)" 1938cc3fdda2SArd Biesheuvel depends on EFI_STUB 1939cc3fdda2SArd Biesheuvel default y 1940cc3fdda2SArd Biesheuvel help 1941cc3fdda2SArd Biesheuvel Select this in order to include support for the deprecated EFI 1942cc3fdda2SArd Biesheuvel handover protocol, which defines alternative entry points into the 1943cc3fdda2SArd Biesheuvel EFI stub. This is a practice that has no basis in the UEFI 1944cc3fdda2SArd Biesheuvel specification, and requires a priori knowledge on the part of the 1945cc3fdda2SArd Biesheuvel bootloader about Linux/x86 specific ways of passing the command line 1946cc3fdda2SArd Biesheuvel and initrd, and where in memory those assets may be loaded. 1947cc3fdda2SArd Biesheuvel 1948cc3fdda2SArd Biesheuvel If in doubt, say Y. Even though the corresponding support is not 1949cc3fdda2SArd Biesheuvel present in upstream GRUB or other bootloaders, most distros build 1950cc3fdda2SArd Biesheuvel GRUB with numerous downstream patches applied, and may rely on the 1951cc3fdda2SArd Biesheuvel handover protocol as as result. 1952cc3fdda2SArd Biesheuvel 19537d453eeeSMatt Flemingconfig EFI_MIXED 19547d453eeeSMatt Fleming bool "EFI mixed-mode support" 19557d453eeeSMatt Fleming depends on EFI_STUB && X86_64 1956a7f7f624SMasahiro Yamada help 19577d453eeeSMatt Fleming Enabling this feature allows a 64-bit kernel to be booted 19587d453eeeSMatt Fleming on a 32-bit firmware, provided that your CPU supports 64-bit 19597d453eeeSMatt Fleming mode. 19607d453eeeSMatt Fleming 19617d453eeeSMatt Fleming Note that it is not possible to boot a mixed-mode enabled 19627d453eeeSMatt Fleming kernel via the EFI boot stub - a bootloader that supports 19637d453eeeSMatt Fleming the EFI handover protocol must be used. 19647d453eeeSMatt Fleming 19657d453eeeSMatt Fleming If unsure, say N. 19667d453eeeSMatt Fleming 19671fff234dSArd Biesheuvelconfig EFI_RUNTIME_MAP 19681fff234dSArd Biesheuvel bool "Export EFI runtime maps to sysfs" if EXPERT 19691fff234dSArd Biesheuvel depends on EFI 19701fff234dSArd Biesheuvel help 19711fff234dSArd Biesheuvel Export EFI runtime memory regions to /sys/firmware/efi/runtime-map. 19721fff234dSArd Biesheuvel That memory map is required by the 2nd kernel to set up EFI virtual 19731fff234dSArd Biesheuvel mappings after kexec, but can also be used for debugging purposes. 19741fff234dSArd Biesheuvel 19751fff234dSArd Biesheuvel See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map. 19761fff234dSArd Biesheuvel 19778636a1f9SMasahiro Yamadasource "kernel/Kconfig.hz" 1978506f1d07SSam Ravnborg 19796af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC 19806af51380SEric DeVolder def_bool y 1981506f1d07SSam Ravnborg 19826af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_FILE 1983c1ad12eeSArnd Bergmann def_bool X86_64 1984506f1d07SSam Ravnborg 19856af51380SEric DeVolderconfig ARCH_SELECTS_KEXEC_FILE 19866af51380SEric DeVolder def_bool y 19876af51380SEric DeVolder depends on KEXEC_FILE 1988b69a2afdSJonathan McDowell select HAVE_IMA_KEXEC if IMA 198974ca317cSVivek Goyal 1990e6265fe7SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_PURGATORY 1991c1ad12eeSArnd Bergmann def_bool y 1992b799a09fSAKASHI Takahiro 19936af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG 19946af51380SEric DeVolder def_bool y 199599d5cadfSJiri Bohac 19966af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG_FORCE 19976af51380SEric DeVolder def_bool y 199899d5cadfSJiri Bohac 19996af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG 20006af51380SEric DeVolder def_bool y 200199d5cadfSJiri Bohac 20026af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_JUMP 20036af51380SEric DeVolder def_bool y 20048e7d8381SVivek Goyal 20052b082d6fSAlexander Grafconfig ARCH_SUPPORTS_KEXEC_HANDOVER 20062b082d6fSAlexander Graf def_bool X86_64 20072b082d6fSAlexander Graf 20086af51380SEric DeVolderconfig ARCH_SUPPORTS_CRASH_DUMP 20096af51380SEric DeVolder def_bool X86_64 || (X86_32 && HIGHMEM) 20108e7d8381SVivek Goyal 201131daa343SDave Vasilevskyconfig ARCH_DEFAULT_CRASH_DUMP 201231daa343SDave Vasilevsky def_bool y 201331daa343SDave Vasilevsky 2014ea53ad9cSEric DeVolderconfig ARCH_SUPPORTS_CRASH_HOTPLUG 2015ea53ad9cSEric DeVolder def_bool y 20163ab83521SHuang Ying 20179c08a2a1SBaoquan Heconfig ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 201885fcde40SBaoquan He def_bool CRASH_RESERVE 20199c08a2a1SBaoquan He 2020506f1d07SSam Ravnborgconfig PHYSICAL_START 20216a108a14SDavid Rientjes hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 2022ceefccc9SH. Peter Anvin default "0x1000000" 2023a7f7f624SMasahiro Yamada help 2024506f1d07SSam Ravnborg This gives the physical address where the kernel is loaded. 2025506f1d07SSam Ravnborg 202643b1d3e6SChris Koch If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage 202743b1d3e6SChris Koch will decompress itself to above physical address and run from there. 202843b1d3e6SChris Koch Otherwise, bzImage will run from the address where it has been loaded 202943b1d3e6SChris Koch by the boot loader. The only exception is if it is loaded below the 203043b1d3e6SChris Koch above physical address, in which case it will relocate itself there. 2031506f1d07SSam Ravnborg 2032506f1d07SSam Ravnborg In normal kdump cases one does not have to set/change this option 2033506f1d07SSam Ravnborg as now bzImage can be compiled as a completely relocatable image 2034506f1d07SSam Ravnborg (CONFIG_RELOCATABLE=y) and be used to load and run from a different 2035506f1d07SSam Ravnborg address. This option is mainly useful for the folks who don't want 2036506f1d07SSam Ravnborg to use a bzImage for capturing the crash dump and want to use a 2037506f1d07SSam Ravnborg vmlinux instead. vmlinux is not relocatable hence a kernel needs 2038506f1d07SSam Ravnborg to be specifically compiled to run from a specific memory area 2039506f1d07SSam Ravnborg (normally a reserved region) and this option comes handy. 2040506f1d07SSam Ravnborg 2041ceefccc9SH. Peter Anvin So if you are using bzImage for capturing the crash dump, 2042ceefccc9SH. Peter Anvin leave the value here unchanged to 0x1000000 and set 2043ceefccc9SH. Peter Anvin CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux 2044ceefccc9SH. Peter Anvin for capturing the crash dump change this value to start of 2045ceefccc9SH. Peter Anvin the reserved region. In other words, it can be set based on 2046ceefccc9SH. Peter Anvin the "X" value as specified in the "crashkernel=YM@XM" 2047ceefccc9SH. Peter Anvin command line boot parameter passed to the panic-ed 2048330d4810SMauro Carvalho Chehab kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst 2049ceefccc9SH. Peter Anvin for more details about crash dumps. 2050506f1d07SSam Ravnborg 2051506f1d07SSam Ravnborg Usage of bzImage for capturing the crash dump is recommended as 2052506f1d07SSam Ravnborg one does not have to build two kernels. Same kernel can be used 2053506f1d07SSam Ravnborg as production kernel and capture kernel. Above option should have 2054506f1d07SSam Ravnborg gone away after relocatable bzImage support is introduced. But it 2055506f1d07SSam Ravnborg is present because there are users out there who continue to use 2056506f1d07SSam Ravnborg vmlinux for dump capture. This option should go away down the 2057506f1d07SSam Ravnborg line. 2058506f1d07SSam Ravnborg 2059506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2060506f1d07SSam Ravnborg 2061506f1d07SSam Ravnborgconfig RELOCATABLE 206226717808SH. Peter Anvin bool "Build a relocatable kernel" 206326717808SH. Peter Anvin default y 2064a7f7f624SMasahiro Yamada help 2065506f1d07SSam Ravnborg This builds a kernel image that retains relocation information 2066506f1d07SSam Ravnborg so it can be loaded someplace besides the default 1MB. 2067506f1d07SSam Ravnborg The relocations tend to make the kernel binary about 10% larger, 2068506f1d07SSam Ravnborg but are discarded at runtime. 2069506f1d07SSam Ravnborg 2070506f1d07SSam Ravnborg One use is for the kexec on panic case where the recovery kernel 2071506f1d07SSam Ravnborg must live at a different physical address than the primary 2072506f1d07SSam Ravnborg kernel. 2073506f1d07SSam Ravnborg 2074506f1d07SSam Ravnborg Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address 2075506f1d07SSam Ravnborg it has been loaded at and the compile time physical address 20768ab3820fSKees Cook (CONFIG_PHYSICAL_START) is used as the minimum location. 2077506f1d07SSam Ravnborg 20788ab3820fSKees Cookconfig RANDOMIZE_BASE 2079e8581e3dSBaoquan He bool "Randomize the address of the kernel image (KASLR)" 20808ab3820fSKees Cook depends on RELOCATABLE 20816807c846SIngo Molnar default y 2082a7f7f624SMasahiro Yamada help 2083e8581e3dSBaoquan He In support of Kernel Address Space Layout Randomization (KASLR), 2084e8581e3dSBaoquan He this randomizes the physical address at which the kernel image 2085e8581e3dSBaoquan He is decompressed and the virtual address where the kernel 2086e8581e3dSBaoquan He image is mapped, as a security feature that deters exploit 2087e8581e3dSBaoquan He attempts relying on knowledge of the location of kernel 2088e8581e3dSBaoquan He code internals. 2089e8581e3dSBaoquan He 2090ed9f007eSKees Cook On 64-bit, the kernel physical and virtual addresses are 2091ed9f007eSKees Cook randomized separately. The physical address will be anywhere 2092ed9f007eSKees Cook between 16MB and the top of physical memory (up to 64TB). The 2093ed9f007eSKees Cook virtual address will be randomized from 16MB up to 1GB (9 bits 2094ed9f007eSKees Cook of entropy). Note that this also reduces the memory space 2095ed9f007eSKees Cook available to kernel modules from 1.5GB to 1GB. 2096ed9f007eSKees Cook 2097ed9f007eSKees Cook On 32-bit, the kernel physical and virtual addresses are 2098ed9f007eSKees Cook randomized together. They will be randomized from 16MB up to 2099ed9f007eSKees Cook 512MB (8 bits of entropy). 21008ab3820fSKees Cook 2101a653f356SKees Cook Entropy is generated using the RDRAND instruction if it is 2102e8581e3dSBaoquan He supported. If RDTSC is supported, its value is mixed into 2103e8581e3dSBaoquan He the entropy pool as well. If neither RDRAND nor RDTSC are 2104ed9f007eSKees Cook supported, then entropy is read from the i8254 timer. The 2105ed9f007eSKees Cook usable entropy is limited by the kernel being built using 2106ed9f007eSKees Cook 2GB addressing, and that PHYSICAL_ALIGN must be at a 2107ed9f007eSKees Cook minimum of 2MB. As a result, only 10 bits of entropy are 2108ed9f007eSKees Cook theoretically possible, but the implementations are further 2109ed9f007eSKees Cook limited due to memory layouts. 2110e8581e3dSBaoquan He 21116807c846SIngo Molnar If unsure, say Y. 2112da2b6fb9SKees Cook 21138ab3820fSKees Cook# Relocation on x86 needs some additional build support 2114845adf72SH. Peter Anvinconfig X86_NEED_RELOCS 2115845adf72SH. Peter Anvin def_bool y 21168ab3820fSKees Cook depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE) 21179b400d17SArd Biesheuvel select ARCH_VMLINUX_NEEDS_RELOCS 2118845adf72SH. Peter Anvin 2119506f1d07SSam Ravnborgconfig PHYSICAL_ALIGN 2120a0215061SKees Cook hex "Alignment value to which kernel should be aligned" 21218ab3820fSKees Cook default "0x200000" 2122a0215061SKees Cook range 0x2000 0x1000000 if X86_32 2123a0215061SKees Cook range 0x200000 0x1000000 if X86_64 2124a7f7f624SMasahiro Yamada help 2125506f1d07SSam Ravnborg This value puts the alignment restrictions on physical address 2126506f1d07SSam Ravnborg where kernel is loaded and run from. Kernel is compiled for an 2127506f1d07SSam Ravnborg address which meets above alignment restriction. 2128506f1d07SSam Ravnborg 2129506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2130506f1d07SSam Ravnborg CONFIG_RELOCATABLE is set, kernel will move itself to nearest 2131506f1d07SSam Ravnborg address aligned to above value and run from there. 2132506f1d07SSam Ravnborg 2133506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2134506f1d07SSam Ravnborg CONFIG_RELOCATABLE is not set, kernel will ignore the run time 2135506f1d07SSam Ravnborg load address and decompress itself to the address it has been 2136506f1d07SSam Ravnborg compiled for and run from there. The address for which kernel is 2137506f1d07SSam Ravnborg compiled already meets above alignment restrictions. Hence the 2138506f1d07SSam Ravnborg end result is that kernel runs from a physical address meeting 2139506f1d07SSam Ravnborg above alignment restrictions. 2140506f1d07SSam Ravnborg 2141a0215061SKees Cook On 32-bit this value must be a multiple of 0x2000. On 64-bit 2142a0215061SKees Cook this value must be a multiple of 0x200000. 2143a0215061SKees Cook 2144506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2145506f1d07SSam Ravnborg 21460483e1faSThomas Garnierconfig RANDOMIZE_MEMORY 21470483e1faSThomas Garnier bool "Randomize the kernel memory sections" 21480483e1faSThomas Garnier depends on X86_64 21490483e1faSThomas Garnier depends on RANDOMIZE_BASE 21500483e1faSThomas Garnier default RANDOMIZE_BASE 2151a7f7f624SMasahiro Yamada help 21520483e1faSThomas Garnier Randomizes the base virtual address of kernel memory sections 21530483e1faSThomas Garnier (physical memory mapping, vmalloc & vmemmap). This security feature 21540483e1faSThomas Garnier makes exploits relying on predictable memory locations less reliable. 21550483e1faSThomas Garnier 21560483e1faSThomas Garnier The order of allocations remains unchanged. Entropy is generated in 21570483e1faSThomas Garnier the same way as RANDOMIZE_BASE. Current implementation in the optimal 21580483e1faSThomas Garnier configuration have in average 30,000 different possible virtual 21590483e1faSThomas Garnier addresses for each memory section. 21600483e1faSThomas Garnier 21616807c846SIngo Molnar If unsure, say Y. 21620483e1faSThomas Garnier 216390397a41SThomas Garnierconfig RANDOMIZE_MEMORY_PHYSICAL_PADDING 216490397a41SThomas Garnier hex "Physical memory mapping padding" if EXPERT 216590397a41SThomas Garnier depends on RANDOMIZE_MEMORY 216690397a41SThomas Garnier default "0xa" if MEMORY_HOTPLUG 216790397a41SThomas Garnier default "0x0" 216890397a41SThomas Garnier range 0x1 0x40 if MEMORY_HOTPLUG 216990397a41SThomas Garnier range 0x0 0x40 2170a7f7f624SMasahiro Yamada help 217190397a41SThomas Garnier Define the padding in terabytes added to the existing physical 217290397a41SThomas Garnier memory size during kernel memory randomization. It is useful 217390397a41SThomas Garnier for memory hotplug support but reduces the entropy available for 217490397a41SThomas Garnier address randomization. 217590397a41SThomas Garnier 217690397a41SThomas Garnier If unsure, leave at the default value. 217790397a41SThomas Garnier 21786449dcb0SKirill A. Shutemovconfig ADDRESS_MASKING 21796449dcb0SKirill A. Shutemov bool "Linear Address Masking support" 21806449dcb0SKirill A. Shutemov depends on X86_64 21813267cb6dSPawan Gupta depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS 21826449dcb0SKirill A. Shutemov help 21836449dcb0SKirill A. Shutemov Linear Address Masking (LAM) modifies the checking that is applied 21846449dcb0SKirill A. Shutemov to 64-bit linear addresses, allowing software to use of the 21856449dcb0SKirill A. Shutemov untranslated address bits for metadata. 21866449dcb0SKirill A. Shutemov 21876449dcb0SKirill A. Shutemov The capability can be used for efficient address sanitizers (ASAN) 21886449dcb0SKirill A. Shutemov implementation and for optimizations in JITs. 21896449dcb0SKirill A. Shutemov 2190506f1d07SSam Ravnborgconfig HOTPLUG_CPU 2191bebd024eSThomas Gleixner def_bool y 219240b31360SStephen Rothwell depends on SMP 2193506f1d07SSam Ravnborg 2194506f1d07SSam Ravnborgconfig COMPAT_VDSO 2195b0b49f26SAndy Lutomirski def_bool n 2196de711563SMateusz Jończyk prompt "Workaround for glibc 2.3.2 / 2.3.3 (released in year 2003/2004)" 2197953fee1dSIngo Molnar depends on COMPAT_32 2198a7f7f624SMasahiro Yamada help 2199b0b49f26SAndy Lutomirski Certain buggy versions of glibc will crash if they are 2200b0b49f26SAndy Lutomirski presented with a 32-bit vDSO that is not mapped at the address 2201b0b49f26SAndy Lutomirski indicated in its segment table. 2202e84446deSRandy Dunlap 2203b0b49f26SAndy Lutomirski The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a 2204b0b49f26SAndy Lutomirski and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and 2205b0b49f26SAndy Lutomirski 49ad572a70b8aeb91e57483a11dd1b77e31c4468. Glibc 2.3.3 is 2206b0b49f26SAndy Lutomirski the only released version with the bug, but OpenSUSE 9 2207b0b49f26SAndy Lutomirski contains a buggy "glibc 2.3.2". 2208506f1d07SSam Ravnborg 2209b0b49f26SAndy Lutomirski The symptom of the bug is that everything crashes on startup, saying: 2210b0b49f26SAndy Lutomirski dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed! 2211b0b49f26SAndy Lutomirski 2212b0b49f26SAndy Lutomirski Saying Y here changes the default value of the vdso32 boot 2213b0b49f26SAndy Lutomirski option from 1 to 0, which turns off the 32-bit vDSO entirely. 2214b0b49f26SAndy Lutomirski This works around the glibc bug but hurts performance. 2215b0b49f26SAndy Lutomirski 2216b0b49f26SAndy Lutomirski If unsure, say N: if you are compiling your own kernel, you 2217b0b49f26SAndy Lutomirski are unlikely to be using a buggy version of glibc. 2218506f1d07SSam Ravnborg 22193dc33bd3SKees Cookchoice 22203dc33bd3SKees Cook prompt "vsyscall table for legacy applications" 22213dc33bd3SKees Cook depends on X86_64 2222625b7b7fSAndy Lutomirski default LEGACY_VSYSCALL_XONLY 22233dc33bd3SKees Cook help 22243dc33bd3SKees Cook Legacy user code that does not know how to find the vDSO expects 22253dc33bd3SKees Cook to be able to issue three syscalls by calling fixed addresses in 22263dc33bd3SKees Cook kernel space. Since this location is not randomized with ASLR, 22273dc33bd3SKees Cook it can be used to assist security vulnerability exploitation. 22283dc33bd3SKees Cook 22293dc33bd3SKees Cook This setting can be changed at boot time via the kernel command 2230bf00745eSAndy Lutomirski line parameter vsyscall=[emulate|xonly|none]. Emulate mode 2231bf00745eSAndy Lutomirski is deprecated and can only be enabled using the kernel command 2232bf00745eSAndy Lutomirski line. 22333dc33bd3SKees Cook 22343dc33bd3SKees Cook On a system with recent enough glibc (2.14 or newer) and no 22353dc33bd3SKees Cook static binaries, you can say None without a performance penalty 22363dc33bd3SKees Cook to improve security. 22373dc33bd3SKees Cook 2238bd49e16eSAndy Lutomirski If unsure, select "Emulate execution only". 22393dc33bd3SKees Cook 2240bd49e16eSAndy Lutomirski config LEGACY_VSYSCALL_XONLY 2241bd49e16eSAndy Lutomirski bool "Emulate execution only" 2242bd49e16eSAndy Lutomirski help 2243bd49e16eSAndy Lutomirski The kernel traps and emulates calls into the fixed vsyscall 2244bd49e16eSAndy Lutomirski address mapping and does not allow reads. This 2245bd49e16eSAndy Lutomirski configuration is recommended when userspace might use the 2246bd49e16eSAndy Lutomirski legacy vsyscall area but support for legacy binary 2247bd49e16eSAndy Lutomirski instrumentation of legacy code is not needed. It mitigates 2248bd49e16eSAndy Lutomirski certain uses of the vsyscall area as an ASLR-bypassing 2249bd49e16eSAndy Lutomirski buffer. 22503dc33bd3SKees Cook 22513dc33bd3SKees Cook config LEGACY_VSYSCALL_NONE 22523dc33bd3SKees Cook bool "None" 22533dc33bd3SKees Cook help 22543dc33bd3SKees Cook There will be no vsyscall mapping at all. This will 22553dc33bd3SKees Cook eliminate any risk of ASLR bypass due to the vsyscall 22563dc33bd3SKees Cook fixed address mapping. Attempts to use the vsyscalls 22573dc33bd3SKees Cook will be reported to dmesg, so that either old or 22583dc33bd3SKees Cook malicious userspace programs can be identified. 22593dc33bd3SKees Cook 22603dc33bd3SKees Cookendchoice 22613dc33bd3SKees Cook 2262516cbf37STim Birdconfig CMDLINE_BOOL 2263516cbf37STim Bird bool "Built-in kernel command line" 2264a7f7f624SMasahiro Yamada help 2265516cbf37STim Bird Allow for specifying boot arguments to the kernel at 2266516cbf37STim Bird build time. On some systems (e.g. embedded ones), it is 2267516cbf37STim Bird necessary or convenient to provide some or all of the 2268516cbf37STim Bird kernel boot arguments with the kernel itself (that is, 2269516cbf37STim Bird to not rely on the boot loader to provide them.) 2270516cbf37STim Bird 2271516cbf37STim Bird To compile command line arguments into the kernel, 2272516cbf37STim Bird set this option to 'Y', then fill in the 227369711ca1SSébastien Hinderer boot arguments in CONFIG_CMDLINE. 2274516cbf37STim Bird 2275516cbf37STim Bird Systems with fully functional boot loaders (i.e. non-embedded) 2276516cbf37STim Bird should leave this option set to 'N'. 2277516cbf37STim Bird 2278516cbf37STim Birdconfig CMDLINE 2279516cbf37STim Bird string "Built-in kernel command string" 2280516cbf37STim Bird depends on CMDLINE_BOOL 2281516cbf37STim Bird default "" 2282a7f7f624SMasahiro Yamada help 2283516cbf37STim Bird Enter arguments here that should be compiled into the kernel 2284516cbf37STim Bird image and used at boot time. If the boot loader provides a 2285516cbf37STim Bird command line at boot time, it is appended to this string to 2286516cbf37STim Bird form the full kernel command line, when the system boots. 2287516cbf37STim Bird 2288516cbf37STim Bird However, you can use the CONFIG_CMDLINE_OVERRIDE option to 2289516cbf37STim Bird change this behavior. 2290516cbf37STim Bird 2291516cbf37STim Bird In most cases, the command line (whether built-in or provided 2292516cbf37STim Bird by the boot loader) should specify the device for the root 2293516cbf37STim Bird file system. 2294516cbf37STim Bird 2295516cbf37STim Birdconfig CMDLINE_OVERRIDE 2296516cbf37STim Bird bool "Built-in command line overrides boot loader arguments" 2297645e6466SAnders Roxell depends on CMDLINE_BOOL && CMDLINE != "" 2298a7f7f624SMasahiro Yamada help 2299516cbf37STim Bird Set this option to 'Y' to have the kernel ignore the boot loader 2300516cbf37STim Bird command line, and use ONLY the built-in command line. 2301516cbf37STim Bird 2302516cbf37STim Bird This is used to work around broken boot loaders. This should 2303516cbf37STim Bird be set to 'N' under normal conditions. 2304516cbf37STim Bird 2305a5b9e5a2SAndy Lutomirskiconfig MODIFY_LDT_SYSCALL 2306a5b9e5a2SAndy Lutomirski bool "Enable the LDT (local descriptor table)" if EXPERT 2307a5b9e5a2SAndy Lutomirski default y 2308a7f7f624SMasahiro Yamada help 2309a5b9e5a2SAndy Lutomirski Linux can allow user programs to install a per-process x86 2310a5b9e5a2SAndy Lutomirski Local Descriptor Table (LDT) using the modify_ldt(2) system 2311a5b9e5a2SAndy Lutomirski call. This is required to run 16-bit or segmented code such as 2312a5b9e5a2SAndy Lutomirski DOSEMU or some Wine programs. It is also used by some very old 2313a5b9e5a2SAndy Lutomirski threading libraries. 2314a5b9e5a2SAndy Lutomirski 2315a5b9e5a2SAndy Lutomirski Enabling this feature adds a small amount of overhead to 2316a5b9e5a2SAndy Lutomirski context switches and increases the low-level kernel attack 2317a5b9e5a2SAndy Lutomirski surface. Disabling it removes the modify_ldt(2) system call. 2318a5b9e5a2SAndy Lutomirski 2319a5b9e5a2SAndy Lutomirski Saying 'N' here may make sense for embedded or server kernels. 2320a5b9e5a2SAndy Lutomirski 23213aac3ebeSThomas Gleixnerconfig STRICT_SIGALTSTACK_SIZE 23223aac3ebeSThomas Gleixner bool "Enforce strict size checking for sigaltstack" 23233aac3ebeSThomas Gleixner depends on DYNAMIC_SIGFRAME 23243aac3ebeSThomas Gleixner help 23253aac3ebeSThomas Gleixner For historical reasons MINSIGSTKSZ is a constant which became 23263aac3ebeSThomas Gleixner already too small with AVX512 support. Add a mechanism to 23273aac3ebeSThomas Gleixner enforce strict checking of the sigaltstack size against the 23283aac3ebeSThomas Gleixner real size of the FPU frame. This option enables the check 23293aac3ebeSThomas Gleixner by default. It can also be controlled via the kernel command 23303aac3ebeSThomas Gleixner line option 'strict_sas_size' independent of this config 23313aac3ebeSThomas Gleixner switch. Enabling it might break existing applications which 23323aac3ebeSThomas Gleixner allocate a too small sigaltstack but 'work' because they 23333aac3ebeSThomas Gleixner never get a signal delivered. 23343aac3ebeSThomas Gleixner 23353aac3ebeSThomas Gleixner Say 'N' unless you want to really enforce this check. 23363aac3ebeSThomas Gleixner 2337d6f635bcSKees Cookconfig CFI_AUTO_DEFAULT 2338d6f635bcSKees Cook bool "Attempt to use FineIBT by default at boot time" 2339d6f635bcSKees Cook depends on FINEIBT 23405595c31cSPaweł Anikiel depends on !RUST || RUSTC_VERSION >= 108800 2341d6f635bcSKees Cook default y 2342d6f635bcSKees Cook help 2343d6f635bcSKees Cook Attempt to use FineIBT by default at boot time. If enabled, 2344d6f635bcSKees Cook this is the same as booting with "cfi=auto". If disabled, 2345d6f635bcSKees Cook this is the same as booting with "cfi=kcfi". 2346d6f635bcSKees Cook 2347b700e7f0SSeth Jenningssource "kernel/livepatch/Kconfig" 2348b700e7f0SSeth Jennings 2349350afa8aSRavi Bangoriaconfig X86_BUS_LOCK_DETECT 2350350afa8aSRavi Bangoria bool "Split Lock Detect and Bus Lock Detect support" 2351408eb741SRavi Bangoria depends on CPU_SUP_INTEL || CPU_SUP_AMD 2352350afa8aSRavi Bangoria default y 2353350afa8aSRavi Bangoria help 2354350afa8aSRavi Bangoria Enable Split Lock Detect and Bus Lock Detect functionalities. 2355350afa8aSRavi Bangoria See <file:Documentation/arch/x86/buslock.rst> for more information. 2356350afa8aSRavi Bangoria 2357506f1d07SSam Ravnborgendmenu 2358506f1d07SSam Ravnborg 23591ca3683cSUros Bizjakconfig CC_HAS_NAMED_AS 236047ff30ccSUros Bizjak def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null) 236147ff30ccSUros Bizjak depends on CC_IS_GCC 23621ca3683cSUros Bizjak 2363b6762467SUros Bizjak# 2364b6762467SUros Bizjak# -fsanitize=kernel-address (KASAN) and -fsanitize=thread (KCSAN) 2365b6762467SUros Bizjak# are incompatible with named address spaces with GCC < 13.3 2366b6762467SUros Bizjak# (see GCC PR sanitizer/111736 and also PR sanitizer/115172). 2367b6762467SUros Bizjak# 2368b6762467SUros Bizjak 23699ebe5500SUros Bizjakconfig CC_HAS_NAMED_AS_FIXED_SANITIZERS 2370b6762467SUros Bizjak def_bool y 2371b6762467SUros Bizjak depends on !(KASAN || KCSAN) || GCC_VERSION >= 130300 2372b6762467SUros Bizjak depends on !(UBSAN_BOOL && KASAN) || GCC_VERSION >= 140200 23731ca3683cSUros Bizjak 23741ca3683cSUros Bizjakconfig USE_X86_SEG_SUPPORT 2375b6762467SUros Bizjak def_bool CC_HAS_NAMED_AS 2376b6762467SUros Bizjak depends on CC_HAS_NAMED_AS_FIXED_SANITIZERS 23771ca3683cSUros Bizjak 2378f43b9876SPeter Zijlstraconfig CC_HAS_SLS 2379f43b9876SPeter Zijlstra def_bool $(cc-option,-mharden-sls=all) 2380f43b9876SPeter Zijlstra 2381f43b9876SPeter Zijlstraconfig CC_HAS_RETURN_THUNK 2382f43b9876SPeter Zijlstra def_bool $(cc-option,-mfunction-return=thunk-extern) 2383f43b9876SPeter Zijlstra 2384bea75b33SThomas Gleixnerconfig CC_HAS_ENTRY_PADDING 2385bea75b33SThomas Gleixner def_bool $(cc-option,-fpatchable-function-entry=16,16) 2386bea75b33SThomas Gleixner 23870c92385dSPeter Zijlstraconfig CC_HAS_KCFI_ARITY 23880c92385dSPeter Zijlstra def_bool $(cc-option,-fsanitize=kcfi -fsanitize-kcfi-arity) 23890c92385dSPeter Zijlstra depends on CC_IS_CLANG && !RUST 23900c92385dSPeter Zijlstra 2391bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_CFI 2392bea75b33SThomas Gleixner int 2393bea75b33SThomas Gleixner default 59 if FUNCTION_ALIGNMENT_64B 2394bea75b33SThomas Gleixner default 27 if FUNCTION_ALIGNMENT_32B 2395bea75b33SThomas Gleixner default 11 if FUNCTION_ALIGNMENT_16B 2396bea75b33SThomas Gleixner default 3 if FUNCTION_ALIGNMENT_8B 2397bea75b33SThomas Gleixner default 0 2398bea75b33SThomas Gleixner 2399bea75b33SThomas Gleixner# Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG 2400bea75b33SThomas Gleixner# except Kconfig can't do arithmetic :/ 2401bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_BYTES 2402bea75b33SThomas Gleixner int 2403bea75b33SThomas Gleixner default FUNCTION_PADDING_CFI if CFI_CLANG 2404bea75b33SThomas Gleixner default FUNCTION_ALIGNMENT 2405bea75b33SThomas Gleixner 2406931ab636SPeter Zijlstraconfig CALL_PADDING 2407931ab636SPeter Zijlstra def_bool n 2408931ab636SPeter Zijlstra depends on CC_HAS_ENTRY_PADDING && OBJTOOL 2409931ab636SPeter Zijlstra select FUNCTION_ALIGNMENT_16B 2410931ab636SPeter Zijlstra 2411931ab636SPeter Zijlstraconfig FINEIBT 2412931ab636SPeter Zijlstra def_bool y 2413aefb2f2eSBreno Leitao depends on X86_KERNEL_IBT && CFI_CLANG && MITIGATION_RETPOLINE 2414931ab636SPeter Zijlstra select CALL_PADDING 2415931ab636SPeter Zijlstra 24160c92385dSPeter Zijlstraconfig FINEIBT_BHI 24170c92385dSPeter Zijlstra def_bool y 24180c92385dSPeter Zijlstra depends on FINEIBT && CC_HAS_KCFI_ARITY 24190c92385dSPeter Zijlstra 24208f7c0d8bSThomas Gleixnerconfig HAVE_CALL_THUNKS 24218f7c0d8bSThomas Gleixner def_bool y 24220911b8c5SBreno Leitao depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL 24238f7c0d8bSThomas Gleixner 24248f7c0d8bSThomas Gleixnerconfig CALL_THUNKS 24258f7c0d8bSThomas Gleixner def_bool n 2426931ab636SPeter Zijlstra select CALL_PADDING 24278f7c0d8bSThomas Gleixner 2428b341b20dSPeter Zijlstraconfig PREFIX_SYMBOLS 2429b341b20dSPeter Zijlstra def_bool y 2430931ab636SPeter Zijlstra depends on CALL_PADDING && !CFI_CLANG 2431b341b20dSPeter Zijlstra 2432fe42754bSSean Christophersonmenuconfig CPU_MITIGATIONS 2433fe42754bSSean Christopherson bool "Mitigations for CPU vulnerabilities" 2434f43b9876SPeter Zijlstra default y 2435f43b9876SPeter Zijlstra help 2436fe42754bSSean Christopherson Say Y here to enable options which enable mitigations for hardware 2437fe42754bSSean Christopherson vulnerabilities (usually related to speculative execution). 2438ce0abef6SSean Christopherson Mitigations can be disabled or restricted to SMT systems at runtime 2439ce0abef6SSean Christopherson via the "mitigations" kernel parameter. 2440f43b9876SPeter Zijlstra 2441ce0abef6SSean Christopherson If you say N, all mitigations will be disabled. This CANNOT be 2442ce0abef6SSean Christopherson overridden at runtime. 2443ce0abef6SSean Christopherson 2444ce0abef6SSean Christopherson Say 'Y', unless you really know what you are doing. 2445f43b9876SPeter Zijlstra 2446fe42754bSSean Christophersonif CPU_MITIGATIONS 2447f43b9876SPeter Zijlstra 2448ea4654e0SBreno Leitaoconfig MITIGATION_PAGE_TABLE_ISOLATION 2449f43b9876SPeter Zijlstra bool "Remove the kernel mapping in user mode" 2450f43b9876SPeter Zijlstra default y 2451f43b9876SPeter Zijlstra depends on (X86_64 || X86_PAE) 2452f43b9876SPeter Zijlstra help 2453f43b9876SPeter Zijlstra This feature reduces the number of hardware side channels by 2454f43b9876SPeter Zijlstra ensuring that the majority of kernel addresses are not mapped 2455f43b9876SPeter Zijlstra into userspace. 2456f43b9876SPeter Zijlstra 2457ff61f079SJonathan Corbet See Documentation/arch/x86/pti.rst for more details. 2458f43b9876SPeter Zijlstra 2459aefb2f2eSBreno Leitaoconfig MITIGATION_RETPOLINE 2460f43b9876SPeter Zijlstra bool "Avoid speculative indirect branches in kernel" 2461f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2462f43b9876SPeter Zijlstra default y 2463f43b9876SPeter Zijlstra help 2464f43b9876SPeter Zijlstra Compile kernel with the retpoline compiler options to guard against 2465f43b9876SPeter Zijlstra kernel-to-user data leaks by avoiding speculative indirect 2466f43b9876SPeter Zijlstra branches. Requires a compiler with -mindirect-branch=thunk-extern 2467f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2468f43b9876SPeter Zijlstra 24690911b8c5SBreno Leitaoconfig MITIGATION_RETHUNK 2470f43b9876SPeter Zijlstra bool "Enable return-thunks" 2471aefb2f2eSBreno Leitao depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK 2472f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2473b648ab48SBen Hutchings default y if X86_64 2474f43b9876SPeter Zijlstra help 2475f43b9876SPeter Zijlstra Compile the kernel with the return-thunks compiler option to guard 2476f43b9876SPeter Zijlstra against kernel-to-user data leaks by avoiding return speculation. 2477f43b9876SPeter Zijlstra Requires a compiler with -mfunction-return=thunk-extern 2478f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2479f43b9876SPeter Zijlstra 2480ac61d439SBreno Leitaoconfig MITIGATION_UNRET_ENTRY 2481f43b9876SPeter Zijlstra bool "Enable UNRET on kernel entry" 24820911b8c5SBreno Leitao depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64 2483f43b9876SPeter Zijlstra default y 2484f43b9876SPeter Zijlstra help 2485f43b9876SPeter Zijlstra Compile the kernel with support for the retbleed=unret mitigation. 2486f43b9876SPeter Zijlstra 24875fa31af3SBreno Leitaoconfig MITIGATION_CALL_DEPTH_TRACKING 248880e4c1cdSThomas Gleixner bool "Mitigate RSB underflow with call depth tracking" 248980e4c1cdSThomas Gleixner depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS 249080e4c1cdSThomas Gleixner select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 249180e4c1cdSThomas Gleixner select CALL_THUNKS 249280e4c1cdSThomas Gleixner default y 249380e4c1cdSThomas Gleixner help 249480e4c1cdSThomas Gleixner Compile the kernel with call depth tracking to mitigate the Intel 249586e39b94SBreno Leitao SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off 249686e39b94SBreno Leitao by default and needs to be enabled on the kernel command line via the 249786e39b94SBreno Leitao retbleed=stuff option. For non-affected systems the overhead of this 249886e39b94SBreno Leitao option is marginal as the call depth tracking is using run-time 249986e39b94SBreno Leitao generated call thunks in a compiler generated padding area and call 250086e39b94SBreno Leitao patching. This increases text size by ~5%. For non affected systems 250186e39b94SBreno Leitao this space is unused. On affected SKL systems this results in a 250286e39b94SBreno Leitao significant performance gain over the IBRS mitigation. 250380e4c1cdSThomas Gleixner 2504e81dc127SThomas Gleixnerconfig CALL_THUNKS_DEBUG 2505e81dc127SThomas Gleixner bool "Enable call thunks and call depth tracking debugging" 25065fa31af3SBreno Leitao depends on MITIGATION_CALL_DEPTH_TRACKING 2507e81dc127SThomas Gleixner select FUNCTION_ALIGNMENT_32B 2508e81dc127SThomas Gleixner default n 2509e81dc127SThomas Gleixner help 2510e81dc127SThomas Gleixner Enable call/ret counters for imbalance detection and build in 2511e81dc127SThomas Gleixner a noisy dmesg about callthunks generation and call patching for 2512e81dc127SThomas Gleixner trouble shooting. The debug prints need to be enabled on the 2513e81dc127SThomas Gleixner kernel command line with 'debug-callthunks'. 251454628de6SRandy Dunlap Only enable this when you are debugging call thunks as this 251554628de6SRandy Dunlap creates a noticeable runtime overhead. If unsure say N. 251680e4c1cdSThomas Gleixner 2517e0b8fcfaSBreno Leitaoconfig MITIGATION_IBPB_ENTRY 2518f43b9876SPeter Zijlstra bool "Enable IBPB on kernel entry" 2519b648ab48SBen Hutchings depends on CPU_SUP_AMD && X86_64 2520f43b9876SPeter Zijlstra default y 2521f43b9876SPeter Zijlstra help 2522318e8c33SPatrick Bellasi Compile the kernel with support for the retbleed=ibpb and 2523318e8c33SPatrick Bellasi spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations. 2524f43b9876SPeter Zijlstra 25251da8d217SBreno Leitaoconfig MITIGATION_IBRS_ENTRY 2526f43b9876SPeter Zijlstra bool "Enable IBRS on kernel entry" 2527b648ab48SBen Hutchings depends on CPU_SUP_INTEL && X86_64 2528f43b9876SPeter Zijlstra default y 2529f43b9876SPeter Zijlstra help 2530f43b9876SPeter Zijlstra Compile the kernel with support for the spectre_v2=ibrs mitigation. 2531f43b9876SPeter Zijlstra This mitigates both spectre_v2 and retbleed at great cost to 2532f43b9876SPeter Zijlstra performance. 2533f43b9876SPeter Zijlstra 2534a033eec9SBreno Leitaoconfig MITIGATION_SRSO 2535fb3bd914SBorislav Petkov (AMD) bool "Mitigate speculative RAS overflow on AMD" 25360911b8c5SBreno Leitao depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK 2537fb3bd914SBorislav Petkov (AMD) default y 2538fb3bd914SBorislav Petkov (AMD) help 2539fb3bd914SBorislav Petkov (AMD) Enable the SRSO mitigation needed on AMD Zen1-4 machines. 2540fb3bd914SBorislav Petkov (AMD) 25417b75782fSBreno Leitaoconfig MITIGATION_SLS 2542f43b9876SPeter Zijlstra bool "Mitigate Straight-Line-Speculation" 2543f43b9876SPeter Zijlstra depends on CC_HAS_SLS && X86_64 2544f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2545f43b9876SPeter Zijlstra default n 2546f43b9876SPeter Zijlstra help 2547f43b9876SPeter Zijlstra Compile the kernel with straight-line-speculation options to guard 2548f43b9876SPeter Zijlstra against straight line speculation. The kernel image might be slightly 2549f43b9876SPeter Zijlstra larger. 2550f43b9876SPeter Zijlstra 2551225f2bd0SBreno Leitaoconfig MITIGATION_GDS 2552225f2bd0SBreno Leitao bool "Mitigate Gather Data Sampling" 2553225f2bd0SBreno Leitao depends on CPU_SUP_INTEL 2554225f2bd0SBreno Leitao default y 2555225f2bd0SBreno Leitao help 2556225f2bd0SBreno Leitao Enable mitigation for Gather Data Sampling (GDS). GDS is a hardware 2557225f2bd0SBreno Leitao vulnerability which allows unprivileged speculative access to data 2558225f2bd0SBreno Leitao which was previously stored in vector registers. The attacker uses gather 2559225f2bd0SBreno Leitao instructions to infer the stale vector register data. 2560225f2bd0SBreno Leitao 25618076fcdeSPawan Guptaconfig MITIGATION_RFDS 25628076fcdeSPawan Gupta bool "RFDS Mitigation" 25638076fcdeSPawan Gupta depends on CPU_SUP_INTEL 25648076fcdeSPawan Gupta default y 25658076fcdeSPawan Gupta help 25668076fcdeSPawan Gupta Enable mitigation for Register File Data Sampling (RFDS) by default. 25678076fcdeSPawan Gupta RFDS is a hardware vulnerability which affects Intel Atom CPUs. It 25688076fcdeSPawan Gupta allows unprivileged speculative access to stale data previously 25698076fcdeSPawan Gupta stored in floating point, vector and integer registers. 25708076fcdeSPawan Gupta See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst> 25718076fcdeSPawan Gupta 25724f511739SJosh Poimboeufconfig MITIGATION_SPECTRE_BHI 25734f511739SJosh Poimboeuf bool "Mitigate Spectre-BHB (Branch History Injection)" 2574ec9404e4SPawan Gupta depends on CPU_SUP_INTEL 25754f511739SJosh Poimboeuf default y 2576ec9404e4SPawan Gupta help 2577ec9404e4SPawan Gupta Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks 2578ec9404e4SPawan Gupta where the branch history buffer is poisoned to speculatively steer 2579ec9404e4SPawan Gupta indirect branches. 2580ec9404e4SPawan Gupta See <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2581ec9404e4SPawan Gupta 258294045568SBreno Leitaoconfig MITIGATION_MDS 258394045568SBreno Leitao bool "Mitigate Microarchitectural Data Sampling (MDS) hardware bug" 258494045568SBreno Leitao depends on CPU_SUP_INTEL 258594045568SBreno Leitao default y 258694045568SBreno Leitao help 258794045568SBreno Leitao Enable mitigation for Microarchitectural Data Sampling (MDS). MDS is 258894045568SBreno Leitao a hardware vulnerability which allows unprivileged speculative access 258994045568SBreno Leitao to data which is available in various CPU internal buffers. 259094045568SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/mds.rst> 2591b8da0b33SBreno Leitao 2592b8da0b33SBreno Leitaoconfig MITIGATION_TAA 2593b8da0b33SBreno Leitao bool "Mitigate TSX Asynchronous Abort (TAA) hardware bug" 2594b8da0b33SBreno Leitao depends on CPU_SUP_INTEL 2595b8da0b33SBreno Leitao default y 2596b8da0b33SBreno Leitao help 2597b8da0b33SBreno Leitao Enable mitigation for TSX Asynchronous Abort (TAA). TAA is a hardware 2598b8da0b33SBreno Leitao vulnerability that allows unprivileged speculative access to data 2599b8da0b33SBreno Leitao which is available in various CPU internal buffers by using 2600b8da0b33SBreno Leitao asynchronous aborts within an Intel TSX transactional region. 2601b8da0b33SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst> 2602163f9fe6SBreno Leitao 2603163f9fe6SBreno Leitaoconfig MITIGATION_MMIO_STALE_DATA 2604163f9fe6SBreno Leitao bool "Mitigate MMIO Stale Data hardware bug" 2605163f9fe6SBreno Leitao depends on CPU_SUP_INTEL 2606163f9fe6SBreno Leitao default y 2607163f9fe6SBreno Leitao help 2608163f9fe6SBreno Leitao Enable mitigation for MMIO Stale Data hardware bugs. Processor MMIO 2609163f9fe6SBreno Leitao Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO) 2610163f9fe6SBreno Leitao vulnerabilities that can expose data. The vulnerabilities require the 2611163f9fe6SBreno Leitao attacker to have access to MMIO. 2612163f9fe6SBreno Leitao See also 2613163f9fe6SBreno Leitao <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst> 26143a4ee4ffSBreno Leitao 26153a4ee4ffSBreno Leitaoconfig MITIGATION_L1TF 26163a4ee4ffSBreno Leitao bool "Mitigate L1 Terminal Fault (L1TF) hardware bug" 26173a4ee4ffSBreno Leitao depends on CPU_SUP_INTEL 26183a4ee4ffSBreno Leitao default y 26193a4ee4ffSBreno Leitao help 26203a4ee4ffSBreno Leitao Mitigate L1 Terminal Fault (L1TF) hardware bug. L1 Terminal Fault is a 26213a4ee4ffSBreno Leitao hardware vulnerability which allows unprivileged speculative access to data 26223a4ee4ffSBreno Leitao available in the Level 1 Data Cache. 26233a4ee4ffSBreno Leitao See <file:Documentation/admin-guide/hw-vuln/l1tf.rst 2624894e2885SBreno Leitao 2625894e2885SBreno Leitaoconfig MITIGATION_RETBLEED 2626894e2885SBreno Leitao bool "Mitigate RETBleed hardware bug" 2627894e2885SBreno Leitao depends on (CPU_SUP_INTEL && MITIGATION_SPECTRE_V2) || MITIGATION_UNRET_ENTRY || MITIGATION_IBPB_ENTRY 2628894e2885SBreno Leitao default y 2629894e2885SBreno Leitao help 2630894e2885SBreno Leitao Enable mitigation for RETBleed (Arbitrary Speculative Code Execution 2631894e2885SBreno Leitao with Return Instructions) vulnerability. RETBleed is a speculative 2632894e2885SBreno Leitao execution attack which takes advantage of microarchitectural behavior 2633894e2885SBreno Leitao in many modern microprocessors, similar to Spectre v2. An 2634894e2885SBreno Leitao unprivileged attacker can use these flaws to bypass conventional 2635894e2885SBreno Leitao memory security restrictions to gain read access to privileged memory 2636894e2885SBreno Leitao that would otherwise be inaccessible. 2637ca01c0d8SBreno Leitao 2638ca01c0d8SBreno Leitaoconfig MITIGATION_SPECTRE_V1 2639ca01c0d8SBreno Leitao bool "Mitigate SPECTRE V1 hardware bug" 2640ca01c0d8SBreno Leitao default y 2641ca01c0d8SBreno Leitao help 2642ca01c0d8SBreno Leitao Enable mitigation for Spectre V1 (Bounds Check Bypass). Spectre V1 is a 2643ca01c0d8SBreno Leitao class of side channel attacks that takes advantage of speculative 2644ca01c0d8SBreno Leitao execution that bypasses conditional branch instructions used for 2645ca01c0d8SBreno Leitao memory access bounds check. 2646ca01c0d8SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2647a0b02e3fSBreno Leitao 264872c70f48SBreno Leitaoconfig MITIGATION_SPECTRE_V2 264972c70f48SBreno Leitao bool "Mitigate SPECTRE V2 hardware bug" 265072c70f48SBreno Leitao default y 265172c70f48SBreno Leitao help 265272c70f48SBreno Leitao Enable mitigation for Spectre V2 (Branch Target Injection). Spectre 265372c70f48SBreno Leitao V2 is a class of side channel attacks that takes advantage of 265472c70f48SBreno Leitao indirect branch predictors inside the processor. In Spectre variant 2 265572c70f48SBreno Leitao attacks, the attacker can steer speculative indirect branches in the 265672c70f48SBreno Leitao victim to gadget code by poisoning the branch target buffer of a CPU 265772c70f48SBreno Leitao used for predicting indirect branch addresses. 265872c70f48SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 265972c70f48SBreno Leitao 2660a0b02e3fSBreno Leitaoconfig MITIGATION_SRBDS 2661a0b02e3fSBreno Leitao bool "Mitigate Special Register Buffer Data Sampling (SRBDS) hardware bug" 2662a0b02e3fSBreno Leitao depends on CPU_SUP_INTEL 2663a0b02e3fSBreno Leitao default y 2664a0b02e3fSBreno Leitao help 2665a0b02e3fSBreno Leitao Enable mitigation for Special Register Buffer Data Sampling (SRBDS). 2666a0b02e3fSBreno Leitao SRBDS is a hardware vulnerability that allows Microarchitectural Data 2667a0b02e3fSBreno Leitao Sampling (MDS) techniques to infer values returned from special 2668a0b02e3fSBreno Leitao register accesses. An unprivileged user can extract values returned 2669a0b02e3fSBreno Leitao from RDRAND and RDSEED executed on another core or sibling thread 2670a0b02e3fSBreno Leitao using MDS techniques. 2671a0b02e3fSBreno Leitao See also 2672a0b02e3fSBreno Leitao <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst> 2673b908cdabSBreno Leitao 2674b908cdabSBreno Leitaoconfig MITIGATION_SSB 2675b908cdabSBreno Leitao bool "Mitigate Speculative Store Bypass (SSB) hardware bug" 2676b908cdabSBreno Leitao default y 2677b908cdabSBreno Leitao help 2678b908cdabSBreno Leitao Enable mitigation for Speculative Store Bypass (SSB). SSB is a 2679b908cdabSBreno Leitao hardware security vulnerability and its exploitation takes advantage 2680b908cdabSBreno Leitao of speculative execution in a similar way to the Meltdown and Spectre 2681b908cdabSBreno Leitao security vulnerabilities. 2682b908cdabSBreno Leitao 26838754e67aSPawan Guptaconfig MITIGATION_ITS 26848754e67aSPawan Gupta bool "Enable Indirect Target Selection mitigation" 26858754e67aSPawan Gupta depends on CPU_SUP_INTEL && X86_64 26868754e67aSPawan Gupta depends on MITIGATION_RETPOLINE && MITIGATION_RETHUNK 2687872df34dSPeter Zijlstra select EXECMEM 26888754e67aSPawan Gupta default y 26898754e67aSPawan Gupta help 26908754e67aSPawan Gupta Enable Indirect Target Selection (ITS) mitigation. ITS is a bug in 26918754e67aSPawan Gupta BPU on some Intel CPUs that may allow Spectre V2 style attacks. If 26928754e67aSPawan Gupta disabled, mitigation cannot be enabled via cmdline. 26938754e67aSPawan Gupta See <file:Documentation/admin-guide/hw-vuln/indirect-target-selection.rst> 26948754e67aSPawan Gupta 2695d8010d4bSBorislav Petkov (AMD)config MITIGATION_TSA 2696d8010d4bSBorislav Petkov (AMD) bool "Mitigate Transient Scheduler Attacks" 2697d8010d4bSBorislav Petkov (AMD) depends on CPU_SUP_AMD 2698d8010d4bSBorislav Petkov (AMD) default y 2699d8010d4bSBorislav Petkov (AMD) help 2700d8010d4bSBorislav Petkov (AMD) Enable mitigation for Transient Scheduler Attacks. TSA is a hardware 2701d8010d4bSBorislav Petkov (AMD) security vulnerability on AMD CPUs which can lead to forwarding of 2702d8010d4bSBorislav Petkov (AMD) invalid info to subsequent instructions and thus can affect their 2703d8010d4bSBorislav Petkov (AMD) timing and thereby cause a leakage. 2704*556c1ad6SPawan Gupta 2705*556c1ad6SPawan Guptaconfig MITIGATION_VMSCAPE 2706*556c1ad6SPawan Gupta bool "Mitigate VMSCAPE" 2707*556c1ad6SPawan Gupta depends on KVM 2708*556c1ad6SPawan Gupta default y 2709*556c1ad6SPawan Gupta help 2710*556c1ad6SPawan Gupta Enable mitigation for VMSCAPE attacks. VMSCAPE is a hardware security 2711*556c1ad6SPawan Gupta vulnerability on Intel and AMD CPUs that may allow a guest to do 2712*556c1ad6SPawan Gupta Spectre v2 style attacks on userspace hypervisor. 2713f43b9876SPeter Zijlstraendif 2714f43b9876SPeter Zijlstra 27153072e413SMichal Hockoconfig ARCH_HAS_ADD_PAGES 27163072e413SMichal Hocko def_bool y 27175c11f00bSDavid Hildenbrand depends on ARCH_ENABLE_MEMORY_HOTPLUG 27183072e413SMichal Hocko 2719da85f865SBjorn Helgaasmenu "Power management and ACPI options" 2720e279b6c1SSam Ravnborg 2721e279b6c1SSam Ravnborgconfig ARCH_HIBERNATION_HEADER 27223c2362e6SHarvey Harrison def_bool y 272344556530SZhimin Gu depends on HIBERNATION 2724e279b6c1SSam Ravnborg 2725e279b6c1SSam Ravnborgsource "kernel/power/Kconfig" 2726e279b6c1SSam Ravnborg 2727e279b6c1SSam Ravnborgsource "drivers/acpi/Kconfig" 2728e279b6c1SSam Ravnborg 2729a6b68076SAndi Kleenconfig X86_APM_BOOT 27306fc108a0SJan Beulich def_bool y 2731282e5aabSPaul Bolle depends on APM 2732a6b68076SAndi Kleen 2733e279b6c1SSam Ravnborgmenuconfig APM 2734e279b6c1SSam Ravnborg tristate "APM (Advanced Power Management) BIOS support" 2735efefa6f6SIngo Molnar depends on X86_32 && PM_SLEEP 2736a7f7f624SMasahiro Yamada help 2737e279b6c1SSam Ravnborg APM is a BIOS specification for saving power using several different 2738e279b6c1SSam Ravnborg techniques. This is mostly useful for battery powered laptops with 2739e279b6c1SSam Ravnborg APM compliant BIOSes. If you say Y here, the system time will be 2740e279b6c1SSam Ravnborg reset after a RESUME operation, the /proc/apm device will provide 2741e279b6c1SSam Ravnborg battery status information, and user-space programs will receive 2742e279b6c1SSam Ravnborg notification of APM "events" (e.g. battery status change). 2743e279b6c1SSam Ravnborg 2744e279b6c1SSam Ravnborg If you select "Y" here, you can disable actual use of the APM 2745e279b6c1SSam Ravnborg BIOS by passing the "apm=off" option to the kernel at boot time. 2746e279b6c1SSam Ravnborg 2747e279b6c1SSam Ravnborg Note that the APM support is almost completely disabled for 2748e279b6c1SSam Ravnborg machines with more than one CPU. 2749e279b6c1SSam Ravnborg 2750e279b6c1SSam Ravnborg In order to use APM, you will need supporting software. For location 2751151f4e2bSMauro Carvalho Chehab and more information, read <file:Documentation/power/apm-acpi.rst> 27522dc98fd3SMichael Witten and the Battery Powered Linux mini-HOWTO, available from 2753e279b6c1SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 2754e279b6c1SSam Ravnborg 2755e279b6c1SSam Ravnborg This driver does not spin down disk drives (see the hdparm(8) 2756e279b6c1SSam Ravnborg manpage ("man 8 hdparm") for that), and it doesn't turn off 2757e279b6c1SSam Ravnborg VESA-compliant "green" monitors. 2758e279b6c1SSam Ravnborg 2759e279b6c1SSam Ravnborg This driver does not support the TI 4000M TravelMate and the ACER 2760e279b6c1SSam Ravnborg 486/DX4/75 because they don't have compliant BIOSes. Many "green" 2761e279b6c1SSam Ravnborg desktop machines also don't have compliant BIOSes, and this driver 2762e279b6c1SSam Ravnborg may cause those machines to panic during the boot phase. 2763e279b6c1SSam Ravnborg 2764e279b6c1SSam Ravnborg Generally, if you don't have a battery in your machine, there isn't 2765e279b6c1SSam Ravnborg much point in using this driver and you should say N. If you get 2766e279b6c1SSam Ravnborg random kernel OOPSes or reboots that don't seem to be related to 2767e279b6c1SSam Ravnborg anything, try disabling/enabling this option (or disabling/enabling 2768e279b6c1SSam Ravnborg APM in your BIOS). 2769e279b6c1SSam Ravnborg 2770e279b6c1SSam Ravnborg Some other things you should try when experiencing seemingly random, 2771e279b6c1SSam Ravnborg "weird" problems: 2772e279b6c1SSam Ravnborg 2773e279b6c1SSam Ravnborg 1) make sure that you have enough swap space and that it is 2774e279b6c1SSam Ravnborg enabled. 27757987448fSStephen Kitt 2) pass the "idle=poll" option to the kernel 2776e279b6c1SSam Ravnborg 3) switch on floating point emulation in the kernel and pass 2777e279b6c1SSam Ravnborg the "no387" option to the kernel 2778e279b6c1SSam Ravnborg 4) pass the "floppy=nodma" option to the kernel 2779e279b6c1SSam Ravnborg 5) pass the "mem=4M" option to the kernel (thereby disabling 2780e279b6c1SSam Ravnborg all but the first 4 MB of RAM) 2781e279b6c1SSam Ravnborg 6) make sure that the CPU is not over clocked. 2782e279b6c1SSam Ravnborg 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/> 2783e279b6c1SSam Ravnborg 8) disable the cache from your BIOS settings 2784e279b6c1SSam Ravnborg 9) install a fan for the video card or exchange video RAM 2785e279b6c1SSam Ravnborg 10) install a better fan for the CPU 2786e279b6c1SSam Ravnborg 11) exchange RAM chips 2787e279b6c1SSam Ravnborg 12) exchange the motherboard. 2788e279b6c1SSam Ravnborg 2789e279b6c1SSam Ravnborg To compile this driver as a module, choose M here: the 2790e279b6c1SSam Ravnborg module will be called apm. 2791e279b6c1SSam Ravnborg 2792e279b6c1SSam Ravnborgif APM 2793e279b6c1SSam Ravnborg 2794e279b6c1SSam Ravnborgconfig APM_IGNORE_USER_SUSPEND 2795e279b6c1SSam Ravnborg bool "Ignore USER SUSPEND" 2796a7f7f624SMasahiro Yamada help 2797e279b6c1SSam Ravnborg This option will ignore USER SUSPEND requests. On machines with a 2798e279b6c1SSam Ravnborg compliant APM BIOS, you want to say N. However, on the NEC Versa M 2799e279b6c1SSam Ravnborg series notebooks, it is necessary to say Y because of a BIOS bug. 2800e279b6c1SSam Ravnborg 2801e279b6c1SSam Ravnborgconfig APM_DO_ENABLE 2802e279b6c1SSam Ravnborg bool "Enable PM at boot time" 2803a7f7f624SMasahiro Yamada help 2804e279b6c1SSam Ravnborg Enable APM features at boot time. From page 36 of the APM BIOS 2805e279b6c1SSam Ravnborg specification: "When disabled, the APM BIOS does not automatically 2806e279b6c1SSam Ravnborg power manage devices, enter the Standby State, enter the Suspend 2807e279b6c1SSam Ravnborg State, or take power saving steps in response to CPU Idle calls." 2808e279b6c1SSam Ravnborg This driver will make CPU Idle calls when Linux is idle (unless this 2809e279b6c1SSam Ravnborg feature is turned off -- see "Do CPU IDLE calls", below). This 2810e279b6c1SSam Ravnborg should always save battery power, but more complicated APM features 2811e279b6c1SSam Ravnborg will be dependent on your BIOS implementation. You may need to turn 2812e279b6c1SSam Ravnborg this option off if your computer hangs at boot time when using APM 2813e279b6c1SSam Ravnborg support, or if it beeps continuously instead of suspending. Turn 2814e279b6c1SSam Ravnborg this off if you have a NEC UltraLite Versa 33/C or a Toshiba 2815e279b6c1SSam Ravnborg T400CDT. This is off by default since most machines do fine without 2816e279b6c1SSam Ravnborg this feature. 2817e279b6c1SSam Ravnborg 2818e279b6c1SSam Ravnborgconfig APM_CPU_IDLE 2819dd8af076SLen Brown depends on CPU_IDLE 2820e279b6c1SSam Ravnborg bool "Make CPU Idle calls when idle" 2821a7f7f624SMasahiro Yamada help 2822e279b6c1SSam Ravnborg Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. 2823e279b6c1SSam Ravnborg On some machines, this can activate improved power savings, such as 2824e279b6c1SSam Ravnborg a slowed CPU clock rate, when the machine is idle. These idle calls 2825e279b6c1SSam Ravnborg are made after the idle loop has run for some length of time (e.g., 2826e279b6c1SSam Ravnborg 333 mS). On some machines, this will cause a hang at boot time or 2827e279b6c1SSam Ravnborg whenever the CPU becomes idle. (On machines with more than one CPU, 2828e279b6c1SSam Ravnborg this option does nothing.) 2829e279b6c1SSam Ravnborg 2830e279b6c1SSam Ravnborgconfig APM_DISPLAY_BLANK 2831e279b6c1SSam Ravnborg bool "Enable console blanking using APM" 2832a7f7f624SMasahiro Yamada help 2833e279b6c1SSam Ravnborg Enable console blanking using the APM. Some laptops can use this to 2834e279b6c1SSam Ravnborg turn off the LCD backlight when the screen blanker of the Linux 2835e279b6c1SSam Ravnborg virtual console blanks the screen. Note that this is only used by 2836e279b6c1SSam Ravnborg the virtual console screen blanker, and won't turn off the backlight 2837e279b6c1SSam Ravnborg when using the X Window system. This also doesn't have anything to 2838e279b6c1SSam Ravnborg do with your VESA-compliant power-saving monitor. Further, this 2839e279b6c1SSam Ravnborg option doesn't work for all laptops -- it might not turn off your 2840e279b6c1SSam Ravnborg backlight at all, or it might print a lot of errors to the console, 2841e279b6c1SSam Ravnborg especially if you are using gpm. 2842e279b6c1SSam Ravnborg 2843e279b6c1SSam Ravnborgconfig APM_ALLOW_INTS 2844e279b6c1SSam Ravnborg bool "Allow interrupts during APM BIOS calls" 2845a7f7f624SMasahiro Yamada help 2846e279b6c1SSam Ravnborg Normally we disable external interrupts while we are making calls to 2847e279b6c1SSam Ravnborg the APM BIOS as a measure to lessen the effects of a badly behaving 2848e279b6c1SSam Ravnborg BIOS implementation. The BIOS should reenable interrupts if it 2849e279b6c1SSam Ravnborg needs to. Unfortunately, some BIOSes do not -- especially those in 2850e279b6c1SSam Ravnborg many of the newer IBM Thinkpads. If you experience hangs when you 2851e279b6c1SSam Ravnborg suspend, try setting this to Y. Otherwise, say N. 2852e279b6c1SSam Ravnborg 2853e279b6c1SSam Ravnborgendif # APM 2854e279b6c1SSam Ravnborg 2855bb0a56ecSDave Jonessource "drivers/cpufreq/Kconfig" 2856e279b6c1SSam Ravnborg 2857e279b6c1SSam Ravnborgsource "drivers/cpuidle/Kconfig" 2858e279b6c1SSam Ravnborg 285927471fdbSAndy Henroidsource "drivers/idle/Kconfig" 286027471fdbSAndy Henroid 2861e279b6c1SSam Ravnborgendmenu 2862e279b6c1SSam Ravnborg 2863e279b6c1SSam Ravnborgmenu "Bus options (PCI etc.)" 2864e279b6c1SSam Ravnborg 2865e279b6c1SSam Ravnborgchoice 2866e279b6c1SSam Ravnborg prompt "PCI access mode" 2867efefa6f6SIngo Molnar depends on X86_32 && PCI 2868e279b6c1SSam Ravnborg default PCI_GOANY 2869a7f7f624SMasahiro Yamada help 2870e279b6c1SSam Ravnborg On PCI systems, the BIOS can be used to detect the PCI devices and 2871e279b6c1SSam Ravnborg determine their configuration. However, some old PCI motherboards 2872e279b6c1SSam Ravnborg have BIOS bugs and may crash if this is done. Also, some embedded 2873e279b6c1SSam Ravnborg PCI-based systems don't have any BIOS at all. Linux can also try to 2874e279b6c1SSam Ravnborg detect the PCI hardware directly without using the BIOS. 2875e279b6c1SSam Ravnborg 2876e279b6c1SSam Ravnborg With this option, you can specify how Linux should detect the 2877e279b6c1SSam Ravnborg PCI devices. If you choose "BIOS", the BIOS will be used, 2878e279b6c1SSam Ravnborg if you choose "Direct", the BIOS won't be used, and if you 2879e279b6c1SSam Ravnborg choose "MMConfig", then PCI Express MMCONFIG will be used. 2880e279b6c1SSam Ravnborg If you choose "Any", the kernel will try MMCONFIG, then the 2881e279b6c1SSam Ravnborg direct access method and falls back to the BIOS if that doesn't 2882e279b6c1SSam Ravnborg work. If unsure, go with the default, which is "Any". 2883e279b6c1SSam Ravnborg 2884e279b6c1SSam Ravnborgconfig PCI_GOBIOS 2885e279b6c1SSam Ravnborg bool "BIOS" 2886e279b6c1SSam Ravnborg 2887e279b6c1SSam Ravnborgconfig PCI_GOMMCONFIG 2888e279b6c1SSam Ravnborg bool "MMConfig" 2889e279b6c1SSam Ravnborg 2890e279b6c1SSam Ravnborgconfig PCI_GODIRECT 2891e279b6c1SSam Ravnborg bool "Direct" 2892e279b6c1SSam Ravnborg 28933ef0e1f8SAndres Salomonconfig PCI_GOOLPC 289476fb6570SDaniel Drake bool "OLPC XO-1" 28953ef0e1f8SAndres Salomon depends on OLPC 28963ef0e1f8SAndres Salomon 28972bdd1b03SAndres Salomonconfig PCI_GOANY 28982bdd1b03SAndres Salomon bool "Any" 28992bdd1b03SAndres Salomon 2900e279b6c1SSam Ravnborgendchoice 2901e279b6c1SSam Ravnborg 2902e279b6c1SSam Ravnborgconfig PCI_BIOS 29033c2362e6SHarvey Harrison def_bool y 2904efefa6f6SIngo Molnar depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY) 2905e279b6c1SSam Ravnborg 2906e279b6c1SSam Ravnborg# x86-64 doesn't support PCI BIOS access from long mode so always go direct. 2907e279b6c1SSam Ravnborgconfig PCI_DIRECT 29083c2362e6SHarvey Harrison def_bool y 29090aba496fSShaohua Li depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG)) 2910e279b6c1SSam Ravnborg 2911e279b6c1SSam Ravnborgconfig PCI_MMCONFIG 2912b45c9f36SJan Kiszka bool "Support mmconfig PCI config space access" if X86_64 2913b45c9f36SJan Kiszka default y 29144590d98fSAndy Shevchenko depends on PCI && (ACPI || JAILHOUSE_GUEST) 2915b45c9f36SJan Kiszka depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG) 291621d8fb8dSMateusz Jończyk help 291721d8fb8dSMateusz Jończyk Add support for accessing the PCI configuration space as a memory 291821d8fb8dSMateusz Jończyk mapped area. It is the recommended method if the system supports 291921d8fb8dSMateusz Jończyk this (it must have PCI Express and ACPI for it to be available). 292021d8fb8dSMateusz Jończyk 292121d8fb8dSMateusz Jończyk In the unlikely case that enabling this configuration option causes 292221d8fb8dSMateusz Jończyk problems, the mechanism can be switched off with the 'pci=nommconf' 292321d8fb8dSMateusz Jończyk command line parameter. 292421d8fb8dSMateusz Jończyk 292521d8fb8dSMateusz Jończyk Say N only if you are sure that your platform does not support this 292621d8fb8dSMateusz Jończyk access method or you have problems caused by it. 292721d8fb8dSMateusz Jończyk 292821d8fb8dSMateusz Jończyk Say Y otherwise. 2929e279b6c1SSam Ravnborg 29303ef0e1f8SAndres Salomonconfig PCI_OLPC 29312bdd1b03SAndres Salomon def_bool y 29322bdd1b03SAndres Salomon depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY) 29333ef0e1f8SAndres Salomon 2934b5401a96SAlex Nixonconfig PCI_XEN 2935b5401a96SAlex Nixon def_bool y 2936b5401a96SAlex Nixon depends on PCI && XEN 2937b5401a96SAlex Nixon 29388364e1f8SJan Kiszkaconfig MMCONF_FAM10H 29398364e1f8SJan Kiszka def_bool y 29408364e1f8SJan Kiszka depends on X86_64 && PCI_MMCONFIG && ACPI 2941e279b6c1SSam Ravnborg 29423f6ea84aSIra W. Snyderconfig PCI_CNB20LE_QUIRK 2943d9f87802SMateusz Jończyk bool "Read PCI host bridge windows from the CNB20LE chipset" if EXPERT 2944d9f87802SMateusz Jończyk depends on X86_32 && PCI 29453f6ea84aSIra W. Snyder help 29463f6ea84aSIra W. Snyder Read the PCI windows out of the CNB20LE host bridge. This allows 29473f6ea84aSIra W. Snyder PCI hotplug to work on systems with the CNB20LE chipset which do 29483f6ea84aSIra W. Snyder not have ACPI. 29493f6ea84aSIra W. Snyder 2950d9f87802SMateusz Jończyk The ServerWorks (later Broadcom) CNB20LE was a chipset designed 2951d9f87802SMateusz Jończyk most probably only for Pentium III. 2952d9f87802SMateusz Jończyk 2953d9f87802SMateusz Jończyk To find out if you have such a chipset, search for a PCI device with 2954d9f87802SMateusz Jończyk 1166:0009 PCI IDs, for example by executing 2955d9f87802SMateusz Jończyk lspci -nn | grep '1166:0009' 2956d9f87802SMateusz Jończyk The code is inactive if there is none. 2957d9f87802SMateusz Jończyk 295864a5fed6SBjorn Helgaas There's no public spec for this chipset, and this functionality 295964a5fed6SBjorn Helgaas is known to be incomplete. 296064a5fed6SBjorn Helgaas 296164a5fed6SBjorn Helgaas You should say N unless you know you need this. 296264a5fed6SBjorn Helgaas 29633a495511SWilliam Breathitt Grayconfig ISA_BUS 296417a2a129SWilliam Breathitt Gray bool "ISA bus support on modern systems" if EXPERT 29653a495511SWilliam Breathitt Gray help 296617a2a129SWilliam Breathitt Gray Expose ISA bus device drivers and options available for selection and 296717a2a129SWilliam Breathitt Gray configuration. Enable this option if your target machine has an ISA 296817a2a129SWilliam Breathitt Gray bus. ISA is an older system, displaced by PCI and newer bus 296917a2a129SWilliam Breathitt Gray architectures -- if your target machine is modern, it probably does 297017a2a129SWilliam Breathitt Gray not have an ISA bus. 29713a495511SWilliam Breathitt Gray 29723a495511SWilliam Breathitt Gray If unsure, say N. 29733a495511SWilliam Breathitt Gray 29741c00f016SDavid Rientjes# x86_64 have no ISA slots, but can have ISA-style DMA. 2975e279b6c1SSam Ravnborgconfig ISA_DMA_API 29761c00f016SDavid Rientjes bool "ISA-style DMA support" if (X86_64 && EXPERT) 29771c00f016SDavid Rientjes default y 29781c00f016SDavid Rientjes help 29791c00f016SDavid Rientjes Enables ISA-style DMA support for devices requiring such controllers. 29801c00f016SDavid Rientjes If unsure, say Y. 2981e279b6c1SSam Ravnborg 298251e68d05SLinus Torvaldsif X86_32 298351e68d05SLinus Torvalds 2984e279b6c1SSam Ravnborgconfig ISA 2985e279b6c1SSam Ravnborg bool "ISA support" 2986a7f7f624SMasahiro Yamada help 2987e279b6c1SSam Ravnborg Find out whether you have ISA slots on your motherboard. ISA is the 2988e279b6c1SSam Ravnborg name of a bus system, i.e. the way the CPU talks to the other stuff 2989e279b6c1SSam Ravnborg inside your box. Other bus systems are PCI, EISA, MicroChannel 2990e279b6c1SSam Ravnborg (MCA) or VESA. ISA is an older system, now being displaced by PCI; 2991e279b6c1SSam Ravnborg newer boards don't support it. If you have ISA, say Y, otherwise N. 2992e279b6c1SSam Ravnborg 2993e279b6c1SSam Ravnborgconfig SCx200 2994e279b6c1SSam Ravnborg tristate "NatSemi SCx200 support" 2995a7f7f624SMasahiro Yamada help 2996e279b6c1SSam Ravnborg This provides basic support for National Semiconductor's 2997e279b6c1SSam Ravnborg (now AMD's) Geode processors. The driver probes for the 2998e279b6c1SSam Ravnborg PCI-IDs of several on-chip devices, so its a good dependency 2999e279b6c1SSam Ravnborg for other scx200_* drivers. 3000e279b6c1SSam Ravnborg 3001e279b6c1SSam Ravnborg If compiled as a module, the driver is named scx200. 3002e279b6c1SSam Ravnborg 3003e279b6c1SSam Ravnborgconfig SCx200HR_TIMER 3004e279b6c1SSam Ravnborg tristate "NatSemi SCx200 27MHz High-Resolution Timer Support" 3005592913ecSJohn Stultz depends on SCx200 3006e279b6c1SSam Ravnborg default y 3007a7f7f624SMasahiro Yamada help 3008e279b6c1SSam Ravnborg This driver provides a clocksource built upon the on-chip 3009e279b6c1SSam Ravnborg 27MHz high-resolution timer. Its also a workaround for 3010e279b6c1SSam Ravnborg NSC Geode SC-1100's buggy TSC, which loses time when the 3011e279b6c1SSam Ravnborg processor goes idle (as is done by the scheduler). The 3012e279b6c1SSam Ravnborg other workaround is idle=poll boot option. 3013e279b6c1SSam Ravnborg 30143ef0e1f8SAndres Salomonconfig OLPC 30153ef0e1f8SAndres Salomon bool "One Laptop Per Child support" 301654008979SThomas Gleixner depends on !X86_PAE 30173c554946SAndres Salomon select GPIOLIB 3018dc3119e7SThomas Gleixner select OF 301945bb1674SDaniel Drake select OF_PROMTREE 3020b4e51854SGrant Likely select IRQ_DOMAIN 30210c3d931bSLubomir Rintel select OLPC_EC 3022a7f7f624SMasahiro Yamada help 30233ef0e1f8SAndres Salomon Add support for detecting the unique features of the OLPC 30243ef0e1f8SAndres Salomon XO hardware. 30253ef0e1f8SAndres Salomon 3026a3128588SDaniel Drakeconfig OLPC_XO1_PM 3027a3128588SDaniel Drake bool "OLPC XO-1 Power Management" 3028fa112cf1SBorislav Petkov depends on OLPC && MFD_CS5535=y && PM_SLEEP 3029a7f7f624SMasahiro Yamada help 303097c4cb71SDaniel Drake Add support for poweroff and suspend of the OLPC XO-1 laptop. 3031bf1ebf00SDaniel Drake 3032cfee9597SDaniel Drakeconfig OLPC_XO1_RTC 3033cfee9597SDaniel Drake bool "OLPC XO-1 Real Time Clock" 3034cfee9597SDaniel Drake depends on OLPC_XO1_PM && RTC_DRV_CMOS 3035a7f7f624SMasahiro Yamada help 3036cfee9597SDaniel Drake Add support for the XO-1 real time clock, which can be used as a 3037cfee9597SDaniel Drake programmable wakeup source. 3038cfee9597SDaniel Drake 30397feda8e9SDaniel Drakeconfig OLPC_XO1_SCI 30407feda8e9SDaniel Drake bool "OLPC XO-1 SCI extras" 304192e830f2SArnd Bergmann depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y 3042ed8e47feSRandy Dunlap depends on INPUT=y 3043d8d01a63SDaniel Drake select POWER_SUPPLY 3044a7f7f624SMasahiro Yamada help 30457feda8e9SDaniel Drake Add support for SCI-based features of the OLPC XO-1 laptop: 30467bc74b3dSDaniel Drake - EC-driven system wakeups 30477feda8e9SDaniel Drake - Power button 30487bc74b3dSDaniel Drake - Ebook switch 30492cf2baeaSDaniel Drake - Lid switch 3050e1040ac6SDaniel Drake - AC adapter status updates 3051e1040ac6SDaniel Drake - Battery status updates 30527feda8e9SDaniel Drake 3053a0f30f59SDaniel Drakeconfig OLPC_XO15_SCI 3054a0f30f59SDaniel Drake bool "OLPC XO-1.5 SCI extras" 3055d8d01a63SDaniel Drake depends on OLPC && ACPI 3056d8d01a63SDaniel Drake select POWER_SUPPLY 3057a7f7f624SMasahiro Yamada help 3058a0f30f59SDaniel Drake Add support for SCI-based features of the OLPC XO-1.5 laptop: 3059a0f30f59SDaniel Drake - EC-driven system wakeups 3060a0f30f59SDaniel Drake - AC adapter status updates 3061a0f30f59SDaniel Drake - Battery status updates 3062e279b6c1SSam Ravnborg 3063298c9babSDmitry Torokhovconfig GEODE_COMMON 3064298c9babSDmitry Torokhov bool 3065298c9babSDmitry Torokhov 3066d4f3e350SEd Wildgooseconfig ALIX 3067d4f3e350SEd Wildgoose bool "PCEngines ALIX System Support (LED setup)" 3068d4f3e350SEd Wildgoose select GPIOLIB 3069298c9babSDmitry Torokhov select GEODE_COMMON 3070a7f7f624SMasahiro Yamada help 3071d4f3e350SEd Wildgoose This option enables system support for the PCEngines ALIX. 3072d4f3e350SEd Wildgoose At present this just sets up LEDs for GPIO control on 3073d4f3e350SEd Wildgoose ALIX2/3/6 boards. However, other system specific setup should 3074d4f3e350SEd Wildgoose get added here. 3075d4f3e350SEd Wildgoose 3076d4f3e350SEd Wildgoose Note: You must still enable the drivers for GPIO and LED support 3077d4f3e350SEd Wildgoose (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs 3078d4f3e350SEd Wildgoose 3079d4f3e350SEd Wildgoose Note: You have to set alix.force=1 for boards with Award BIOS. 3080d4f3e350SEd Wildgoose 3081da4e3302SPhilip Prindevilleconfig NET5501 3082da4e3302SPhilip Prindeville bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)" 3083da4e3302SPhilip Prindeville select GPIOLIB 3084298c9babSDmitry Torokhov select GEODE_COMMON 3085a7f7f624SMasahiro Yamada help 3086da4e3302SPhilip Prindeville This option enables system support for the Soekris Engineering net5501. 3087da4e3302SPhilip Prindeville 30883197059aSPhilip A. Prindevilleconfig GEOS 30893197059aSPhilip A. Prindeville bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)" 30903197059aSPhilip A. Prindeville select GPIOLIB 3091298c9babSDmitry Torokhov select GEODE_COMMON 30923197059aSPhilip A. Prindeville depends on DMI 3093a7f7f624SMasahiro Yamada help 30943197059aSPhilip A. Prindeville This option enables system support for the Traverse Technologies GEOS. 30953197059aSPhilip A. Prindeville 30967d029125SVivien Didelotconfig TS5500 30977d029125SVivien Didelot bool "Technologic Systems TS-5500 platform support" 30987d029125SVivien Didelot depends on MELAN 30997d029125SVivien Didelot select CHECK_SIGNATURE 31007d029125SVivien Didelot select NEW_LEDS 31017d029125SVivien Didelot select LEDS_CLASS 3102a7f7f624SMasahiro Yamada help 31037d029125SVivien Didelot This option enables system support for the Technologic Systems TS-5500. 31047d029125SVivien Didelot 3105e279b6c1SSam Ravnborgendif # X86_32 3106e279b6c1SSam Ravnborg 310723ac4ae8SAndreas Herrmannconfig AMD_NB 3108e279b6c1SSam Ravnborg def_bool y 3109e6e6e5e8SYazen Ghannam depends on AMD_NODE 3110e6e6e5e8SYazen Ghannam 3111e6e6e5e8SYazen Ghannamconfig AMD_NODE 3112e6e6e5e8SYazen Ghannam def_bool y 31130e152cd7SBorislav Petkov depends on CPU_SUP_AMD && PCI 3114e279b6c1SSam Ravnborg 3115e279b6c1SSam Ravnborgendmenu 3116e279b6c1SSam Ravnborg 31171572497cSChristoph Hellwigmenu "Binary Emulations" 3118e279b6c1SSam Ravnborg 3119e279b6c1SSam Ravnborgconfig IA32_EMULATION 3120e279b6c1SSam Ravnborg bool "IA32 Emulation" 3121e279b6c1SSam Ravnborg depends on X86_64 312239f88911SIngo Molnar select ARCH_WANT_OLD_COMPAT_IPC 3123d1603990SRandy Dunlap select BINFMT_ELF 312439f88911SIngo Molnar select COMPAT_OLD_SIGACTION 3125a7f7f624SMasahiro Yamada help 31265fd92e65SH. J. Lu Include code to run legacy 32-bit programs under a 31275fd92e65SH. J. Lu 64-bit kernel. You should likely turn this on, unless you're 31285fd92e65SH. J. Lu 100% sure that you don't have any 32-bit programs left. 3129e279b6c1SSam Ravnborg 3130a11e0975SNikolay Borisovconfig IA32_EMULATION_DEFAULT_DISABLED 3131a11e0975SNikolay Borisov bool "IA32 emulation disabled by default" 3132a11e0975SNikolay Borisov default n 3133a11e0975SNikolay Borisov depends on IA32_EMULATION 3134a11e0975SNikolay Borisov help 3135a11e0975SNikolay Borisov Make IA32 emulation disabled by default. This prevents loading 32-bit 3136a11e0975SNikolay Borisov processes and access to 32-bit syscalls. If unsure, leave it to its 3137a11e0975SNikolay Borisov default value. 3138a11e0975SNikolay Borisov 313983a44a4fSMasahiro Yamadaconfig X86_X32_ABI 31406ea30386SKees Cook bool "x32 ABI for 64-bit mode" 31419b54050bSBrian Gerst depends on X86_64 3142aaeed6ecSNathan Chancellor # llvm-objcopy does not convert x86_64 .note.gnu.property or 3143aaeed6ecSNathan Chancellor # compressed debug sections to x86_x32 properly: 3144aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/514 3145aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/1141 3146aaeed6ecSNathan Chancellor depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm) 3147a7f7f624SMasahiro Yamada help 31485fd92e65SH. J. Lu Include code to run binaries for the x32 native 32-bit ABI 31495fd92e65SH. J. Lu for 64-bit processors. An x32 process gets access to the 31505fd92e65SH. J. Lu full 64-bit register file and wide data path while leaving 31515fd92e65SH. J. Lu pointers at 32 bits for smaller memory footprint. 31525fd92e65SH. J. Lu 3153953fee1dSIngo Molnarconfig COMPAT_32 3154953fee1dSIngo Molnar def_bool y 3155953fee1dSIngo Molnar depends on IA32_EMULATION || X86_32 3156953fee1dSIngo Molnar select HAVE_UID16 3157953fee1dSIngo Molnar select OLD_SIGSUSPEND3 3158953fee1dSIngo Molnar 3159e279b6c1SSam Ravnborgconfig COMPAT 31603c2362e6SHarvey Harrison def_bool y 316183a44a4fSMasahiro Yamada depends on IA32_EMULATION || X86_X32_ABI 3162e279b6c1SSam Ravnborg 3163e279b6c1SSam Ravnborgconfig COMPAT_FOR_U64_ALIGNMENT 31643120e25eSJan Beulich def_bool y 3165a9251280SLinus Torvalds depends on COMPAT 3166ee009e4aSDavid Howells 3167e279b6c1SSam Ravnborgendmenu 3168e279b6c1SSam Ravnborg 3169e5beae16SKeith Packardconfig HAVE_ATOMIC_IOMAP 3170e5beae16SKeith Packard def_bool y 3171e5beae16SKeith Packard depends on X86_32 3172e5beae16SKeith Packard 3173edf88417SAvi Kivitysource "arch/x86/kvm/Kconfig" 31745e8ebd84SJason A. Donenfeld 31753d37d939SH. Peter Anvin (Intel)source "arch/x86/Kconfig.cpufeatures" 31763d37d939SH. Peter Anvin (Intel) 31775e8ebd84SJason A. Donenfeldsource "arch/x86/Kconfig.assembler" 3178