1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 2daa93fabSSam Ravnborg# Select 32 or 64 bit 3daa93fabSSam Ravnborgconfig 64BIT 4104daea1SMasahiro Yamada bool "64-bit kernel" if "$(ARCH)" = "x86" 5104daea1SMasahiro Yamada default "$(ARCH)" != "i386" 6a7f7f624SMasahiro Yamada help 7daa93fabSSam Ravnborg Say yes to build a 64-bit kernel - formerly known as x86_64 8daa93fabSSam Ravnborg Say no to build a 32-bit kernel - formerly known as i386 9daa93fabSSam Ravnborg 10daa93fabSSam Ravnborgconfig X86_32 113120e25eSJan Beulich def_bool y 123120e25eSJan Beulich depends on !64BIT 13341c787eSIngo Molnar # Options that are inherently 32-bit kernel only: 14341c787eSIngo Molnar select ARCH_WANT_IPC_PARSE_VERSION 15341c787eSIngo Molnar select CLKSRC_I8253 16341c787eSIngo Molnar select CLONE_BACKWARDS 17157e118bSThomas Gleixner select GENERIC_VDSO_32 18117ed454SThomas Gleixner select HAVE_DEBUG_STACKOVERFLOW 19157e118bSThomas Gleixner select KMAP_LOCAL 20341c787eSIngo Molnar select MODULES_USE_ELF_REL 21341c787eSIngo Molnar select OLD_SIGACTION 222ca408d9SBrian Gerst select ARCH_SPLIT_ARG64 23daa93fabSSam Ravnborg 24daa93fabSSam Ravnborgconfig X86_64 253120e25eSJan Beulich def_bool y 263120e25eSJan Beulich depends on 64BIT 27d94e0685SIngo Molnar # Options that are inherently 64-bit kernel only: 284eb0716eSAlexandre Ghiti select ARCH_HAS_GIGANTIC_PAGE 29f9aad622SAnshuman Khandual select ARCH_HAS_PTDUMP 303049def1SJeff Xu select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS 31c12d3362SArd Biesheuvel select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 320bff0aaeSSuren Baghdasaryan select ARCH_SUPPORTS_PER_VMA_LOCK 3375182022SPeter Xu select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 34d94e0685SIngo Molnar select HAVE_ARCH_SOFT_DIRTY 35d94e0685SIngo Molnar select MODULES_USE_ELF_RELA 36f616ab59SChristoph Hellwig select NEED_DMA_MAP_STATE 3709230cbcSChristoph Hellwig select SWIOTLB 387facdc42SAl Viro select ARCH_HAS_ELFCORE_COMPAT 3963703f37SKefeng Wang select ZONE_DMA32 4014e56fb2SMike Rapoport (IBM) select EXECMEM if DYNAMIC_FTRACE 41b9020bdbSTony Luck select ACPI_MRRM if ACPI 421032c0baSSam Ravnborg 43518049d9SSteven Rostedt (VMware)config FORCE_DYNAMIC_FTRACE 44518049d9SSteven Rostedt (VMware) def_bool y 45518049d9SSteven Rostedt (VMware) depends on X86_32 46518049d9SSteven Rostedt (VMware) depends on FUNCTION_TRACER 47518049d9SSteven Rostedt (VMware) select DYNAMIC_FTRACE 48518049d9SSteven Rostedt (VMware) help 49518049d9SSteven Rostedt (VMware) We keep the static function tracing (!DYNAMIC_FTRACE) around 50518049d9SSteven Rostedt (VMware) in order to test the non static function tracing in the 51518049d9SSteven Rostedt (VMware) generic code, as other architectures still use it. But we 52518049d9SSteven Rostedt (VMware) only need to keep it around for x86_64. No need to keep it 53518049d9SSteven Rostedt (VMware) for x86_32. For x86_32, force DYNAMIC_FTRACE. 54d94e0685SIngo Molnar# 55d94e0685SIngo Molnar# Arch settings 56d94e0685SIngo Molnar# 57d94e0685SIngo Molnar# ( Note that options that are marked 'if X86_64' could in principle be 58d94e0685SIngo Molnar# ported to 32-bit as well. ) 59d94e0685SIngo Molnar# 608d5fffb9SSam Ravnborgconfig X86 613c2362e6SHarvey Harrison def_bool y 62c763ea26SIngo Molnar # 63c763ea26SIngo Molnar # Note: keep this list sorted alphabetically 64c763ea26SIngo Molnar # 656471b825SIngo Molnar select ACPI_LEGACY_TABLES_LOOKUP if ACPI 666e0a0ea1SGraeme Gregory select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 67a02f66bbSJames Morse select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 68942fa985SYury Norov select ARCH_32BIT_OFF_T if X86_32 692a21ad57SThomas Gleixner select ARCH_CLOCKSOURCE_INIT 70fe42754bSSean Christopherson select ARCH_CONFIGURES_CPU_MITIGATIONS 711f6d3a8fSMasami Hiramatsu select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE 721e866974SAnshuman Khandual select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION 735c11f00bSDavid Hildenbrand select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64 7491024b3cSAnshuman Khandual select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG 75cebc774fSAnshuman Khandual select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE) 761e866974SAnshuman Khandual select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE 7791dda51aSAleksey Makarov select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 78c2280be8SAnshuman Khandual select ARCH_HAS_CACHE_LINE_SIZE 791156b441SDavidlohr Bueso select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION 807c7077a7SThomas Gleixner select ARCH_HAS_CPU_FINALIZE_INIT 818f23f5dbSJason Gunthorpe select ARCH_HAS_CPU_PASID if IOMMU_SVA 8255d1ecceSEric Biggers select ARCH_HAS_CRC32 834ffd5086SEric Biggers select ARCH_HAS_CRC64 if X86_64 84dbdda1fdSEric Biggers select ARCH_HAS_CRC_T10DIF 852792d84eSKees Cook select ARCH_HAS_CURRENT_STACK_POINTER 86fa5b6ec9SLaura Abbott select ARCH_HAS_DEBUG_VIRTUAL 87399145f9SAnshuman Khandual select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE 8821266be9SDan Williams select ARCH_HAS_DEVMEM_IS_ALLOWED 89de6c85bfSChristoph Hellwig select ARCH_HAS_DMA_OPS if GART_IOMMU || XEN 90b1a57bbfSDouglas Anderson select ARCH_HAS_EARLY_DEBUG if KGDB 916471b825SIngo Molnar select ARCH_HAS_ELF_RANDOMIZE 9247410d83SMike Rapoport (Microsoft) select ARCH_HAS_EXECMEM_ROX if X86_64 && STRICT_MODULE_RWX 9372d93104SLinus Torvalds select ARCH_HAS_FAST_MULTIPLIER 946974f0c4SDaniel Micay select ARCH_HAS_FORTIFY_SOURCE 95957e3facSRiku Voipio select ARCH_HAS_GCOV_PROFILE_ALL 96bece04b5SMarco Elver select ARCH_HAS_KCOV if X86_64 97b0b8a15bSSamuel Holland select ARCH_HAS_KERNEL_FPU_SUPPORT 980c9c1d56SThiago Jung Bauermann select ARCH_HAS_MEM_ENCRYPT 9910bcc80eSMathieu Desnoyers select ARCH_HAS_MEMBARRIER_SYNC_CORE 10049f88c70SPaul E. McKenney select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 1010ebeea8cSDaniel Borkmann select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 102c763ea26SIngo Molnar select ARCH_HAS_PMEM_API if X86_64 103476e8583SPeter Zijlstra select ARCH_HAS_PREEMPT_LAZY 10417596731SRobin Murphy select ARCH_HAS_PTE_DEVMAP if X86_64 1053010a5eaSLaurent Dufour select ARCH_HAS_PTE_SPECIAL 10671ce1ab5SKinsey Ho select ARCH_HAS_HW_PTE_YOUNG 107eed9a328SYu Zhao select ARCH_HAS_NONLEAF_PMD_YOUNG if PGTABLE_LEVELS > 2 1080aed55afSDan Williams select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64 109ec6347bbSDan Williams select ARCH_HAS_COPY_MC if X86_64 110d2852a22SDaniel Borkmann select ARCH_HAS_SET_MEMORY 111d253ca0cSRick Edgecombe select ARCH_HAS_SET_DIRECT_MAP 112ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_KERNEL_RWX 113ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_MODULE_RWX 114ac1ab12aSMathieu Desnoyers select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 11525c619e5SBrian Gerst select ARCH_HAS_SYSCALL_WRAPPER 116918327e9SKees Cook select ARCH_HAS_UBSAN 1177e01ccb4SZong Li select ARCH_HAS_DEBUG_WX 11863703f37SKefeng Wang select ARCH_HAS_ZONE_DMA_SET if EXPERT 1196471b825SIngo Molnar select ARCH_HAVE_NMI_SAFE_CMPXCHG 120ba386777SVignesh Balasubramanian select ARCH_HAVE_EXTRA_ELF_NOTES 12104d5ea46SAneesh Kumar K.V select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE 1226471b825SIngo Molnar select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI 12377fbbc81SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 1245e2c18c0SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 1253599fe12SThomas Gleixner select ARCH_STACKWALK 1262c870e61SArnd Bergmann select ARCH_SUPPORTS_ACPI 1276471b825SIngo Molnar select ARCH_SUPPORTS_ATOMIC_RMW 1285d6ad668SMike Rapoport select ARCH_SUPPORTS_DEBUG_PAGEALLOC 129d283d422SPasha Tatashin select ARCH_SUPPORTS_PAGE_TABLE_CHECK if X86_64 1306471b825SIngo Molnar select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 13114df3267SThomas Gleixner select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP if NR_CPUS <= 4096 1323c516f89SSami Tolvanen select ARCH_SUPPORTS_CFI_CLANG if X86_64 1333c516f89SSami Tolvanen select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG 134583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG 135583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG_THIN 136d2d6422fSSebastian Andrzej Siewior select ARCH_SUPPORTS_RT 137315ad878SRong Xu select ARCH_SUPPORTS_AUTOFDO_CLANG 138d5dc9583SRong Xu select ARCH_SUPPORTS_PROPELLER_CLANG if X86_64 1396471b825SIngo Molnar select ARCH_USE_BUILTIN_BSWAP 140909639aaSH. Peter Anvin (Intel) select ARCH_USE_CMPXCHG_LOCKREF if X86_CX8 141dce44566SAnshuman Khandual select ARCH_USE_MEMTEST 1426471b825SIngo Molnar select ARCH_USE_QUEUED_RWLOCKS 1436471b825SIngo Molnar select ARCH_USE_QUEUED_SPINLOCKS 1442ce0d7f9SMark Brown select ARCH_USE_SYM_ANNOTATIONS 145ce4a4e56SAndy Lutomirski select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH 14681c22041SDaniel Borkmann select ARCH_WANT_DEFAULT_BPF_JIT if X86_64 147c763ea26SIngo Molnar select ARCH_WANTS_DYNAMIC_TASK_STRUCT 14851c2ee6dSNick Desaulniers select ARCH_WANTS_NO_INSTR 14907431506SAnshuman Khandual select ARCH_WANT_GENERAL_HUGETLB 150*76303ee8SJann Horn select ARCH_WANT_HUGE_PMD_SHARE if X86_64 15159612b24SNathan Chancellor select ARCH_WANT_LD_ORPHAN_WARN 1520b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP if X86_64 1530b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if X86_64 15408efe293SFrank van der Linden select ARCH_WANT_HUGETLB_VMEMMAP_PREINIT if X86_64 15538d8b4e6SHuang Ying select ARCH_WANTS_THP_SWAP if X86_64 156b5f06f64SBalbir Singh select ARCH_HAS_PARANOID_L1D_FLUSH 157af896715SAndy Lutomirski select ARCH_WANT_IRQS_OFF_ACTIVATE_MM 15810916706SShile Zhang select BUILDTIME_TABLE_SORT 1596471b825SIngo Molnar select CLKEVT_I8253 1606471b825SIngo Molnar select CLOCKSOURCE_WATCHDOG 1617cf8f44aSAlexander Potapenko # Word-size accesses may read uninitialized data past the trailing \0 1627cf8f44aSAlexander Potapenko # in strings and cause false KMSAN reports. 1637cf8f44aSAlexander Potapenko select DCACHE_WORD_ACCESS if !KMSAN 1643aac3ebeSThomas Gleixner select DYNAMIC_SIGFRAME 16545471cd9SLinus Torvalds select EDAC_ATOMIC_SCRUB 16645471cd9SLinus Torvalds select EDAC_SUPPORT 1676471b825SIngo Molnar select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC) 168cb81deefSThomas Gleixner select GENERIC_CLOCKEVENTS_BROADCAST_IDLE if GENERIC_CLOCKEVENTS_BROADCAST 1696471b825SIngo Molnar select GENERIC_CLOCKEVENTS_MIN_ADJUST 1706471b825SIngo Molnar select GENERIC_CMOS_UPDATE 1716471b825SIngo Molnar select GENERIC_CPU_AUTOPROBE 1725b95f94cSJames Morse select GENERIC_CPU_DEVICES 17361dc0f55SThomas Gleixner select GENERIC_CPU_VULNERABILITIES 1746471b825SIngo Molnar select GENERIC_EARLY_IOREMAP 17527d6b4d1SThomas Gleixner select GENERIC_ENTRY 1766471b825SIngo Molnar select GENERIC_IOMAP 177c7d6c9ddSThomas Gleixner select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1780fa115daSThomas Gleixner select GENERIC_IRQ_MATRIX_ALLOCATOR if X86_LOCAL_APIC 179ad7a929fSThomas Gleixner select GENERIC_IRQ_MIGRATION if SMP 1806471b825SIngo Molnar select GENERIC_IRQ_PROBE 181c201c917SThomas Gleixner select GENERIC_IRQ_RESERVATION_MODE 1826471b825SIngo Molnar select GENERIC_IRQ_SHOW 1836471b825SIngo Molnar select GENERIC_PENDING_IRQ if SMP 1846471b825SIngo Molnar select GENERIC_SMP_IDLE_THREAD 1856471b825SIngo Molnar select GENERIC_TIME_VSYSCALL 1867ac87074SVincenzo Frascino select GENERIC_GETTIMEOFDAY 187dafde296SThomas Weißschuh select GENERIC_VDSO_DATA_STORE 188550a77a7SDmitry Safonov select GENERIC_VDSO_TIME_NS 1897e90ffb7SAdrian Hunter select GENERIC_VDSO_OVERFLOW_PROTECT 1906ca297d4SPeter Zijlstra select GUP_GET_PXX_LOW_HIGH if X86_PAE 19117e5888eSHans de Goede select HARDIRQS_SW_RESEND 1927edaeb68SThomas Gleixner select HARDLOCKUP_CHECK_TIMESTAMP if X86_64 193fcbfe812SNiklas Schnelle select HAS_IOPORT 1946471b825SIngo Molnar select HAVE_ACPI_APEI if ACPI 1956471b825SIngo Molnar select HAVE_ACPI_APEI_NMI if ACPI 1962a19be61SVlastimil Babka select HAVE_ALIGNED_STRUCT_PAGE 1976471b825SIngo Molnar select HAVE_ARCH_AUDITSYSCALL 1986471b825SIngo Molnar select HAVE_ARCH_HUGE_VMAP if X86_64 || X86_PAE 199eed1fceeSSong Liu select HAVE_ARCH_HUGE_VMALLOC if X86_64 2006471b825SIngo Molnar select HAVE_ARCH_JUMP_LABEL 201b34006c4SArd Biesheuvel select HAVE_ARCH_JUMP_LABEL_RELATIVE 202d17a1d97SAndrey Ryabinin select HAVE_ARCH_KASAN if X86_64 2030609ae01SDaniel Axtens select HAVE_ARCH_KASAN_VMALLOC if X86_64 2041dc0da6eSAlexander Potapenko select HAVE_ARCH_KFENCE 2054ca8cc8dSAlexander Potapenko select HAVE_ARCH_KMSAN if X86_64 2066471b825SIngo Molnar select HAVE_ARCH_KGDB 2079e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_BITS if MMU 2089e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 2091b028f78SDmitry Safonov select HAVE_ARCH_COMPAT_MMAP_BASES if MMU && COMPAT 210271ca788SArd Biesheuvel select HAVE_ARCH_PREL32_RELOCATIONS 2116471b825SIngo Molnar select HAVE_ARCH_SECCOMP_FILTER 212f7d83c1cSKees Cook select HAVE_ARCH_THREAD_STRUCT_WHITELIST 213afaef01cSAlexander Popov select HAVE_ARCH_STACKLEAK 2146471b825SIngo Molnar select HAVE_ARCH_TRACEHOOK 2156471b825SIngo Molnar select HAVE_ARCH_TRANSPARENT_HUGEPAGE 216a00cc7d9SMatthew Wilcox select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64 217b64d8d1eSPeter Xu select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD 2187677f7fdSAxel Rasmussen select HAVE_ARCH_USERFAULTFD_MINOR if X86_64 && USERFAULTFD 219e37e43a4SAndy Lutomirski select HAVE_ARCH_VMAP_STACK if X86_64 220fe950f60SKees Cook select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 221c763ea26SIngo Molnar select HAVE_ARCH_WITHIN_STACK_FRAMES 2222ff2b7ecSMasahiro Yamada select HAVE_ASM_MODVERSIONS 2236471b825SIngo Molnar select HAVE_CMPXCHG_DOUBLE 2246471b825SIngo Molnar select HAVE_CMPXCHG_LOCAL 22524a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER if X86_64 22624a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER_OFFSTACK if HAVE_CONTEXT_TRACKING_USER 2276471b825SIngo Molnar select HAVE_C_RECORDMCOUNT 22803f16cd0SJosh Poimboeuf select HAVE_OBJTOOL_MCOUNT if HAVE_OBJTOOL 229280981d6SSathvika Vasireddy select HAVE_OBJTOOL_NOP_MCOUNT if HAVE_OBJTOOL_MCOUNT 2304ed308c4SSteven Rostedt (Google) select HAVE_BUILDTIME_MCOUNT_SORT 2316471b825SIngo Molnar select HAVE_DEBUG_KMEMLEAK 2329c5a3621SAkinobu Mita select HAVE_DMA_CONTIGUOUS 233677aa9f7SSteven Rostedt select HAVE_DYNAMIC_FTRACE 23406aeaaeaSMasami Hiramatsu select HAVE_DYNAMIC_FTRACE_WITH_REGS 23502a474caSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_ARGS if X86_64 236762abbc0SMasami Hiramatsu (Google) select HAVE_FTRACE_REGS_HAVING_PT_REGS if X86_64 237562955feSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 238c316eb44SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT if X86_64 239503e4510SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT_MULTI if X86_64 24003f5781bSWang YanQing select HAVE_EBPF_JIT 24158340a07SJohannes Berg select HAVE_EFFICIENT_UNALIGNED_ACCESS 242976ba8daSArnd Bergmann select HAVE_EISA if X86_32 2435f56a5dfSJiri Slaby select HAVE_EXIT_THREAD 24425176ad0SDavid Hildenbrand select HAVE_GUP_FAST 245644e0e8dSSteven Rostedt (VMware) select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE 246a762e926SMasami Hiramatsu (Google) select HAVE_FTRACE_GRAPH_FUNC if HAVE_FUNCTION_GRAPH_TRACER 2476471b825SIngo Molnar select HAVE_FTRACE_MCOUNT_RECORD 248a3ed4157SMasami Hiramatsu (Google) select HAVE_FUNCTION_GRAPH_FREGS if HAVE_FUNCTION_GRAPH_TRACER 2494a30e4c9SSteven Rostedt (VMware) select HAVE_FUNCTION_GRAPH_TRACER if X86_32 || (X86_64 && DYNAMIC_FTRACE) 2506471b825SIngo Molnar select HAVE_FUNCTION_TRACER 2516b90bd4bSEmese Revfy select HAVE_GCC_PLUGINS 2520067f129SK.Prasad select HAVE_HW_BREAKPOINT 2536471b825SIngo Molnar select HAVE_IOREMAP_PROT 254624db9eaSThomas Gleixner select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64 2556471b825SIngo Molnar select HAVE_IRQ_TIME_ACCOUNTING 2564ab7674fSJosh Poimboeuf select HAVE_JUMP_LABEL_HACK if HAVE_OBJTOOL 2576471b825SIngo Molnar select HAVE_KERNEL_BZIP2 2586471b825SIngo Molnar select HAVE_KERNEL_GZIP 2596471b825SIngo Molnar select HAVE_KERNEL_LZ4 2606471b825SIngo Molnar select HAVE_KERNEL_LZMA 2616471b825SIngo Molnar select HAVE_KERNEL_LZO 2626471b825SIngo Molnar select HAVE_KERNEL_XZ 263fb46d057SNick Terrell select HAVE_KERNEL_ZSTD 2646471b825SIngo Molnar select HAVE_KPROBES 2656471b825SIngo Molnar select HAVE_KPROBES_ON_FTRACE 266540adea3SMasami Hiramatsu select HAVE_FUNCTION_ERROR_INJECTION 2676471b825SIngo Molnar select HAVE_KRETPROBES 268f3a112c0SMasami Hiramatsu select HAVE_RETHOOK 2696471b825SIngo Molnar select HAVE_LIVEPATCH if X86_64 2700102752eSFrederic Weisbecker select HAVE_MIXED_BREAKPOINTS_REGS 271ee9f8fceSJosh Poimboeuf select HAVE_MOD_ARCH_SPECIFIC 2729f132f7eSJoel Fernandes (Google) select HAVE_MOVE_PMD 273be37c98dSKalesh Singh select HAVE_MOVE_PUD 27422102f45SJosh Poimboeuf select HAVE_NOINSTR_HACK if HAVE_OBJTOOL 27542a0bb3fSPetr Mladek select HAVE_NMI 276489e355bSJosh Poimboeuf select HAVE_NOINSTR_VALIDATION if HAVE_OBJTOOL 27703f16cd0SJosh Poimboeuf select HAVE_OBJTOOL if X86_64 2786471b825SIngo Molnar select HAVE_OPTPROBES 2795394f1e9SArnd Bergmann select HAVE_PAGE_SIZE_4KB 2806471b825SIngo Molnar select HAVE_PCSPKR_PLATFORM 2816471b825SIngo Molnar select HAVE_PERF_EVENTS 282c01d4323SFrederic Weisbecker select HAVE_PERF_EVENTS_NMI 28392e5aae4SNicholas Piggin select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI 284eb01d42aSChristoph Hellwig select HAVE_PCI 285c5e63197SJiri Olsa select HAVE_PERF_REGS 286c5ebcedbSJiri Olsa select HAVE_PERF_USER_STACK_DUMP 287a3725973SRik van Riel select MMU_GATHER_RCU_TABLE_FREE 2881e9fdf21SPeter Zijlstra select MMU_GATHER_MERGE_VMAS 28900998085SThomas Gleixner select HAVE_POSIX_CPU_TIMERS_TASK_WORK 2906471b825SIngo Molnar select HAVE_REGS_AND_STACK_ACCESS_API 29103f16cd0SJosh Poimboeuf select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC || STACK_VALIDATION 2923c88ee19SMasami Hiramatsu select HAVE_FUNCTION_ARG_ACCESS_API 2937ecd19cfSKefeng Wang select HAVE_SETUP_PER_CPU_AREA 294cd1a41ceSThomas Gleixner select HAVE_SOFTIRQ_ON_OWN_STACK 2950ee2689bSBrian Gerst select HAVE_STACKPROTECTOR 29603f16cd0SJosh Poimboeuf select HAVE_STACK_VALIDATION if HAVE_OBJTOOL 297e6d6c071SJosh Poimboeuf select HAVE_STATIC_CALL 29803f16cd0SJosh Poimboeuf select HAVE_STATIC_CALL_INLINE if HAVE_OBJTOOL 29999cf983cSMark Rutland select HAVE_PREEMPT_DYNAMIC_CALL 300d6761b8fSMathieu Desnoyers select HAVE_RSEQ 30109498135SMiguel Ojeda select HAVE_RUST if X86_64 3026471b825SIngo Molnar select HAVE_SYSCALL_TRACEPOINTS 3035f3da8c0SJosh Poimboeuf select HAVE_UACCESS_VALIDATION if HAVE_OBJTOOL 3046471b825SIngo Molnar select HAVE_UNSTABLE_SCHED_CLOCK 3057c68af6eSAvi Kivity select HAVE_USER_RETURN_NOTIFIER 3067ac87074SVincenzo Frascino select HAVE_GENERIC_VDSO 30733385150SJason A. Donenfeld select VDSO_GETRANDOM if X86_64 3080c7ffa32SThomas Gleixner select HOTPLUG_PARALLEL if SMP && X86_64 30905736e4aSThomas Gleixner select HOTPLUG_SMT if SMP 3100c7ffa32SThomas Gleixner select HOTPLUG_SPLIT_STARTUP if SMP && X86_32 311c0185808SThomas Gleixner select IRQ_FORCED_THREADING 312c2508ec5SLinus Torvalds select LOCK_MM_AND_FIND_VMA 3137ecd19cfSKefeng Wang select NEED_PER_CPU_EMBED_FIRST_CHUNK 3147ecd19cfSKefeng Wang select NEED_PER_CPU_PAGE_FIRST_CHUNK 31586596f0aSChristoph Hellwig select NEED_SG_DMA_LENGTH 31687482708SMike Rapoport (Microsoft) select NUMA_MEMBLKS if NUMA 3172eac9c2dSChristoph Hellwig select PCI_DOMAINS if PCI 318625210cfSSinan Kaya select PCI_LOCKLESS_CONFIG if PCI 3196471b825SIngo Molnar select PERF_EVENTS 3203195ef59SPrarit Bhargava select RTC_LIB 321d6faca40SArnd Bergmann select RTC_MC146818_LIB 3226471b825SIngo Molnar select SPARSE_IRQ 3236471b825SIngo Molnar select SYSCTL_EXCEPTION_TRACE 32415f4eae7SAndy Lutomirski select THREAD_INFO_IN_TASK 3254aae683fSMasahiro Yamada select TRACE_IRQFLAGS_SUPPORT 3264510bffbSMark Rutland select TRACE_IRQFLAGS_NMI_SUPPORT 3276471b825SIngo Molnar select USER_STACKTRACE_SUPPORT 3283b02a051SIngo Molnar select HAVE_ARCH_KCSAN if X86_64 3290c608dadSAubrey Li select PROC_PID_ARCH_STATUS if PROC_FS 33050468e43SJarkko Sakkinen select HAVE_ARCH_NODE_DEV_GROUP if X86_SGX 331d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_16B if X86_64 || X86_ALIGNMENT_16 332d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_4B 3339e2b4be3SNayna Jain imply IMA_SECURE_AND_OR_TRUSTED_BOOT if EFI 334ceea991aSJiri Olsa select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 3354817f70cSQi Zheng select ARCH_SUPPORTS_PT_RECLAIM if X86_64 3367d8330a5SBalbir Singh 337ba7e4d13SIngo Molnarconfig INSTRUCTION_DECODER 3383120e25eSJan Beulich def_bool y 3393120e25eSJan Beulich depends on KPROBES || PERF_EVENTS || UPROBES 340ba7e4d13SIngo Molnar 34151b26adaSLinus Torvaldsconfig OUTPUT_FORMAT 34251b26adaSLinus Torvalds string 34351b26adaSLinus Torvalds default "elf32-i386" if X86_32 34451b26adaSLinus Torvalds default "elf64-x86-64" if X86_64 34551b26adaSLinus Torvalds 3468d5fffb9SSam Ravnborgconfig LOCKDEP_SUPPORT 3473c2362e6SHarvey Harrison def_bool y 3488d5fffb9SSam Ravnborg 3498d5fffb9SSam Ravnborgconfig STACKTRACE_SUPPORT 3503c2362e6SHarvey Harrison def_bool y 3518d5fffb9SSam Ravnborg 3528d5fffb9SSam Ravnborgconfig MMU 3533c2362e6SHarvey Harrison def_bool y 3548d5fffb9SSam Ravnborg 3559e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MIN 3569e08f57dSDaniel Cashman default 28 if 64BIT 3579e08f57dSDaniel Cashman default 8 3589e08f57dSDaniel Cashman 3599e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MAX 3609e08f57dSDaniel Cashman default 32 if 64BIT 3619e08f57dSDaniel Cashman default 16 3629e08f57dSDaniel Cashman 3639e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3649e08f57dSDaniel Cashman default 8 3659e08f57dSDaniel Cashman 3669e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3679e08f57dSDaniel Cashman default 16 3689e08f57dSDaniel Cashman 3698d5fffb9SSam Ravnborgconfig SBUS 3708d5fffb9SSam Ravnborg bool 3718d5fffb9SSam Ravnborg 3728d5fffb9SSam Ravnborgconfig GENERIC_ISA_DMA 3733120e25eSJan Beulich def_bool y 3743120e25eSJan Beulich depends on ISA_DMA_API 3758d5fffb9SSam Ravnborg 376d911c67eSAlexander Potapenkoconfig GENERIC_CSUM 377d911c67eSAlexander Potapenko bool 378d911c67eSAlexander Potapenko default y if KMSAN || KASAN 379d911c67eSAlexander Potapenko 3808d5fffb9SSam Ravnborgconfig GENERIC_BUG 3813c2362e6SHarvey Harrison def_bool y 3828d5fffb9SSam Ravnborg depends on BUG 383b93a531eSJan Beulich select GENERIC_BUG_RELATIVE_POINTERS if X86_64 384b93a531eSJan Beulich 385b93a531eSJan Beulichconfig GENERIC_BUG_RELATIVE_POINTERS 386b93a531eSJan Beulich bool 3878d5fffb9SSam Ravnborg 3888d5fffb9SSam Ravnborgconfig ARCH_MAY_HAVE_PC_FDC 3893120e25eSJan Beulich def_bool y 3903120e25eSJan Beulich depends on ISA_DMA_API 3918d5fffb9SSam Ravnborg 3921032c0baSSam Ravnborgconfig GENERIC_CALIBRATE_DELAY 3931032c0baSSam Ravnborg def_bool y 3941032c0baSSam Ravnborg 3959a0b8415Svenkatesh.pallipadi@intel.comconfig ARCH_HAS_CPU_RELAX 3969a0b8415Svenkatesh.pallipadi@intel.com def_bool y 3978d5fffb9SSam Ravnborg 398801e4062SJohannes Bergconfig ARCH_HIBERNATION_POSSIBLE 399801e4062SJohannes Berg def_bool y 400801e4062SJohannes Berg 401f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 402f4cb5700SJohannes Berg def_bool y 403f4cb5700SJohannes Berg 4048d5fffb9SSam Ravnborgconfig AUDIT_ARCH 405e0fd24a3SJan Beulich def_bool y if X86_64 4068d5fffb9SSam Ravnborg 407d6f2d75aSAndrey Ryabininconfig KASAN_SHADOW_OFFSET 408d6f2d75aSAndrey Ryabinin hex 409d6f2d75aSAndrey Ryabinin depends on KASAN 410d6f2d75aSAndrey Ryabinin default 0xdffffc0000000000 411d6f2d75aSAndrey Ryabinin 41269575d38SShane Wangconfig HAVE_INTEL_TXT 41369575d38SShane Wang def_bool y 4146ea30386SKees Cook depends on INTEL_IOMMU && ACPI 41569575d38SShane Wang 4166b0c3d44SSam Ravnborgconfig X86_64_SMP 4176b0c3d44SSam Ravnborg def_bool y 4186b0c3d44SSam Ravnborg depends on X86_64 && SMP 4196b0c3d44SSam Ravnborg 4202b144498SSrikar Dronamrajuconfig ARCH_SUPPORTS_UPROBES 4212b144498SSrikar Dronamraju def_bool y 4222b144498SSrikar Dronamraju 423d20642f0SRob Herringconfig FIX_EARLYCON_MEM 424d20642f0SRob Herring def_bool y 425d20642f0SRob Herring 42694d49eb3SKirill A. Shutemovconfig DYNAMIC_PHYSICAL_MASK 42794d49eb3SKirill A. Shutemov bool 42894d49eb3SKirill A. Shutemov 42998233368SKirill A. Shutemovconfig PGTABLE_LEVELS 43098233368SKirill A. Shutemov int 4317212b58dSKirill A. Shutemov default 5 if X86_64 43298233368SKirill A. Shutemov default 3 if X86_PAE 43398233368SKirill A. Shutemov default 2 43498233368SKirill A. Shutemov 435506f1d07SSam Ravnborgmenu "Processor type and features" 436506f1d07SSam Ravnborg 437506f1d07SSam Ravnborgconfig SMP 438506f1d07SSam Ravnborg bool "Symmetric multi-processing support" 439a7f7f624SMasahiro Yamada help 440506f1d07SSam Ravnborg This enables support for systems with more than one CPU. If you have 4414a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 4424a474157SRobert Graffham than one CPU, say Y. 443506f1d07SSam Ravnborg 4444a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 445506f1d07SSam Ravnborg machines, but will use only one CPU of a multiprocessor machine. If 446506f1d07SSam Ravnborg you say Y here, the kernel will run on many, but not all, 4474a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 448506f1d07SSam Ravnborg will run faster if you say N here. 449506f1d07SSam Ravnborg 450506f1d07SSam Ravnborg Note that if you say Y here and choose architecture "586" or 451506f1d07SSam Ravnborg "Pentium" under "Processor family", the kernel will not work on 486 452506f1d07SSam Ravnborg architectures. Similarly, multiprocessor kernels for the "PPro" 453506f1d07SSam Ravnborg architecture may not work on all Pentium based boards. 454506f1d07SSam Ravnborg 455506f1d07SSam Ravnborg People using multiprocessor machines who say Y here should also say 456506f1d07SSam Ravnborg Y to "Enhanced Real Time Clock Support", below. The "Advanced Power 457506f1d07SSam Ravnborg Management" code will be disabled if you say Y here. 458506f1d07SSam Ravnborg 459ff61f079SJonathan Corbet See also <file:Documentation/arch/x86/i386/IO-APIC.rst>, 4604f4cfa6cSMauro Carvalho Chehab <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at 461506f1d07SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 462506f1d07SSam Ravnborg 463506f1d07SSam Ravnborg If you don't know what to do here, say N. 464506f1d07SSam Ravnborg 46506cd9a7dSYinghai Luconfig X86_X2APIC 4669232c49fSMateusz Jończyk bool "x2APIC interrupt controller architecture support" 46719e3d60dSJan Kiszka depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST) 4689232c49fSMateusz Jończyk default y 469a7f7f624SMasahiro Yamada help 4709232c49fSMateusz Jończyk x2APIC is an interrupt controller architecture, a component of which 4719232c49fSMateusz Jończyk (the local APIC) is present in the CPU. It allows faster access to 4729232c49fSMateusz Jończyk the local APIC and supports a larger number of CPUs in the system 4739232c49fSMateusz Jończyk than the predecessors. 47406cd9a7dSYinghai Lu 4759232c49fSMateusz Jończyk x2APIC was introduced in Intel CPUs around 2008 and in AMD EPYC CPUs 4769232c49fSMateusz Jończyk in 2019, but it can be disabled by the BIOS. It is also frequently 4779232c49fSMateusz Jończyk emulated in virtual machines, even when the host CPU does not support 4789232c49fSMateusz Jończyk it. Support in the CPU can be checked by executing 47999bb1bd8SMateusz Jończyk grep x2apic /proc/cpuinfo 48006cd9a7dSYinghai Lu 48199bb1bd8SMateusz Jończyk If this configuration option is disabled, the kernel will boot with 48299bb1bd8SMateusz Jończyk very reduced functionality and performance on some platforms that 48399bb1bd8SMateusz Jończyk have x2APIC enabled. On the other hand, on hardware that does not 48499bb1bd8SMateusz Jończyk support x2APIC, a kernel with this option enabled will just fallback 48599bb1bd8SMateusz Jończyk to older APIC implementations. 486b8d1d163SDaniel Sneddon 48799bb1bd8SMateusz Jończyk If in doubt, say Y. 48806cd9a7dSYinghai Lu 4897fec07fdSJacob Panconfig X86_POSTED_MSI 4907fec07fdSJacob Pan bool "Enable MSI and MSI-x delivery by posted interrupts" 4917fec07fdSJacob Pan depends on X86_64 && IRQ_REMAP 4927fec07fdSJacob Pan help 4937fec07fdSJacob Pan This enables MSIs that are under interrupt remapping to be delivered as 4947fec07fdSJacob Pan posted interrupts to the host kernel. Interrupt throughput can 4957fec07fdSJacob Pan potentially be improved by coalescing CPU notifications during high 4967fec07fdSJacob Pan frequency bursts. 4977fec07fdSJacob Pan 4987fec07fdSJacob Pan If you don't know what to do here, say N. 4997fec07fdSJacob Pan 5006695c85bSYinghai Luconfig X86_MPPARSE 5014590d98fSAndy Shevchenko bool "Enable MPS table" if ACPI 5027a527688SJan Beulich default y 5035ab74722SIngo Molnar depends on X86_LOCAL_APIC 504a7f7f624SMasahiro Yamada help 5056695c85bSYinghai Lu For old smp systems that do not have proper acpi support. Newer systems 5066695c85bSYinghai Lu (esp with 64bit cpus) with acpi support, MADT and DSDT will override it 5076695c85bSYinghai Lu 508e6d42931SJohannes Weinerconfig X86_CPU_RESCTRL 509e6d42931SJohannes Weiner bool "x86 CPU resource control support" 5106fe07ce3SBabu Moger depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD) 511bff70402SJames Morse depends on MISC_FILESYSTEMS 512bff70402SJames Morse select ARCH_HAS_CPU_RESCTRL 513bff70402SJames Morse select RESCTRL_FS 51470288405SJames Morse select RESCTRL_FS_PSEUDO_LOCK 51578e99b4aSFenghua Yu help 516e6d42931SJohannes Weiner Enable x86 CPU resource control support. 5176fe07ce3SBabu Moger 5186fe07ce3SBabu Moger Provide support for the allocation and monitoring of system resources 5196fe07ce3SBabu Moger usage by the CPU. 5206fe07ce3SBabu Moger 5216fe07ce3SBabu Moger Intel calls this Intel Resource Director Technology 5226fe07ce3SBabu Moger (Intel(R) RDT). More information about RDT can be found in the 5236fe07ce3SBabu Moger Intel x86 Architecture Software Developer Manual. 5246fe07ce3SBabu Moger 5256fe07ce3SBabu Moger AMD calls this AMD Platform Quality of Service (AMD QoS). 5266fe07ce3SBabu Moger More information about AMD QoS can be found in the AMD64 Technology 5276fe07ce3SBabu Moger Platform Quality of Service Extensions manual. 52878e99b4aSFenghua Yu 52978e99b4aSFenghua Yu Say N if unsure. 53078e99b4aSFenghua Yu 5312cce9591SH. Peter Anvin (Intel)config X86_FRED 5322cce9591SH. Peter Anvin (Intel) bool "Flexible Return and Event Delivery" 5332cce9591SH. Peter Anvin (Intel) depends on X86_64 5342cce9591SH. Peter Anvin (Intel) help 5352cce9591SH. Peter Anvin (Intel) When enabled, try to use Flexible Return and Event Delivery 5362cce9591SH. Peter Anvin (Intel) instead of the legacy SYSCALL/SYSENTER/IDT architecture for 5372cce9591SH. Peter Anvin (Intel) ring transitions and exception/interrupt handling if the 5383c41786cSPaul Menzel system supports it. 5392cce9591SH. Peter Anvin (Intel) 540c5c606d9SRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM 541c5c606d9SRavikiran G Thirumalai bool "Support for extended (non-PC) x86 platforms" 542c5c606d9SRavikiran G Thirumalai default y 543a7f7f624SMasahiro Yamada help 54406ac8346SIngo Molnar If you disable this option then the kernel will only support 54506ac8346SIngo Molnar standard PC platforms. (which covers the vast majority of 54606ac8346SIngo Molnar systems out there.) 54706ac8346SIngo Molnar 5488425091fSRavikiran G Thirumalai If you enable this option then you'll be able to select support 54971d99ea4SMasahiro Yamada for the following non-PC x86 platforms, depending on the value of 55071d99ea4SMasahiro Yamada CONFIG_64BIT. 55171d99ea4SMasahiro Yamada 55271d99ea4SMasahiro Yamada 32-bit platforms (CONFIG_64BIT=n): 5534047e877SMateusz Jończyk Goldfish (mostly Android emulator) 5544047e877SMateusz Jończyk Intel CE media processor (CE4100) SoC 5554047e877SMateusz Jończyk Intel Quark 5568425091fSRavikiran G Thirumalai RDC R-321x SoC 55706ac8346SIngo Molnar 55871d99ea4SMasahiro Yamada 64-bit platforms (CONFIG_64BIT=y): 55944b111b5SSteffen Persvold Numascale NumaChip 5608425091fSRavikiran G Thirumalai ScaleMP vSMP 5618425091fSRavikiran G Thirumalai SGI Ultraviolet 562ca5955ddSArnd Bergmann Merrifield/Moorefield MID devices 5634047e877SMateusz Jończyk Goldfish (mostly Android emulator) 5648425091fSRavikiran G Thirumalai 5658425091fSRavikiran G Thirumalai If you have one of these systems, or if you want to build a 5668425091fSRavikiran G Thirumalai generic distribution kernel, say Y here - otherwise say N. 56771d99ea4SMasahiro Yamada 568c5c606d9SRavikiran G Thirumalai# This is an alphabetically sorted list of 64 bit extended platforms 569c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 57044b111b5SSteffen Persvoldconfig X86_NUMACHIP 57144b111b5SSteffen Persvold bool "Numascale NumaChip" 57244b111b5SSteffen Persvold depends on X86_64 57344b111b5SSteffen Persvold depends on X86_EXTENDED_PLATFORM 57444b111b5SSteffen Persvold depends on NUMA 57544b111b5SSteffen Persvold depends on SMP 57644b111b5SSteffen Persvold depends on X86_X2APIC 577f9726bfdSDaniel J Blueman depends on PCI_MMCONFIG 578a7f7f624SMasahiro Yamada help 57944b111b5SSteffen Persvold Adds support for Numascale NumaChip large-SMP systems. Needed to 58044b111b5SSteffen Persvold enable more than ~168 cores. 58144b111b5SSteffen Persvold If you don't have one of these, you should say N here. 58203b48632SNick Piggin 5836a48565eSIngo Molnarconfig X86_VSMP 584c5c606d9SRavikiran G Thirumalai bool "ScaleMP vSMP" 5856276a074SBorislav Petkov select HYPERVISOR_GUEST 5866a48565eSIngo Molnar select PARAVIRT 5876a48565eSIngo Molnar depends on X86_64 && PCI 588c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 589ead91d4bSShai Fultheim depends on SMP 590a7f7f624SMasahiro Yamada help 5916a48565eSIngo Molnar Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is 5926a48565eSIngo Molnar supposed to run on these EM64T-based machines. Only choose this option 5936a48565eSIngo Molnar if you have one of these machines. 5946a48565eSIngo Molnar 595c5c606d9SRavikiran G Thirumalaiconfig X86_UV 596c5c606d9SRavikiran G Thirumalai bool "SGI Ultraviolet" 597c5c606d9SRavikiran G Thirumalai depends on X86_64 598c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 59954c28d29SJack Steiner depends on NUMA 6001ecb4ae5SAndrew Morton depends on EFI 601c2209ea5SIngo Molnar depends on KEXEC_CORE 6029d6c26e7SSuresh Siddha depends on X86_X2APIC 6031222e564SIngo Molnar depends on PCI 604a7f7f624SMasahiro Yamada help 605c5c606d9SRavikiran G Thirumalai This option is needed in order to support SGI Ultraviolet systems. 606c5c606d9SRavikiran G Thirumalai If you don't have one of these, you should say N here. 607c5c606d9SRavikiran G Thirumalai 608ca5955ddSArnd Bergmannconfig X86_INTEL_MID 609ca5955ddSArnd Bergmann bool "Intel Z34xx/Z35xx MID platform support" 610ca5955ddSArnd Bergmann depends on X86_EXTENDED_PLATFORM 611ca5955ddSArnd Bergmann depends on X86_PLATFORM_DEVICES 612ca5955ddSArnd Bergmann depends on PCI 613ca5955ddSArnd Bergmann depends on X86_64 || (EXPERT && PCI_GOANY) 614ca5955ddSArnd Bergmann depends on X86_IO_APIC 615ca5955ddSArnd Bergmann select I2C 616ca5955ddSArnd Bergmann select DW_APB_TIMER 617ca5955ddSArnd Bergmann select INTEL_SCU_PCI 618ca5955ddSArnd Bergmann help 619ca5955ddSArnd Bergmann Select to build a kernel capable of supporting 64-bit Intel MID 620ca5955ddSArnd Bergmann (Mobile Internet Device) platform systems which do not have 621ca5955ddSArnd Bergmann the PCI legacy interfaces. 622ca5955ddSArnd Bergmann 623ca5955ddSArnd Bergmann The only supported devices are the 22nm Merrified (Z34xx) 624ca5955ddSArnd Bergmann and Moorefield (Z35xx) SoC used in the Intel Edison board and 625ca5955ddSArnd Bergmann a small number of Android devices such as the Asus Zenfone 2, 626ca5955ddSArnd Bergmann Asus FonePad 8 and Dell Venue 7. 627ca5955ddSArnd Bergmann 628ca5955ddSArnd Bergmann If you are building for a PC class system or non-MID tablet 629ca5955ddSArnd Bergmann SoCs like Bay Trail (Z36xx/Z37xx), say N here. 630ca5955ddSArnd Bergmann 631ca5955ddSArnd Bergmann Intel MID platforms are based on an Intel processor and chipset which 632ca5955ddSArnd Bergmann consume less power than most of the x86 derivatives. 633506f1d07SSam Ravnborg 634ddd70cf9SJun Nakajimaconfig X86_GOLDFISH 635ddd70cf9SJun Nakajima bool "Goldfish (Virtual Platform)" 636cb7b8023SBen Hutchings depends on X86_EXTENDED_PLATFORM 637a7f7f624SMasahiro Yamada help 638ddd70cf9SJun Nakajima Enable support for the Goldfish virtual platform used primarily 639ddd70cf9SJun Nakajima for Android development. Unless you are building for the Android 640ddd70cf9SJun Nakajima Goldfish emulator say N here. 641ddd70cf9SJun Nakajima 642ca5955ddSArnd Bergmann# Following is an alphabetically sorted list of 32 bit extended platforms 643ca5955ddSArnd Bergmann# Please maintain the alphabetic order if and when there are additions 644ca5955ddSArnd Bergmann 645c751e17bSThomas Gleixnerconfig X86_INTEL_CE 646c751e17bSThomas Gleixner bool "CE4100 TV platform" 647c751e17bSThomas Gleixner depends on PCI 648c751e17bSThomas Gleixner depends on PCI_GODIRECT 6496084a6e2SJiang Liu depends on X86_IO_APIC 650c751e17bSThomas Gleixner depends on X86_32 651c751e17bSThomas Gleixner depends on X86_EXTENDED_PLATFORM 65237bc9f50SDirk Brandewie select X86_REBOOTFIXUPS 653da6b737bSSebastian Andrzej Siewior select OF 654da6b737bSSebastian Andrzej Siewior select OF_EARLY_FLATTREE 655a7f7f624SMasahiro Yamada help 656c751e17bSThomas Gleixner Select for the Intel CE media processor (CE4100) SOC. 657c751e17bSThomas Gleixner This option compiles in support for the CE4100 SOC for settop 658c751e17bSThomas Gleixner boxes and media devices. 659c751e17bSThomas Gleixner 6608bbc2a13SBryan O'Donoghueconfig X86_INTEL_QUARK 6618bbc2a13SBryan O'Donoghue bool "Intel Quark platform support" 6628bbc2a13SBryan O'Donoghue depends on X86_32 6638bbc2a13SBryan O'Donoghue depends on X86_EXTENDED_PLATFORM 6648bbc2a13SBryan O'Donoghue depends on X86_PLATFORM_DEVICES 6658bbc2a13SBryan O'Donoghue depends on X86_TSC 6668bbc2a13SBryan O'Donoghue depends on PCI 6678bbc2a13SBryan O'Donoghue depends on PCI_GOANY 6688bbc2a13SBryan O'Donoghue depends on X86_IO_APIC 6698bbc2a13SBryan O'Donoghue select IOSF_MBI 6708bbc2a13SBryan O'Donoghue select INTEL_IMR 6719ab6eb51SAndy Shevchenko select COMMON_CLK 672a7f7f624SMasahiro Yamada help 6738bbc2a13SBryan O'Donoghue Select to include support for Quark X1000 SoC. 6748bbc2a13SBryan O'Donoghue Say Y here if you have a Quark based system such as the Arduino 6758bbc2a13SBryan O'Donoghue compatible Intel Galileo. 6768bbc2a13SBryan O'Donoghue 677e35e328dSMateusz Jończykconfig X86_RDC321X 678e35e328dSMateusz Jończyk bool "RDC R-321x SoC" 679e35e328dSMateusz Jończyk depends on X86_32 680e35e328dSMateusz Jończyk depends on X86_EXTENDED_PLATFORM 681e35e328dSMateusz Jończyk select M486 682e35e328dSMateusz Jończyk select X86_REBOOTFIXUPS 683e35e328dSMateusz Jończyk help 684e35e328dSMateusz Jończyk This option is needed for RDC R-321x system-on-chip, also known 685e35e328dSMateusz Jończyk as R-8610-(G). 686e35e328dSMateusz Jończyk If you don't have one of these chips, you should say N here. 687e35e328dSMateusz Jończyk 6883d48aab1SMika Westerbergconfig X86_INTEL_LPSS 6893d48aab1SMika Westerberg bool "Intel Low Power Subsystem Support" 6905962dd22SSinan Kaya depends on X86 && ACPI && PCI 6913d48aab1SMika Westerberg select COMMON_CLK 6920f531431SMathias Nyman select PINCTRL 693eebb3e8dSAndy Shevchenko select IOSF_MBI 694a7f7f624SMasahiro Yamada help 6953d48aab1SMika Westerberg Select to build support for Intel Low Power Subsystem such as 6963d48aab1SMika Westerberg found on Intel Lynxpoint PCH. Selecting this option enables 6970f531431SMathias Nyman things like clock tree (common clock framework) and pincontrol 6980f531431SMathias Nyman which are needed by the LPSS peripheral drivers. 6993d48aab1SMika Westerberg 70092082a88SKen Xueconfig X86_AMD_PLATFORM_DEVICE 70192082a88SKen Xue bool "AMD ACPI2Platform devices support" 70292082a88SKen Xue depends on ACPI 70392082a88SKen Xue select COMMON_CLK 70492082a88SKen Xue select PINCTRL 705a7f7f624SMasahiro Yamada help 70692082a88SKen Xue Select to interpret AMD specific ACPI device to platform device 70792082a88SKen Xue such as I2C, UART, GPIO found on AMD Carrizo and later chipsets. 70892082a88SKen Xue I2C and UART depend on COMMON_CLK to set clock. GPIO driver is 70992082a88SKen Xue implemented under PINCTRL subsystem. 71092082a88SKen Xue 711ced3ce76SDavid E. Boxconfig IOSF_MBI 712ced3ce76SDavid E. Box tristate "Intel SoC IOSF Sideband support for SoC platforms" 713ced3ce76SDavid E. Box depends on PCI 714a7f7f624SMasahiro Yamada help 715ced3ce76SDavid E. Box This option enables sideband register access support for Intel SoC 716ced3ce76SDavid E. Box platforms. On these platforms the IOSF sideband is used in lieu of 717ced3ce76SDavid E. Box MSR's for some register accesses, mostly but not limited to thermal 718ced3ce76SDavid E. Box and power. Drivers may query the availability of this device to 719ced3ce76SDavid E. Box determine if they need the sideband in order to work on these 720ced3ce76SDavid E. Box platforms. The sideband is available on the following SoC products. 721ced3ce76SDavid E. Box This list is not meant to be exclusive. 722ced3ce76SDavid E. Box - BayTrail 723ced3ce76SDavid E. Box - Braswell 724ced3ce76SDavid E. Box - Quark 725ced3ce76SDavid E. Box 726ced3ce76SDavid E. Box You should say Y if you are running a kernel on one of these SoC's. 727ced3ce76SDavid E. Box 728ed2226bdSDavid E. Boxconfig IOSF_MBI_DEBUG 729ed2226bdSDavid E. Box bool "Enable IOSF sideband access through debugfs" 730ed2226bdSDavid E. Box depends on IOSF_MBI && DEBUG_FS 731a7f7f624SMasahiro Yamada help 732ed2226bdSDavid E. Box Select this option to expose the IOSF sideband access registers (MCR, 733ed2226bdSDavid E. Box MDR, MCRX) through debugfs to write and read register information from 734ed2226bdSDavid E. Box different units on the SoC. This is most useful for obtaining device 735ed2226bdSDavid E. Box state information for debug and analysis. As this is a general access 736ed2226bdSDavid E. Box mechanism, users of this option would have specific knowledge of the 737ed2226bdSDavid E. Box device they want to access. 738ed2226bdSDavid E. Box 739ed2226bdSDavid E. Box If you don't require the option or are in doubt, say N. 740ed2226bdSDavid E. Box 741d949f36fSLinus Torvaldsconfig X86_SUPPORTS_MEMORY_FAILURE 7426fc108a0SJan Beulich def_bool y 743d949f36fSLinus Torvalds # MCE code calls memory_failure(): 744d949f36fSLinus Torvalds depends on X86_MCE 745d949f36fSLinus Torvalds # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags: 746d949f36fSLinus Torvalds # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH: 747d949f36fSLinus Torvalds depends on X86_64 || !SPARSEMEM 748d949f36fSLinus Torvalds select ARCH_SUPPORTS_MEMORY_FAILURE 749d949f36fSLinus Torvalds 75082148d1dSShérabconfig X86_32_IRIS 75182148d1dSShérab tristate "Eurobraille/Iris poweroff module" 75282148d1dSShérab depends on X86_32 753a7f7f624SMasahiro Yamada help 75482148d1dSShérab The Iris machines from EuroBraille do not have APM or ACPI support 75582148d1dSShérab to shut themselves down properly. A special I/O sequence is 75682148d1dSShérab needed to do so, which is what this module does at 75782148d1dSShérab kernel shutdown. 75882148d1dSShérab 75982148d1dSShérab This is only for Iris machines from EuroBraille. 76082148d1dSShérab 76182148d1dSShérab If unused, say N. 76282148d1dSShérab 763ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 7643c2362e6SHarvey Harrison def_bool y 7653c2362e6SHarvey Harrison prompt "Single-depth WCHAN output" 766a87d0914SKen Chen depends on X86 767a7f7f624SMasahiro Yamada help 768506f1d07SSam Ravnborg Calculate simpler /proc/<PID>/wchan values. If this option 769506f1d07SSam Ravnborg is disabled then wchan values will recurse back to the 770506f1d07SSam Ravnborg caller function. This provides more accurate wchan values, 771506f1d07SSam Ravnborg at the expense of slightly more scheduling overhead. 772506f1d07SSam Ravnborg 773506f1d07SSam Ravnborg If in doubt, say "Y". 774506f1d07SSam Ravnborg 7756276a074SBorislav Petkovmenuconfig HYPERVISOR_GUEST 7766276a074SBorislav Petkov bool "Linux guest support" 777a7f7f624SMasahiro Yamada help 7786276a074SBorislav Petkov Say Y here to enable options for running Linux under various hyper- 7796276a074SBorislav Petkov visors. This option enables basic hypervisor detection and platform 7806276a074SBorislav Petkov setup. 781506f1d07SSam Ravnborg 7826276a074SBorislav Petkov If you say N, all options in this submenu will be skipped and 7836276a074SBorislav Petkov disabled, and Linux guest support won't be built in. 784506f1d07SSam Ravnborg 7856276a074SBorislav Petkovif HYPERVISOR_GUEST 786506f1d07SSam Ravnborg 787e61bd94aSEduardo Pereira Habkostconfig PARAVIRT 788e61bd94aSEduardo Pereira Habkost bool "Enable paravirtualization code" 789a0e2bf7cSJuergen Gross depends on HAVE_STATIC_CALL 790a7f7f624SMasahiro Yamada help 791e61bd94aSEduardo Pereira Habkost This changes the kernel so it can modify itself when it is run 792e61bd94aSEduardo Pereira Habkost under a hypervisor, potentially improving performance significantly 793e61bd94aSEduardo Pereira Habkost over full virtualization. However, when run without a hypervisor 794e61bd94aSEduardo Pereira Habkost the kernel is theoretically slower and slightly larger. 795e61bd94aSEduardo Pereira Habkost 796c00a280aSJuergen Grossconfig PARAVIRT_XXL 797c00a280aSJuergen Gross bool 79809230b75SKirill A. Shutemov depends on X86_64 799c00a280aSJuergen Gross 8006276a074SBorislav Petkovconfig PARAVIRT_DEBUG 8016276a074SBorislav Petkov bool "paravirt-ops debugging" 8026276a074SBorislav Petkov depends on PARAVIRT && DEBUG_KERNEL 803a7f7f624SMasahiro Yamada help 8046276a074SBorislav Petkov Enable to debug paravirt_ops internals. Specifically, BUG if 8056276a074SBorislav Petkov a paravirt_op is missing when it is called. 8066276a074SBorislav Petkov 807b4ecc126SJeremy Fitzhardingeconfig PARAVIRT_SPINLOCKS 808b4ecc126SJeremy Fitzhardinge bool "Paravirtualization layer for spinlocks" 8096ea30386SKees Cook depends on PARAVIRT && SMP 810a7f7f624SMasahiro Yamada help 811b4ecc126SJeremy Fitzhardinge Paravirtualized spinlocks allow a pvops backend to replace the 812b4ecc126SJeremy Fitzhardinge spinlock implementation with something virtualization-friendly 813b4ecc126SJeremy Fitzhardinge (for example, block the virtual CPU rather than spinning). 814b4ecc126SJeremy Fitzhardinge 8154c4e4f61SRaghavendra K T It has a minimal impact on native kernels and gives a nice performance 8164c4e4f61SRaghavendra K T benefit on paravirtualized KVM / Xen kernels. 817b4ecc126SJeremy Fitzhardinge 8184c4e4f61SRaghavendra K T If you are unsure how to answer this question, answer Y. 819b4ecc126SJeremy Fitzhardinge 820ecca2502SZhao Yakuiconfig X86_HV_CALLBACK_VECTOR 821ecca2502SZhao Yakui def_bool n 822ecca2502SZhao Yakui 8236276a074SBorislav Petkovsource "arch/x86/xen/Kconfig" 8246276a074SBorislav Petkov 8256276a074SBorislav Petkovconfig KVM_GUEST 8266276a074SBorislav Petkov bool "KVM Guest support (including kvmclock)" 8276276a074SBorislav Petkov depends on PARAVIRT 8286276a074SBorislav Petkov select PARAVIRT_CLOCK 829a1c4423bSMarcelo Tosatti select ARCH_CPUIDLE_HALTPOLL 830b1d40575SVitaly Kuznetsov select X86_HV_CALLBACK_VECTOR 8316276a074SBorislav Petkov default y 832a7f7f624SMasahiro Yamada help 8336276a074SBorislav Petkov This option enables various optimizations for running under the KVM 8346276a074SBorislav Petkov hypervisor. It includes a paravirtualized clock, so that instead 8356276a074SBorislav Petkov of relying on a PIT (or probably other) emulation by the 8366276a074SBorislav Petkov underlying device model, the host provides the guest with 8376276a074SBorislav Petkov timing infrastructure such as time of day, and system time 8386276a074SBorislav Petkov 839a1c4423bSMarcelo Tosatticonfig ARCH_CPUIDLE_HALTPOLL 840a1c4423bSMarcelo Tosatti def_bool n 841a1c4423bSMarcelo Tosatti prompt "Disable host haltpoll when loading haltpoll driver" 842a1c4423bSMarcelo Tosatti help 843a1c4423bSMarcelo Tosatti If virtualized under KVM, disable host haltpoll. 844a1c4423bSMarcelo Tosatti 8457733607fSMaran Wilsonconfig PVH 8467733607fSMaran Wilson bool "Support for running PVH guests" 847a7f7f624SMasahiro Yamada help 8487733607fSMaran Wilson This option enables the PVH entry point for guest virtual machines 8497733607fSMaran Wilson as specified in the x86/HVM direct boot ABI. 8507733607fSMaran Wilson 8516276a074SBorislav Petkovconfig PARAVIRT_TIME_ACCOUNTING 8526276a074SBorislav Petkov bool "Paravirtual steal time accounting" 8536276a074SBorislav Petkov depends on PARAVIRT 854a7f7f624SMasahiro Yamada help 8556276a074SBorislav Petkov Select this option to enable fine granularity task steal time 8566276a074SBorislav Petkov accounting. Time spent executing other tasks in parallel with 8576276a074SBorislav Petkov the current vCPU is discounted from the vCPU power. To account for 8586276a074SBorislav Petkov that, there can be a small performance impact. 8596276a074SBorislav Petkov 8606276a074SBorislav Petkov If in doubt, say N here. 8616276a074SBorislav Petkov 8627af192c9SGerd Hoffmannconfig PARAVIRT_CLOCK 8637af192c9SGerd Hoffmann bool 8647af192c9SGerd Hoffmann 8654a362601SJan Kiszkaconfig JAILHOUSE_GUEST 8664a362601SJan Kiszka bool "Jailhouse non-root cell support" 867abde587bSArnd Bergmann depends on X86_64 && PCI 86887e65d05SJan Kiszka select X86_PM_TIMER 869a7f7f624SMasahiro Yamada help 8704a362601SJan Kiszka This option allows to run Linux as guest in a Jailhouse non-root 8714a362601SJan Kiszka cell. You can leave this option disabled if you only want to start 8724a362601SJan Kiszka Jailhouse and run Linux afterwards in the root cell. 8734a362601SJan Kiszka 874ec7972c9SZhao Yakuiconfig ACRN_GUEST 875ec7972c9SZhao Yakui bool "ACRN Guest support" 876ec7972c9SZhao Yakui depends on X86_64 877498ad393SZhao Yakui select X86_HV_CALLBACK_VECTOR 878ec7972c9SZhao Yakui help 879ec7972c9SZhao Yakui This option allows to run Linux as guest in the ACRN hypervisor. ACRN is 880ec7972c9SZhao Yakui a flexible, lightweight reference open-source hypervisor, built with 881ec7972c9SZhao Yakui real-time and safety-criticality in mind. It is built for embedded 882ec7972c9SZhao Yakui IOT with small footprint and real-time features. More details can be 883ec7972c9SZhao Yakui found in https://projectacrn.org/. 884ec7972c9SZhao Yakui 88559bd54a8SKuppuswamy Sathyanarayananconfig INTEL_TDX_GUEST 88659bd54a8SKuppuswamy Sathyanarayanan bool "Intel TDX (Trust Domain Extensions) - Guest Support" 88759bd54a8SKuppuswamy Sathyanarayanan depends on X86_64 && CPU_SUP_INTEL 88859bd54a8SKuppuswamy Sathyanarayanan depends on X86_X2APIC 88975d090fdSKirill A. Shutemov depends on EFI_STUB 8909f98a4f4SVishal Annapurve depends on PARAVIRT 89141394e33SKirill A. Shutemov select ARCH_HAS_CC_PLATFORM 892968b4931SKirill A. Shutemov select X86_MEM_ENCRYPT 89377a512e3SSean Christopherson select X86_MCE 89475d090fdSKirill A. Shutemov select UNACCEPTED_MEMORY 89559bd54a8SKuppuswamy Sathyanarayanan help 89659bd54a8SKuppuswamy Sathyanarayanan Support running as a guest under Intel TDX. Without this support, 89759bd54a8SKuppuswamy Sathyanarayanan the guest kernel can not boot or run under TDX. 89859bd54a8SKuppuswamy Sathyanarayanan TDX includes memory encryption and integrity capabilities 89959bd54a8SKuppuswamy Sathyanarayanan which protect the confidentiality and integrity of guest 90059bd54a8SKuppuswamy Sathyanarayanan memory contents and CPU state. TDX guests are protected from 90159bd54a8SKuppuswamy Sathyanarayanan some attacks from the VMM. 90259bd54a8SKuppuswamy Sathyanarayanan 9036276a074SBorislav Petkovendif # HYPERVISOR_GUEST 90497349135SJeremy Fitzhardinge 905506f1d07SSam Ravnborgsource "arch/x86/Kconfig.cpu" 906506f1d07SSam Ravnborg 907506f1d07SSam Ravnborgconfig HPET_TIMER 9083c2362e6SHarvey Harrison def_bool X86_64 909506f1d07SSam Ravnborg prompt "HPET Timer Support" if X86_32 910a7f7f624SMasahiro Yamada help 911506f1d07SSam Ravnborg Use the IA-PC HPET (High Precision Event Timer) to manage 912506f1d07SSam Ravnborg time in preference to the PIT and RTC, if a HPET is 913506f1d07SSam Ravnborg present. 914506f1d07SSam Ravnborg HPET is the next generation timer replacing legacy 8254s. 915506f1d07SSam Ravnborg The HPET provides a stable time base on SMP 916506f1d07SSam Ravnborg systems, unlike the TSC, but it is more expensive to access, 9174e7f9df2SMichael S. Tsirkin as it is off-chip. The interface used is documented 9184e7f9df2SMichael S. Tsirkin in the HPET spec, revision 1. 919506f1d07SSam Ravnborg 920506f1d07SSam Ravnborg You can safely choose Y here. However, HPET will only be 921506f1d07SSam Ravnborg activated if the platform and the BIOS support this feature. 922506f1d07SSam Ravnborg Otherwise the 8254 will be used for timing services. 923506f1d07SSam Ravnborg 924506f1d07SSam Ravnborg Choose N to continue using the legacy 8254 timer. 925506f1d07SSam Ravnborg 926506f1d07SSam Ravnborgconfig HPET_EMULATE_RTC 9273c2362e6SHarvey Harrison def_bool y 9283228e1dcSAnand K Mistry depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y) 929506f1d07SSam Ravnborg 9306a108a14SDavid Rientjes# Mark as expert because too many people got it wrong. 931506f1d07SSam Ravnborg# The code disables itself when not needed. 9327ae9392cSThomas Petazzoniconfig DMI 9337ae9392cSThomas Petazzoni default y 934cf074402SArd Biesheuvel select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 9356a108a14SDavid Rientjes bool "Enable DMI scanning" if EXPERT 936a7f7f624SMasahiro Yamada help 9377ae9392cSThomas Petazzoni Enabled scanning of DMI to identify machine quirks. Say Y 9387ae9392cSThomas Petazzoni here unless you have verified that your setup is not 9397ae9392cSThomas Petazzoni affected by entries in the DMI blacklist. Required by PNP 9407ae9392cSThomas Petazzoni BIOS code. 9417ae9392cSThomas Petazzoni 942506f1d07SSam Ravnborgconfig GART_IOMMU 94338901f1cSAndi Kleen bool "Old AMD GART IOMMU support" 944a4ce5a48SChristoph Hellwig select IOMMU_HELPER 945506f1d07SSam Ravnborg select SWIOTLB 94623ac4ae8SAndreas Herrmann depends on X86_64 && PCI && AMD_NB 947a7f7f624SMasahiro Yamada help 948ced3c42cSIngo Molnar Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron 949ced3c42cSIngo Molnar GART based hardware IOMMUs. 950ced3c42cSIngo Molnar 951ced3c42cSIngo Molnar The GART supports full DMA access for devices with 32-bit access 952ced3c42cSIngo Molnar limitations, on systems with more than 3 GB. This is usually needed 953ced3c42cSIngo Molnar for USB, sound, many IDE/SATA chipsets and some other devices. 954ced3c42cSIngo Molnar 955ced3c42cSIngo Molnar Newer systems typically have a modern AMD IOMMU, supported via 956ced3c42cSIngo Molnar the CONFIG_AMD_IOMMU=y config option. 957ced3c42cSIngo Molnar 958ced3c42cSIngo Molnar In normal configurations this driver is only active when needed: 959ced3c42cSIngo Molnar there's more than 3 GB of memory and the system contains a 960ced3c42cSIngo Molnar 32-bit limited device. 961ced3c42cSIngo Molnar 962ced3c42cSIngo Molnar If unsure, say Y. 963506f1d07SSam Ravnborg 9648b766b0fSMichal Suchanekconfig BOOT_VESA_SUPPORT 9658b766b0fSMichal Suchanek bool 9668b766b0fSMichal Suchanek help 9678b766b0fSMichal Suchanek If true, at least one selected framebuffer driver can take advantage 9688b766b0fSMichal Suchanek of VESA video modes set at an early boot stage via the vga= parameter. 9698b766b0fSMichal Suchanek 9701184dc2fSMike Travisconfig MAXSMP 971ddb0c5a6SSamuel Thibault bool "Enable Maximum number of SMP Processors and NUMA Nodes" 9726ea30386SKees Cook depends on X86_64 && SMP && DEBUG_KERNEL 97336f5101aSMike Travis select CPUMASK_OFFSTACK 974a7f7f624SMasahiro Yamada help 975ddb0c5a6SSamuel Thibault Enable maximum number of CPUS and NUMA Nodes for this architecture. 9761184dc2fSMike Travis If unsure, say N. 977506f1d07SSam Ravnborg 978aec6487eSIngo Molnar# 979aec6487eSIngo Molnar# The maximum number of CPUs supported: 980aec6487eSIngo Molnar# 981aec6487eSIngo Molnar# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT, 982aec6487eSIngo Molnar# and which can be configured interactively in the 983aec6487eSIngo Molnar# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range. 984aec6487eSIngo Molnar# 985aec6487eSIngo Molnar# The ranges are different on 32-bit and 64-bit kernels, depending on 986aec6487eSIngo Molnar# hardware capabilities and scalability features of the kernel. 987aec6487eSIngo Molnar# 988aec6487eSIngo Molnar# ( If MAXSMP is enabled we just use the highest possible value and disable 989aec6487eSIngo Molnar# interactive configuration. ) 990aec6487eSIngo Molnar# 991a0d0bb4dSRandy Dunlap 992aec6487eSIngo Molnarconfig NR_CPUS_RANGE_BEGIN 993a0d0bb4dSRandy Dunlap int 994aec6487eSIngo Molnar default NR_CPUS_RANGE_END if MAXSMP 995a0d0bb4dSRandy Dunlap default 1 if !SMP 996a0d0bb4dSRandy Dunlap default 2 997a0d0bb4dSRandy Dunlap 998aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 999a0d0bb4dSRandy Dunlap int 1000a0d0bb4dSRandy Dunlap depends on X86_32 10010abf5086SArnd Bergmann default 8 if SMP 1002a0d0bb4dSRandy Dunlap default 1 if !SMP 1003a0d0bb4dSRandy Dunlap 1004aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1005a0d0bb4dSRandy Dunlap int 1006a0d0bb4dSRandy Dunlap depends on X86_64 10071edae1aeSScott Wood default 8192 if SMP && CPUMASK_OFFSTACK 10081edae1aeSScott Wood default 512 if SMP && !CPUMASK_OFFSTACK 1009a0d0bb4dSRandy Dunlap default 1 if !SMP 1010aec6487eSIngo Molnar 1011aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1012aec6487eSIngo Molnar int 1013aec6487eSIngo Molnar depends on X86_32 1014aec6487eSIngo Molnar default 8 if SMP 1015aec6487eSIngo Molnar default 1 if !SMP 1016aec6487eSIngo Molnar 1017aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1018aec6487eSIngo Molnar int 1019aec6487eSIngo Molnar depends on X86_64 1020a0d0bb4dSRandy Dunlap default 8192 if MAXSMP 1021a0d0bb4dSRandy Dunlap default 64 if SMP 1022aec6487eSIngo Molnar default 1 if !SMP 1023a0d0bb4dSRandy Dunlap 1024506f1d07SSam Ravnborgconfig NR_CPUS 102536f5101aSMike Travis int "Maximum number of CPUs" if SMP && !MAXSMP 1026aec6487eSIngo Molnar range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END 1027aec6487eSIngo Molnar default NR_CPUS_DEFAULT 1028a7f7f624SMasahiro Yamada help 1029506f1d07SSam Ravnborg This allows you to specify the maximum number of CPUs which this 1030bb61ccc7SJosh Boyer kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum 1031cad14bb9SKirill A. Shutemov supported value is 8192, otherwise the maximum value is 512. The 1032506f1d07SSam Ravnborg minimum value which makes sense is 2. 1033506f1d07SSam Ravnborg 1034aec6487eSIngo Molnar This is purely to save memory: each supported CPU adds about 8KB 1035aec6487eSIngo Molnar to the kernel image. 1036506f1d07SSam Ravnborg 103766558b73STim Chenconfig SCHED_CLUSTER 103866558b73STim Chen bool "Cluster scheduler support" 103966558b73STim Chen depends on SMP 104066558b73STim Chen default y 104166558b73STim Chen help 104266558b73STim Chen Cluster scheduler support improves the CPU scheduler's decision 104366558b73STim Chen making when dealing with machines that have clusters of CPUs. 104466558b73STim Chen Cluster usually means a couple of CPUs which are placed closely 104566558b73STim Chen by sharing mid-level caches, last-level cache tags or internal 104666558b73STim Chen busses. 104766558b73STim Chen 1048506f1d07SSam Ravnborgconfig SCHED_SMT 1049dbe73364SThomas Gleixner def_bool y if SMP 1050506f1d07SSam Ravnborg 1051506f1d07SSam Ravnborgconfig SCHED_MC 10523c2362e6SHarvey Harrison def_bool y 10533c2362e6SHarvey Harrison prompt "Multi-core scheduler support" 1054c8e56d20SBorislav Petkov depends on SMP 1055a7f7f624SMasahiro Yamada help 1056506f1d07SSam Ravnborg Multi-core scheduler support improves the CPU scheduler's decision 1057506f1d07SSam Ravnborg making when dealing with multi-core CPU chips at a cost of slightly 1058506f1d07SSam Ravnborg increased overhead in some places. If unsure say N here. 1059506f1d07SSam Ravnborg 1060de966cf4STim Chenconfig SCHED_MC_PRIO 1061de966cf4STim Chen bool "CPU core priorities scheduler support" 10623598e577SMeng Li depends on SCHED_MC 10633598e577SMeng Li select X86_INTEL_PSTATE if CPU_SUP_INTEL 10643598e577SMeng Li select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI 10650a21fc12SIngo Molnar select CPU_FREQ 1066de966cf4STim Chen default y 1067a7f7f624SMasahiro Yamada help 1068de966cf4STim Chen Intel Turbo Boost Max Technology 3.0 enabled CPUs have a 1069de966cf4STim Chen core ordering determined at manufacturing time, which allows 1070de966cf4STim Chen certain cores to reach higher turbo frequencies (when running 1071de966cf4STim Chen single threaded workloads) than others. 1072de966cf4STim Chen 1073de966cf4STim Chen Enabling this kernel feature teaches the scheduler about 1074de966cf4STim Chen the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the 1075de966cf4STim Chen scheduler's CPU selection logic accordingly, so that higher 1076de966cf4STim Chen overall system performance can be achieved. 1077de966cf4STim Chen 1078de966cf4STim Chen This feature will have no effect on CPUs without this feature. 1079de966cf4STim Chen 1080de966cf4STim Chen If unsure say Y here. 10815e76b2abSTim Chen 108230b8b006SThomas Gleixnerconfig UP_LATE_INIT 108330b8b006SThomas Gleixner def_bool y 1084ba360f88SThomas Gleixner depends on !SMP && X86_LOCAL_APIC 108530b8b006SThomas Gleixner 1086506f1d07SSam Ravnborgconfig X86_UP_APIC 108750849eefSJan Beulich bool "Local APIC support on uniprocessors" if !PCI_MSI 108850849eefSJan Beulich default PCI_MSI 1089dcbb01fbSArnd Bergmann depends on X86_32 && !SMP 1090a7f7f624SMasahiro Yamada help 1091506f1d07SSam Ravnborg A local APIC (Advanced Programmable Interrupt Controller) is an 1092506f1d07SSam Ravnborg integrated interrupt controller in the CPU. If you have a single-CPU 1093506f1d07SSam Ravnborg system which has a processor with a local APIC, you can say Y here to 1094506f1d07SSam Ravnborg enable and use it. If you say Y here even though your machine doesn't 1095506f1d07SSam Ravnborg have a local APIC, then the kernel will still run with no slowdown at 1096506f1d07SSam Ravnborg all. The local APIC supports CPU-generated self-interrupts (timer, 1097506f1d07SSam Ravnborg performance counters), and the NMI watchdog which detects hard 1098506f1d07SSam Ravnborg lockups. 1099506f1d07SSam Ravnborg 1100506f1d07SSam Ravnborgconfig X86_UP_IOAPIC 1101506f1d07SSam Ravnborg bool "IO-APIC support on uniprocessors" 1102506f1d07SSam Ravnborg depends on X86_UP_APIC 1103a7f7f624SMasahiro Yamada help 1104506f1d07SSam Ravnborg An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an 1105506f1d07SSam Ravnborg SMP-capable replacement for PC-style interrupt controllers. Most 1106506f1d07SSam Ravnborg SMP systems and many recent uniprocessor systems have one. 1107506f1d07SSam Ravnborg 1108506f1d07SSam Ravnborg If you have a single-CPU system with an IO-APIC, you can say Y here 1109506f1d07SSam Ravnborg to use it. If you say Y here even though your machine doesn't have 1110506f1d07SSam Ravnborg an IO-APIC, then the kernel will still run with no slowdown at all. 1111506f1d07SSam Ravnborg 1112506f1d07SSam Ravnborgconfig X86_LOCAL_APIC 11133c2362e6SHarvey Harrison def_bool y 1114dcbb01fbSArnd Bergmann depends on X86_64 || SMP || X86_UP_APIC || PCI_MSI 1115b5dc8e6cSJiang Liu select IRQ_DOMAIN_HIERARCHY 1116506f1d07SSam Ravnborg 11172b5e22afSKirill A. Shutemovconfig ACPI_MADT_WAKEUP 11182b5e22afSKirill A. Shutemov def_bool y 11192b5e22afSKirill A. Shutemov depends on X86_64 11202b5e22afSKirill A. Shutemov depends on ACPI 11212b5e22afSKirill A. Shutemov depends on SMP 11222b5e22afSKirill A. Shutemov depends on X86_LOCAL_APIC 11232b5e22afSKirill A. Shutemov 1124506f1d07SSam Ravnborgconfig X86_IO_APIC 1125b1da1e71SJan Beulich def_bool y 1126b1da1e71SJan Beulich depends on X86_LOCAL_APIC || X86_UP_IOAPIC 1127506f1d07SSam Ravnborg 112841b9eb26SStefan Assmannconfig X86_REROUTE_FOR_BROKEN_BOOT_IRQS 112941b9eb26SStefan Assmann bool "Reroute for broken boot IRQs" 113041b9eb26SStefan Assmann depends on X86_IO_APIC 1131a7f7f624SMasahiro Yamada help 113241b9eb26SStefan Assmann This option enables a workaround that fixes a source of 113341b9eb26SStefan Assmann spurious interrupts. This is recommended when threaded 113441b9eb26SStefan Assmann interrupt handling is used on systems where the generation of 113541b9eb26SStefan Assmann superfluous "boot interrupts" cannot be disabled. 113641b9eb26SStefan Assmann 113741b9eb26SStefan Assmann Some chipsets generate a legacy INTx "boot IRQ" when the IRQ 113841b9eb26SStefan Assmann entry in the chipset's IO-APIC is masked (as, e.g. the RT 113941b9eb26SStefan Assmann kernel does during interrupt handling). On chipsets where this 114041b9eb26SStefan Assmann boot IRQ generation cannot be disabled, this workaround keeps 114141b9eb26SStefan Assmann the original IRQ line masked so that only the equivalent "boot 114241b9eb26SStefan Assmann IRQ" is delivered to the CPUs. The workaround also tells the 114341b9eb26SStefan Assmann kernel to set up the IRQ handler on the boot IRQ line. In this 114441b9eb26SStefan Assmann way only one interrupt is delivered to the kernel. Otherwise 114541b9eb26SStefan Assmann the spurious second interrupt may cause the kernel to bring 114641b9eb26SStefan Assmann down (vital) interrupt lines. 114741b9eb26SStefan Assmann 114841b9eb26SStefan Assmann Only affects "broken" chipsets. Interrupt sharing may be 114941b9eb26SStefan Assmann increased on these systems. 115041b9eb26SStefan Assmann 1151506f1d07SSam Ravnborgconfig X86_MCE 1152bab9bc65SAndi Kleen bool "Machine Check / overheating reporting" 1153648ed940SChen, Gong select GENERIC_ALLOCATOR 1154e57dbaf7SBorislav Petkov default y 1155a7f7f624SMasahiro Yamada help 1156bab9bc65SAndi Kleen Machine Check support allows the processor to notify the 1157bab9bc65SAndi Kleen kernel if it detects a problem (e.g. overheating, data corruption). 1158506f1d07SSam Ravnborg The action the kernel takes depends on the severity of the problem, 1159bab9bc65SAndi Kleen ranging from warning messages to halting the machine. 11604efc0670SAndi Kleen 11615de97c9fSTony Luckconfig X86_MCELOG_LEGACY 11625de97c9fSTony Luck bool "Support for deprecated /dev/mcelog character device" 11635de97c9fSTony Luck depends on X86_MCE 1164a7f7f624SMasahiro Yamada help 11655de97c9fSTony Luck Enable support for /dev/mcelog which is needed by the old mcelog 11665de97c9fSTony Luck userspace logging daemon. Consider switching to the new generation 11675de97c9fSTony Luck rasdaemon solution. 11685de97c9fSTony Luck 1169506f1d07SSam Ravnborgconfig X86_MCE_INTEL 11703c2362e6SHarvey Harrison def_bool y 11713c2362e6SHarvey Harrison prompt "Intel MCE features" 1172c1ebf835SAndi Kleen depends on X86_MCE && X86_LOCAL_APIC 1173a7f7f624SMasahiro Yamada help 1174506f1d07SSam Ravnborg Additional support for intel specific MCE features such as 1175506f1d07SSam Ravnborg the thermal monitor. 1176506f1d07SSam Ravnborg 1177506f1d07SSam Ravnborgconfig X86_MCE_AMD 11783c2362e6SHarvey Harrison def_bool y 11793c2362e6SHarvey Harrison prompt "AMD MCE features" 1180d35fb312SYazen Ghannam depends on X86_MCE && X86_LOCAL_APIC 1181a7f7f624SMasahiro Yamada help 1182506f1d07SSam Ravnborg Additional support for AMD specific MCE features such as 1183506f1d07SSam Ravnborg the DRAM Error Threshold. 1184506f1d07SSam Ravnborg 11854efc0670SAndi Kleenconfig X86_ANCIENT_MCE 11866fc108a0SJan Beulich bool "Support for old Pentium 5 / WinChip machine checks" 1187c31d9633SAndi Kleen depends on X86_32 && X86_MCE 1188a7f7f624SMasahiro Yamada help 11894efc0670SAndi Kleen Include support for machine check handling on old Pentium 5 or WinChip 11905065a706SMasanari Iida systems. These typically need to be enabled explicitly on the command 11914efc0670SAndi Kleen line. 11924efc0670SAndi Kleen 1193b2762686SAndi Kleenconfig X86_MCE_THRESHOLD 1194b2762686SAndi Kleen depends on X86_MCE_AMD || X86_MCE_INTEL 11956fc108a0SJan Beulich def_bool y 1196b2762686SAndi Kleen 1197ea149b36SAndi Kleenconfig X86_MCE_INJECT 1198bc8e80d5SBorislav Petkov depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS 1199ea149b36SAndi Kleen tristate "Machine check injector support" 1200a7f7f624SMasahiro Yamada help 1201ea149b36SAndi Kleen Provide support for injecting machine checks for testing purposes. 1202ea149b36SAndi Kleen If you don't know what a machine check is and you don't do kernel 1203ea149b36SAndi Kleen QA it is safe to say n. 1204ea149b36SAndi Kleen 120507dc900eSPeter Zijlstrasource "arch/x86/events/Kconfig" 1206e633c65aSKan Liang 12075aef51c3SAndy Lutomirskiconfig X86_LEGACY_VM86 12081e642812SIngo Molnar bool "Legacy VM86 support" 1209506f1d07SSam Ravnborg depends on X86_32 1210a7f7f624SMasahiro Yamada help 12115aef51c3SAndy Lutomirski This option allows user programs to put the CPU into V8086 12125aef51c3SAndy Lutomirski mode, which is an 80286-era approximation of 16-bit real mode. 12135aef51c3SAndy Lutomirski 12145aef51c3SAndy Lutomirski Some very old versions of X and/or vbetool require this option 12155aef51c3SAndy Lutomirski for user mode setting. Similarly, DOSEMU will use it if 12165aef51c3SAndy Lutomirski available to accelerate real mode DOS programs. However, any 12175aef51c3SAndy Lutomirski recent version of DOSEMU, X, or vbetool should be fully 12185aef51c3SAndy Lutomirski functional even without kernel VM86 support, as they will all 12191e642812SIngo Molnar fall back to software emulation. Nevertheless, if you are using 12201e642812SIngo Molnar a 16-bit DOS program where 16-bit performance matters, vm86 12211e642812SIngo Molnar mode might be faster than emulation and you might want to 12221e642812SIngo Molnar enable this option. 12235aef51c3SAndy Lutomirski 12241e642812SIngo Molnar Note that any app that works on a 64-bit kernel is unlikely to 12251e642812SIngo Molnar need this option, as 64-bit kernels don't, and can't, support 12261e642812SIngo Molnar V8086 mode. This option is also unrelated to 16-bit protected 12271e642812SIngo Molnar mode and is not needed to run most 16-bit programs under Wine. 12285aef51c3SAndy Lutomirski 12291e642812SIngo Molnar Enabling this option increases the complexity of the kernel 12301e642812SIngo Molnar and slows down exception handling a tiny bit. 12315aef51c3SAndy Lutomirski 12321e642812SIngo Molnar If unsure, say N here. 12335aef51c3SAndy Lutomirski 12345aef51c3SAndy Lutomirskiconfig VM86 12355aef51c3SAndy Lutomirski bool 12365aef51c3SAndy Lutomirski default X86_LEGACY_VM86 123734273f41SH. Peter Anvin 123834273f41SH. Peter Anvinconfig X86_16BIT 123934273f41SH. Peter Anvin bool "Enable support for 16-bit segments" if EXPERT 124034273f41SH. Peter Anvin default y 1241a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 1242a7f7f624SMasahiro Yamada help 124334273f41SH. Peter Anvin This option is required by programs like Wine to run 16-bit 124434273f41SH. Peter Anvin protected mode legacy code on x86 processors. Disabling 124534273f41SH. Peter Anvin this option saves about 300 bytes on i386, or around 6K text 124634273f41SH. Peter Anvin plus 16K runtime memory on x86-64, 124734273f41SH. Peter Anvin 124834273f41SH. Peter Anvinconfig X86_ESPFIX32 124934273f41SH. Peter Anvin def_bool y 125034273f41SH. Peter Anvin depends on X86_16BIT && X86_32 1251506f1d07SSam Ravnborg 1252197725deSH. Peter Anvinconfig X86_ESPFIX64 1253197725deSH. Peter Anvin def_bool y 125434273f41SH. Peter Anvin depends on X86_16BIT && X86_64 1255506f1d07SSam Ravnborg 12561ad83c85SAndy Lutomirskiconfig X86_VSYSCALL_EMULATION 12571ad83c85SAndy Lutomirski bool "Enable vsyscall emulation" if EXPERT 12581ad83c85SAndy Lutomirski default y 12591ad83c85SAndy Lutomirski depends on X86_64 1260a7f7f624SMasahiro Yamada help 12611ad83c85SAndy Lutomirski This enables emulation of the legacy vsyscall page. Disabling 12621ad83c85SAndy Lutomirski it is roughly equivalent to booting with vsyscall=none, except 12631ad83c85SAndy Lutomirski that it will also disable the helpful warning if a program 12641ad83c85SAndy Lutomirski tries to use a vsyscall. With this option set to N, offending 12651ad83c85SAndy Lutomirski programs will just segfault, citing addresses of the form 12661ad83c85SAndy Lutomirski 0xffffffffff600?00. 12671ad83c85SAndy Lutomirski 12681ad83c85SAndy Lutomirski This option is required by many programs built before 2013, and 12691ad83c85SAndy Lutomirski care should be used even with newer programs if set to N. 12701ad83c85SAndy Lutomirski 12711ad83c85SAndy Lutomirski Disabling this option saves about 7K of kernel size and 12721ad83c85SAndy Lutomirski possibly 4K of additional runtime pagetable memory. 12731ad83c85SAndy Lutomirski 1274111e7b15SThomas Gleixnerconfig X86_IOPL_IOPERM 1275111e7b15SThomas Gleixner bool "IOPERM and IOPL Emulation" 1276a24ca997SThomas Gleixner default y 1277a7f7f624SMasahiro Yamada help 1278111e7b15SThomas Gleixner This enables the ioperm() and iopl() syscalls which are necessary 1279111e7b15SThomas Gleixner for legacy applications. 1280111e7b15SThomas Gleixner 1281c8137aceSThomas Gleixner Legacy IOPL support is an overbroad mechanism which allows user 1282c8137aceSThomas Gleixner space aside of accessing all 65536 I/O ports also to disable 1283c8137aceSThomas Gleixner interrupts. To gain this access the caller needs CAP_SYS_RAWIO 1284c8137aceSThomas Gleixner capabilities and permission from potentially active security 1285c8137aceSThomas Gleixner modules. 1286c8137aceSThomas Gleixner 1287c8137aceSThomas Gleixner The emulation restricts the functionality of the syscall to 1288c8137aceSThomas Gleixner only allowing the full range I/O port access, but prevents the 1289a24ca997SThomas Gleixner ability to disable interrupts from user space which would be 1290a24ca997SThomas Gleixner granted if the hardware IOPL mechanism would be used. 1291c8137aceSThomas Gleixner 1292506f1d07SSam Ravnborgconfig TOSHIBA 1293506f1d07SSam Ravnborg tristate "Toshiba Laptop support" 1294506f1d07SSam Ravnborg depends on X86_32 1295a7f7f624SMasahiro Yamada help 1296506f1d07SSam Ravnborg This adds a driver to safely access the System Management Mode of 1297506f1d07SSam Ravnborg the CPU on Toshiba portables with a genuine Toshiba BIOS. It does 1298506f1d07SSam Ravnborg not work on models with a Phoenix BIOS. The System Management Mode 1299506f1d07SSam Ravnborg is used to set the BIOS and power saving options on Toshiba portables. 1300506f1d07SSam Ravnborg 1301506f1d07SSam Ravnborg For information on utilities to make use of this driver see the 1302506f1d07SSam Ravnborg Toshiba Linux utilities web site at: 1303506f1d07SSam Ravnborg <http://www.buzzard.org.uk/toshiba/>. 1304506f1d07SSam Ravnborg 1305506f1d07SSam Ravnborg Say Y if you intend to run this kernel on a Toshiba portable. 1306506f1d07SSam Ravnborg Say N otherwise. 1307506f1d07SSam Ravnborg 1308506f1d07SSam Ravnborgconfig X86_REBOOTFIXUPS 13099ba16087SJan Beulich bool "Enable X86 board specific fixups for reboot" 13109ba16087SJan Beulich depends on X86_32 1311a7f7f624SMasahiro Yamada help 1312506f1d07SSam Ravnborg This enables chipset and/or board specific fixups to be done 1313506f1d07SSam Ravnborg in order to get reboot to work correctly. This is only needed on 1314506f1d07SSam Ravnborg some combinations of hardware and BIOS. The symptom, for which 1315506f1d07SSam Ravnborg this config is intended, is when reboot ends with a stalled/hung 1316506f1d07SSam Ravnborg system. 1317506f1d07SSam Ravnborg 1318506f1d07SSam Ravnborg Currently, the only fixup is for the Geode machines using 13195e3a77e9SFlorian Fainelli CS5530A and CS5536 chipsets and the RDC R-321x SoC. 1320506f1d07SSam Ravnborg 1321506f1d07SSam Ravnborg Say Y if you want to enable the fixup. Currently, it's safe to 1322506f1d07SSam Ravnborg enable this option even if you don't need it. 1323506f1d07SSam Ravnborg Say N otherwise. 1324506f1d07SSam Ravnborg 1325506f1d07SSam Ravnborgconfig MICROCODE 1326e6bcfdd7SThomas Gleixner def_bool y 132780030e3dSBorislav Petkov depends on CPU_SUP_AMD || CPU_SUP_INTEL 132850cef76dSBorislav Petkov (AMD) select CRYPTO_LIB_SHA256 if CPU_SUP_AMD 132980cc9f10SPeter Oruba 1330fdbd4381SThomas Gleixnerconfig MICROCODE_INITRD32 1331fdbd4381SThomas Gleixner def_bool y 1332fdbd4381SThomas Gleixner depends on MICROCODE && X86_32 && BLK_DEV_INITRD 1333fdbd4381SThomas Gleixner 1334a77a94f8SBorislav Petkovconfig MICROCODE_LATE_LOADING 1335a77a94f8SBorislav Petkov bool "Late microcode loading (DANGEROUS)" 1336c02f48e0SBorislav Petkov default n 1337634ac23aSThomas Gleixner depends on MICROCODE && SMP 1338a7f7f624SMasahiro Yamada help 1339a77a94f8SBorislav Petkov Loading microcode late, when the system is up and executing instructions 1340a77a94f8SBorislav Petkov is a tricky business and should be avoided if possible. Just the sequence 1341a77a94f8SBorislav Petkov of synchronizing all cores and SMT threads is one fragile dance which does 1342a77a94f8SBorislav Petkov not guarantee that cores might not softlock after the loading. Therefore, 13439407bda8SThomas Gleixner use this at your own risk. Late loading taints the kernel unless the 13449407bda8SThomas Gleixner microcode header indicates that it is safe for late loading via the 13459407bda8SThomas Gleixner minimal revision check. This minimal revision check can be enforced on 13469407bda8SThomas Gleixner the kernel command line with "microcode.minrev=Y". 13479407bda8SThomas Gleixner 13489407bda8SThomas Gleixnerconfig MICROCODE_LATE_FORCE_MINREV 13499407bda8SThomas Gleixner bool "Enforce late microcode loading minimal revision check" 13509407bda8SThomas Gleixner default n 13519407bda8SThomas Gleixner depends on MICROCODE_LATE_LOADING 13529407bda8SThomas Gleixner help 13539407bda8SThomas Gleixner To prevent that users load microcode late which modifies already 13549407bda8SThomas Gleixner in use features, newer microcode patches have a minimum revision field 13559407bda8SThomas Gleixner in the microcode header, which tells the kernel which minimum 13569407bda8SThomas Gleixner revision must be active in the CPU to safely load that new microcode 13579407bda8SThomas Gleixner late into the running system. If disabled the check will not 13589407bda8SThomas Gleixner be enforced but the kernel will be tainted when the minimal 13599407bda8SThomas Gleixner revision check fails. 13609407bda8SThomas Gleixner 13619407bda8SThomas Gleixner This minimal revision check can also be controlled via the 13629407bda8SThomas Gleixner "microcode.minrev" parameter on the kernel command line. 13639407bda8SThomas Gleixner 13649407bda8SThomas Gleixner If unsure say Y. 1365506f1d07SSam Ravnborg 1366506f1d07SSam Ravnborgconfig X86_MSR 1367506f1d07SSam Ravnborg tristate "/dev/cpu/*/msr - Model-specific register support" 1368a7f7f624SMasahiro Yamada help 1369506f1d07SSam Ravnborg This device gives privileged processes access to the x86 1370506f1d07SSam Ravnborg Model-Specific Registers (MSRs). It is a character device with 1371506f1d07SSam Ravnborg major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr. 1372506f1d07SSam Ravnborg MSR accesses are directed to a specific CPU on multi-processor 1373506f1d07SSam Ravnborg systems. 1374506f1d07SSam Ravnborg 1375506f1d07SSam Ravnborgconfig X86_CPUID 1376506f1d07SSam Ravnborg tristate "/dev/cpu/*/cpuid - CPU information support" 1377a7f7f624SMasahiro Yamada help 1378506f1d07SSam Ravnborg This device gives processes access to the x86 CPUID instruction to 1379506f1d07SSam Ravnborg be executed on a specific processor. It is a character device 1380506f1d07SSam Ravnborg with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to 1381506f1d07SSam Ravnborg /dev/cpu/31/cpuid. 1382506f1d07SSam Ravnborg 1383bbeb69ceSArnd Bergmannconfig HIGHMEM4G 1384bbeb69ceSArnd Bergmann bool "High Memory Support" 1385506f1d07SSam Ravnborg depends on X86_32 1386a7f7f624SMasahiro Yamada help 1387bbeb69ceSArnd Bergmann Linux can use up to 4 Gigabytes of physical memory on x86 systems. 1388506f1d07SSam Ravnborg However, the address space of 32-bit x86 processors is only 4 1389506f1d07SSam Ravnborg Gigabytes large. That means that, if you have a large amount of 1390506f1d07SSam Ravnborg physical memory, not all of it can be "permanently mapped" by the 1391506f1d07SSam Ravnborg kernel. The physical memory that's not permanently mapped is called 1392506f1d07SSam Ravnborg "high memory". 1393506f1d07SSam Ravnborg 1394506f1d07SSam Ravnborg If you are compiling a kernel which will never run on a machine with 1395506f1d07SSam Ravnborg more than 1 Gigabyte total physical RAM, answer "off" here (default 1396506f1d07SSam Ravnborg choice and suitable for most users). This will result in a "3GB/1GB" 1397506f1d07SSam Ravnborg split: 3GB are mapped so that each process sees a 3GB virtual memory 1398506f1d07SSam Ravnborg space and the remaining part of the 4GB virtual memory space is used 1399506f1d07SSam Ravnborg by the kernel to permanently map as much physical memory as 1400506f1d07SSam Ravnborg possible. 1401506f1d07SSam Ravnborg 1402506f1d07SSam Ravnborg If the machine has between 1 and 4 Gigabytes physical RAM, then 1403bbeb69ceSArnd Bergmann answer "Y" here. 1404506f1d07SSam Ravnborg 1405bbeb69ceSArnd Bergmann If unsure, say N. 1406506f1d07SSam Ravnborg 1407506f1d07SSam Ravnborgchoice 14086a108a14SDavid Rientjes prompt "Memory split" if EXPERT 1409506f1d07SSam Ravnborg default VMSPLIT_3G 1410506f1d07SSam Ravnborg depends on X86_32 1411a7f7f624SMasahiro Yamada help 1412506f1d07SSam Ravnborg Select the desired split between kernel and user memory. 1413506f1d07SSam Ravnborg 1414506f1d07SSam Ravnborg If the address range available to the kernel is less than the 1415506f1d07SSam Ravnborg physical memory installed, the remaining memory will be available 1416506f1d07SSam Ravnborg as "high memory". Accessing high memory is a little more costly 1417506f1d07SSam Ravnborg than low memory, as it needs to be mapped into the kernel first. 1418506f1d07SSam Ravnborg Note that increasing the kernel address space limits the range 1419506f1d07SSam Ravnborg available to user programs, making the address space there 1420506f1d07SSam Ravnborg tighter. Selecting anything other than the default 3G/1G split 1421506f1d07SSam Ravnborg will also likely make your kernel incompatible with binary-only 1422506f1d07SSam Ravnborg kernel modules. 1423506f1d07SSam Ravnborg 1424506f1d07SSam Ravnborg If you are not absolutely sure what you are doing, leave this 1425506f1d07SSam Ravnborg option alone! 1426506f1d07SSam Ravnborg 1427506f1d07SSam Ravnborg config VMSPLIT_3G 1428506f1d07SSam Ravnborg bool "3G/1G user/kernel split" 1429506f1d07SSam Ravnborg config VMSPLIT_3G_OPT 1430506f1d07SSam Ravnborg depends on !X86_PAE 1431506f1d07SSam Ravnborg bool "3G/1G user/kernel split (for full 1G low memory)" 1432506f1d07SSam Ravnborg config VMSPLIT_2G 1433506f1d07SSam Ravnborg bool "2G/2G user/kernel split" 1434506f1d07SSam Ravnborg config VMSPLIT_2G_OPT 1435506f1d07SSam Ravnborg depends on !X86_PAE 1436506f1d07SSam Ravnborg bool "2G/2G user/kernel split (for full 2G low memory)" 1437506f1d07SSam Ravnborg config VMSPLIT_1G 1438506f1d07SSam Ravnborg bool "1G/3G user/kernel split" 1439506f1d07SSam Ravnborgendchoice 1440506f1d07SSam Ravnborg 1441506f1d07SSam Ravnborgconfig PAGE_OFFSET 1442506f1d07SSam Ravnborg hex 1443506f1d07SSam Ravnborg default 0xB0000000 if VMSPLIT_3G_OPT 1444506f1d07SSam Ravnborg default 0x80000000 if VMSPLIT_2G 1445506f1d07SSam Ravnborg default 0x78000000 if VMSPLIT_2G_OPT 1446506f1d07SSam Ravnborg default 0x40000000 if VMSPLIT_1G 1447506f1d07SSam Ravnborg default 0xC0000000 1448506f1d07SSam Ravnborg depends on X86_32 1449506f1d07SSam Ravnborg 1450506f1d07SSam Ravnborgconfig HIGHMEM 1451bbeb69ceSArnd Bergmann def_bool HIGHMEM4G 1452506f1d07SSam Ravnborg 1453506f1d07SSam Ravnborgconfig X86_PAE 14549ba16087SJan Beulich bool "PAE (Physical Address Extension) Support" 145588a2b4edSArnd Bergmann depends on X86_32 && X86_HAVE_PAE 1456d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 1457a7f7f624SMasahiro Yamada help 1458506f1d07SSam Ravnborg PAE is required for NX support, and furthermore enables 1459506f1d07SSam Ravnborg larger swapspace support for non-overcommit purposes. It 1460506f1d07SSam Ravnborg has the cost of more pagetable lookup overhead, and also 1461506f1d07SSam Ravnborg consumes more pagetable space per process. 1462506f1d07SSam Ravnborg 146310971ab2SIngo Molnarconfig X86_DIRECT_GBPAGES 1464e5008abeSLuis R. Rodriguez def_bool y 14652e1da13fSVlastimil Babka depends on X86_64 1466a7f7f624SMasahiro Yamada help 146710971ab2SIngo Molnar Certain kernel features effectively disable kernel 146810971ab2SIngo Molnar linear 1 GB mappings (even if the CPU otherwise 146910971ab2SIngo Molnar supports them), so don't confuse the user by printing 147010971ab2SIngo Molnar that we have them enabled. 14719e899816SNick Piggin 14725c280cf6SThomas Gleixnerconfig X86_CPA_STATISTICS 14735c280cf6SThomas Gleixner bool "Enable statistic for Change Page Attribute" 14745c280cf6SThomas Gleixner depends on DEBUG_FS 1475a7f7f624SMasahiro Yamada help 1476b75baaf3SIngo Molnar Expose statistics about the Change Page Attribute mechanism, which 1477a943245aSColin Ian King helps to determine the effectiveness of preserving large and huge 14785c280cf6SThomas Gleixner page mappings when mapping protections are changed. 14795c280cf6SThomas Gleixner 148020f07a04SKirill A. Shutemovconfig X86_MEM_ENCRYPT 148120f07a04SKirill A. Shutemov select ARCH_HAS_FORCE_DMA_UNENCRYPTED 148220f07a04SKirill A. Shutemov select DYNAMIC_PHYSICAL_MASK 148320f07a04SKirill A. Shutemov def_bool n 148420f07a04SKirill A. Shutemov 14857744ccdbSTom Lendackyconfig AMD_MEM_ENCRYPT 14867744ccdbSTom Lendacky bool "AMD Secure Memory Encryption (SME) support" 14877744ccdbSTom Lendacky depends on X86_64 && CPU_SUP_AMD 14886c321179STom Lendacky depends on EFI_STUB 148982fef0adSDavid Rientjes select DMA_COHERENT_POOL 1490ce9084baSArd Biesheuvel select ARCH_USE_MEMREMAP_PROT 1491597cfe48SJoerg Roedel select INSTRUCTION_DECODER 1492aa5a4611STom Lendacky select ARCH_HAS_CC_PLATFORM 149320f07a04SKirill A. Shutemov select X86_MEM_ENCRYPT 14946c321179STom Lendacky select UNACCEPTED_MEMORY 1495c5529418SNikunj A Dadhania select CRYPTO_LIB_AESGCM 1496a7f7f624SMasahiro Yamada help 14977744ccdbSTom Lendacky Say yes to enable support for the encryption of system memory. 14987744ccdbSTom Lendacky This requires an AMD processor that supports Secure Memory 14997744ccdbSTom Lendacky Encryption (SME). 15007744ccdbSTom Lendacky 1501506f1d07SSam Ravnborg# Common NUMA Features 1502506f1d07SSam Ravnborgconfig NUMA 1503e133f6eaSRandy Dunlap bool "NUMA Memory Allocation and Scheduler Support" 1504506f1d07SSam Ravnborg depends on SMP 15050abf5086SArnd Bergmann depends on X86_64 15067ecd19cfSKefeng Wang select USE_PERCPU_NUMA_NODE_ID 15070c436a58SSaurabh Sengar select OF_NUMA if OF 1508a7f7f624SMasahiro Yamada help 1509e133f6eaSRandy Dunlap Enable NUMA (Non-Uniform Memory Access) support. 1510fd51b2d7SKOSAKI Motohiro 1511506f1d07SSam Ravnborg The kernel will try to allocate memory used by a CPU on the 1512506f1d07SSam Ravnborg local memory controller of the CPU and add some more 1513506f1d07SSam Ravnborg NUMA awareness to the kernel. 1514506f1d07SSam Ravnborg 1515c280ea5eSIngo Molnar For 64-bit this is recommended if the system is Intel Core i7 1516fd51b2d7SKOSAKI Motohiro (or later), AMD Opteron, or EM64T NUMA. 1517fd51b2d7SKOSAKI Motohiro 1518fd51b2d7SKOSAKI Motohiro Otherwise, you should say N. 1519506f1d07SSam Ravnborg 1520eec1d4faSHans Rosenfeldconfig AMD_NUMA 15213c2362e6SHarvey Harrison def_bool y 15223c2362e6SHarvey Harrison prompt "Old style AMD Opteron NUMA detection" 15235da0ef9aSTejun Heo depends on X86_64 && NUMA && PCI 1524a7f7f624SMasahiro Yamada help 1525eec1d4faSHans Rosenfeld Enable AMD NUMA node topology detection. You should say Y here if 1526eec1d4faSHans Rosenfeld you have a multi processor AMD system. This uses an old method to 1527eec1d4faSHans Rosenfeld read the NUMA configuration directly from the builtin Northbridge 1528eec1d4faSHans Rosenfeld of Opteron. It is recommended to use X86_64_ACPI_NUMA instead, 1529eec1d4faSHans Rosenfeld which also takes priority if both are compiled in. 1530506f1d07SSam Ravnborg 1531506f1d07SSam Ravnborgconfig X86_64_ACPI_NUMA 15323c2362e6SHarvey Harrison def_bool y 15333c2362e6SHarvey Harrison prompt "ACPI NUMA detection" 1534506f1d07SSam Ravnborg depends on X86_64 && NUMA && ACPI && PCI 1535506f1d07SSam Ravnborg select ACPI_NUMA 1536a7f7f624SMasahiro Yamada help 1537506f1d07SSam Ravnborg Enable ACPI SRAT based node topology detection. 1538506f1d07SSam Ravnborg 1539506f1d07SSam Ravnborgconfig NODES_SHIFT 1540d25e26b6SLinus Torvalds int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP 154151591e31SDavid Rientjes range 1 10 154251591e31SDavid Rientjes default "10" if MAXSMP 1543506f1d07SSam Ravnborg default "6" if X86_64 1544506f1d07SSam Ravnborg default "3" 1545a9ee6cf5SMike Rapoport depends on NUMA 1546a7f7f624SMasahiro Yamada help 15471184dc2fSMike Travis Specify the maximum number of NUMA Nodes available on the target 1548692105b8SMatt LaPlante system. Increases memory reserved to accommodate various tables. 1549506f1d07SSam Ravnborg 1550506f1d07SSam Ravnborgconfig ARCH_FLATMEM_ENABLE 1551506f1d07SSam Ravnborg def_bool y 15523b16651fSTejun Heo depends on X86_32 && !NUMA 1553506f1d07SSam Ravnborg 1554506f1d07SSam Ravnborgconfig ARCH_SPARSEMEM_ENABLE 1555506f1d07SSam Ravnborg def_bool y 1556506f1d07SSam Ravnborg select SPARSEMEM_STATIC if X86_32 1557506f1d07SSam Ravnborg select SPARSEMEM_VMEMMAP_ENABLE if X86_64 1558cba5d9b3SKirill A. Shutemov select SPARSEMEM_VMEMMAP if X86_64 1559506f1d07SSam Ravnborg 15603b16651fSTejun Heoconfig ARCH_SPARSEMEM_DEFAULT 15616ad57f7fSMike Rapoport def_bool X86_64 || (NUMA && X86_32) 15623b16651fSTejun Heo 1563506f1d07SSam Ravnborgconfig ARCH_SELECT_MEMORY_MODEL 1564506f1d07SSam Ravnborg def_bool y 15654eda2bc3SDavid Hildenbrand depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE 1566506f1d07SSam Ravnborg 1567506f1d07SSam Ravnborgconfig ARCH_MEMORY_PROBE 1568a0842b70SToshi Kani bool "Enable sysfs memory/probe interface" 15695c11f00bSDavid Hildenbrand depends on MEMORY_HOTPLUG 1570a0842b70SToshi Kani help 1571a0842b70SToshi Kani This option enables a sysfs memory/probe interface for testing. 1572cb1aaebeSMauro Carvalho Chehab See Documentation/admin-guide/mm/memory-hotplug.rst for more information. 1573a0842b70SToshi Kani If you are unsure how to answer this question, answer N. 1574506f1d07SSam Ravnborg 15753b16651fSTejun Heoconfig ARCH_PROC_KCORE_TEXT 15763b16651fSTejun Heo def_bool y 15773b16651fSTejun Heo depends on X86_64 && PROC_KCORE 15783b16651fSTejun Heo 1579a29815a3SAvi Kivityconfig ILLEGAL_POINTER_VALUE 1580a29815a3SAvi Kivity hex 1581a29815a3SAvi Kivity default 0 if X86_32 1582a29815a3SAvi Kivity default 0xdead000000000000 if X86_64 1583a29815a3SAvi Kivity 15847a67832cSDan Williamsconfig X86_PMEM_LEGACY_DEVICE 15857a67832cSDan Williams bool 15867a67832cSDan Williams 1587ec776ef6SChristoph Hellwigconfig X86_PMEM_LEGACY 15887a67832cSDan Williams tristate "Support non-standard NVDIMMs and ADR protected memory" 15899f53f9faSDan Williams depends on PHYS_ADDR_T_64BIT 15909f53f9faSDan Williams depends on BLK_DEV 15917a67832cSDan Williams select X86_PMEM_LEGACY_DEVICE 15927b27a862SDan Williams select NUMA_KEEP_MEMINFO if NUMA 15939f53f9faSDan Williams select LIBNVDIMM 1594ec776ef6SChristoph Hellwig help 1595ec776ef6SChristoph Hellwig Treat memory marked using the non-standard e820 type of 12 as used 1596ec776ef6SChristoph Hellwig by the Intel Sandy Bridge-EP reference BIOS as protected memory. 1597ec776ef6SChristoph Hellwig The kernel will offer these regions to the 'pmem' driver so 1598ec776ef6SChristoph Hellwig they can be used for persistent storage. 1599ec776ef6SChristoph Hellwig 1600ec776ef6SChristoph Hellwig Say Y if unsure. 1601ec776ef6SChristoph Hellwig 16029f077871SJeremy Fitzhardingeconfig X86_CHECK_BIOS_CORRUPTION 16039f077871SJeremy Fitzhardinge bool "Check for low memory corruption" 1604a7f7f624SMasahiro Yamada help 16059f077871SJeremy Fitzhardinge Periodically check for memory corruption in low memory, which 16069f077871SJeremy Fitzhardinge is suspected to be caused by BIOS. Even when enabled in the 16079f077871SJeremy Fitzhardinge configuration, it is disabled at runtime. Enable it by 16089f077871SJeremy Fitzhardinge setting "memory_corruption_check=1" on the kernel command 16099f077871SJeremy Fitzhardinge line. By default it scans the low 64k of memory every 60 16109f077871SJeremy Fitzhardinge seconds; see the memory_corruption_check_size and 16119f077871SJeremy Fitzhardinge memory_corruption_check_period parameters in 16128c27ceffSMauro Carvalho Chehab Documentation/admin-guide/kernel-parameters.rst to adjust this. 16139f077871SJeremy Fitzhardinge 16149f077871SJeremy Fitzhardinge When enabled with the default parameters, this option has 16159f077871SJeremy Fitzhardinge almost no overhead, as it reserves a relatively small amount 16169f077871SJeremy Fitzhardinge of memory and scans it infrequently. It both detects corruption 16179f077871SJeremy Fitzhardinge and prevents it from affecting the running system. 16189f077871SJeremy Fitzhardinge 16199f077871SJeremy Fitzhardinge It is, however, intended as a diagnostic tool; if repeatable 16209f077871SJeremy Fitzhardinge BIOS-originated corruption always affects the same memory, 16219f077871SJeremy Fitzhardinge you can use memmap= to prevent the kernel from using that 16229f077871SJeremy Fitzhardinge memory. 16239f077871SJeremy Fitzhardinge 1624c885df50SJeremy Fitzhardingeconfig X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK 1625c885df50SJeremy Fitzhardinge bool "Set the default setting of memory_corruption_check" 1626c885df50SJeremy Fitzhardinge depends on X86_CHECK_BIOS_CORRUPTION 1627c885df50SJeremy Fitzhardinge default y 1628a7f7f624SMasahiro Yamada help 1629c885df50SJeremy Fitzhardinge Set whether the default state of memory_corruption_check is 1630c885df50SJeremy Fitzhardinge on or off. 1631c885df50SJeremy Fitzhardinge 1632506f1d07SSam Ravnborgconfig MATH_EMULATION 1633506f1d07SSam Ravnborg bool 1634a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 163587d6021bSArnd Bergmann prompt "Math emulation" if X86_32 && (M486SX || MELAN) 1636a7f7f624SMasahiro Yamada help 1637506f1d07SSam Ravnborg Linux can emulate a math coprocessor (used for floating point 1638506f1d07SSam Ravnborg operations) if you don't have one. 486DX and Pentium processors have 1639506f1d07SSam Ravnborg a math coprocessor built in, 486SX and 386 do not, unless you added 1640506f1d07SSam Ravnborg a 487DX or 387, respectively. (The messages during boot time can 1641506f1d07SSam Ravnborg give you some hints here ["man dmesg"].) Everyone needs either a 1642506f1d07SSam Ravnborg coprocessor or this emulation. 1643506f1d07SSam Ravnborg 1644506f1d07SSam Ravnborg If you don't have a math coprocessor, you need to say Y here; if you 1645506f1d07SSam Ravnborg say Y here even though you have a coprocessor, the coprocessor will 1646506f1d07SSam Ravnborg be used nevertheless. (This behavior can be changed with the kernel 1647506f1d07SSam Ravnborg command line option "no387", which comes handy if your coprocessor 1648506f1d07SSam Ravnborg is broken. Try "man bootparam" or see the documentation of your boot 1649506f1d07SSam Ravnborg loader (lilo or loadlin) about how to pass options to the kernel at 1650506f1d07SSam Ravnborg boot time.) This means that it is a good idea to say Y here if you 1651506f1d07SSam Ravnborg intend to use this kernel on different machines. 1652506f1d07SSam Ravnborg 1653506f1d07SSam Ravnborg More information about the internals of the Linux math coprocessor 1654506f1d07SSam Ravnborg emulation can be found in <file:arch/x86/math-emu/README>. 1655506f1d07SSam Ravnborg 1656506f1d07SSam Ravnborg If you are not sure, say Y; apart from resulting in a 66 KB bigger 1657506f1d07SSam Ravnborg kernel, it won't hurt. 1658506f1d07SSam Ravnborg 1659506f1d07SSam Ravnborgconfig MTRR 16606fc108a0SJan Beulich def_bool y 16616a108a14SDavid Rientjes prompt "MTRR (Memory Type Range Register) support" if EXPERT 1662a7f7f624SMasahiro Yamada help 1663506f1d07SSam Ravnborg On Intel P6 family processors (Pentium Pro, Pentium II and later) 1664506f1d07SSam Ravnborg the Memory Type Range Registers (MTRRs) may be used to control 1665506f1d07SSam Ravnborg processor access to memory ranges. This is most useful if you have 1666506f1d07SSam Ravnborg a video (VGA) card on a PCI or AGP bus. Enabling write-combining 1667506f1d07SSam Ravnborg allows bus write transfers to be combined into a larger transfer 1668506f1d07SSam Ravnborg before bursting over the PCI/AGP bus. This can increase performance 1669506f1d07SSam Ravnborg of image write operations 2.5 times or more. Saying Y here creates a 1670506f1d07SSam Ravnborg /proc/mtrr file which may be used to manipulate your processor's 1671506f1d07SSam Ravnborg MTRRs. Typically the X server should use this. 1672506f1d07SSam Ravnborg 1673506f1d07SSam Ravnborg This code has a reasonably generic interface so that similar 1674506f1d07SSam Ravnborg control registers on other processors can be easily supported 1675506f1d07SSam Ravnborg as well: 1676506f1d07SSam Ravnborg 1677506f1d07SSam Ravnborg The Cyrix 6x86, 6x86MX and M II processors have Address Range 1678506f1d07SSam Ravnborg Registers (ARRs) which provide a similar functionality to MTRRs. For 1679506f1d07SSam Ravnborg these, the ARRs are used to emulate the MTRRs. 1680506f1d07SSam Ravnborg The AMD K6-2 (stepping 8 and above) and K6-3 processors have two 1681506f1d07SSam Ravnborg MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing 1682506f1d07SSam Ravnborg write-combining. All of these processors are supported by this code 1683506f1d07SSam Ravnborg and it makes sense to say Y here if you have one of them. 1684506f1d07SSam Ravnborg 1685506f1d07SSam Ravnborg Saying Y here also fixes a problem with buggy SMP BIOSes which only 1686506f1d07SSam Ravnborg set the MTRRs for the boot CPU and not for the secondary CPUs. This 1687506f1d07SSam Ravnborg can lead to all sorts of problems, so it's good to say Y here. 1688506f1d07SSam Ravnborg 1689506f1d07SSam Ravnborg You can safely say Y even if your machine doesn't have MTRRs, you'll 1690506f1d07SSam Ravnborg just add about 9 KB to your kernel. 1691506f1d07SSam Ravnborg 1692ff61f079SJonathan Corbet See <file:Documentation/arch/x86/mtrr.rst> for more information. 1693506f1d07SSam Ravnborg 169495ffa243SYinghai Luconfig MTRR_SANITIZER 16952ffb3501SYinghai Lu def_bool y 169695ffa243SYinghai Lu prompt "MTRR cleanup support" 169795ffa243SYinghai Lu depends on MTRR 1698a7f7f624SMasahiro Yamada help 1699aba3728cSThomas Gleixner Convert MTRR layout from continuous to discrete, so X drivers can 1700aba3728cSThomas Gleixner add writeback entries. 170195ffa243SYinghai Lu 1702aba3728cSThomas Gleixner Can be disabled with disable_mtrr_cleanup on the kernel command line. 1703692105b8SMatt LaPlante The largest mtrr entry size for a continuous block can be set with 1704aba3728cSThomas Gleixner mtrr_chunk_size. 170595ffa243SYinghai Lu 17062ffb3501SYinghai Lu If unsure, say Y. 170795ffa243SYinghai Lu 170895ffa243SYinghai Luconfig MTRR_SANITIZER_ENABLE_DEFAULT 1709f5098d62SYinghai Lu int "MTRR cleanup enable value (0-1)" 1710f5098d62SYinghai Lu range 0 1 1711f5098d62SYinghai Lu default "0" 171295ffa243SYinghai Lu depends on MTRR_SANITIZER 1713a7f7f624SMasahiro Yamada help 1714f5098d62SYinghai Lu Enable mtrr cleanup default value 171595ffa243SYinghai Lu 171612031a62SYinghai Luconfig MTRR_SANITIZER_SPARE_REG_NR_DEFAULT 171712031a62SYinghai Lu int "MTRR cleanup spare reg num (0-7)" 171812031a62SYinghai Lu range 0 7 171912031a62SYinghai Lu default "1" 172012031a62SYinghai Lu depends on MTRR_SANITIZER 1721a7f7f624SMasahiro Yamada help 172212031a62SYinghai Lu mtrr cleanup spare entries default, it can be changed via 1723aba3728cSThomas Gleixner mtrr_spare_reg_nr=N on the kernel command line. 172412031a62SYinghai Lu 17252e5d9c85Svenkatesh.pallipadi@intel.comconfig X86_PAT 17266fc108a0SJan Beulich def_bool y 17276a108a14SDavid Rientjes prompt "x86 PAT support" if EXPERT 17282a8a2719SIngo Molnar depends on MTRR 17297a87225aSMatthew Wilcox (Oracle) select ARCH_USES_PG_ARCH_2 1730a7f7f624SMasahiro Yamada help 17312e5d9c85Svenkatesh.pallipadi@intel.com Use PAT attributes to setup page level cache control. 1732042b78e4SVenki Pallipadi 17332e5d9c85Svenkatesh.pallipadi@intel.com PATs are the modern equivalents of MTRRs and are much more 17342e5d9c85Svenkatesh.pallipadi@intel.com flexible than MTRRs. 17352e5d9c85Svenkatesh.pallipadi@intel.com 17362e5d9c85Svenkatesh.pallipadi@intel.com Say N here if you see bootup problems (boot crash, boot hang, 1737042b78e4SVenki Pallipadi spontaneous reboots) or a non-working video driver. 17382e5d9c85Svenkatesh.pallipadi@intel.com 17392e5d9c85Svenkatesh.pallipadi@intel.com If unsure, say Y. 17402e5d9c85Svenkatesh.pallipadi@intel.com 1741b971880fSBabu Mogerconfig X86_UMIP 1742796ebc81SRicardo Neri def_bool y 1743b971880fSBabu Moger prompt "User Mode Instruction Prevention" if EXPERT 1744a7f7f624SMasahiro Yamada help 1745b971880fSBabu Moger User Mode Instruction Prevention (UMIP) is a security feature in 1746b971880fSBabu Moger some x86 processors. If enabled, a general protection fault is 1747b971880fSBabu Moger issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are 1748b971880fSBabu Moger executed in user mode. These instructions unnecessarily expose 1749b971880fSBabu Moger information about the hardware state. 1750796ebc81SRicardo Neri 1751796ebc81SRicardo Neri The vast majority of applications do not use these instructions. 1752796ebc81SRicardo Neri For the very few that do, software emulation is provided in 1753796ebc81SRicardo Neri specific cases in protected and virtual-8086 modes. Emulated 1754796ebc81SRicardo Neri results are dummy. 1755aa35f896SRicardo Neri 1756156ff4a5SPeter Zijlstraconfig CC_HAS_IBT 1757156ff4a5SPeter Zijlstra # GCC >= 9 and binutils >= 2.29 1758156ff4a5SPeter Zijlstra # Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654 1759156ff4a5SPeter Zijlstra # Clang/LLVM >= 14 1760262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f 1761262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332 1762156ff4a5SPeter Zijlstra def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \ 1763262448f3SNathan Chancellor (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \ 1764156ff4a5SPeter Zijlstra $(as-instr,endbr64) 1765156ff4a5SPeter Zijlstra 176618e66b69SRick Edgecombeconfig X86_CET 176718e66b69SRick Edgecombe def_bool n 176818e66b69SRick Edgecombe help 176918e66b69SRick Edgecombe CET features configured (Shadow stack or IBT) 177018e66b69SRick Edgecombe 1771156ff4a5SPeter Zijlstraconfig X86_KERNEL_IBT 1772156ff4a5SPeter Zijlstra prompt "Indirect Branch Tracking" 17734fd5f70cSKees Cook def_bool y 177403f16cd0SJosh Poimboeuf depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL 1775f6a2c2b2SNathan Chancellor # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f 1776f6a2c2b2SNathan Chancellor depends on !LD_IS_LLD || LLD_VERSION >= 140000 177703f16cd0SJosh Poimboeuf select OBJTOOL 177818e66b69SRick Edgecombe select X86_CET 1779156ff4a5SPeter Zijlstra help 1780156ff4a5SPeter Zijlstra Build the kernel with support for Indirect Branch Tracking, a 1781156ff4a5SPeter Zijlstra hardware support course-grain forward-edge Control Flow Integrity 1782156ff4a5SPeter Zijlstra protection. It enforces that all indirect calls must land on 1783156ff4a5SPeter Zijlstra an ENDBR instruction, as such, the compiler will instrument the 1784156ff4a5SPeter Zijlstra code with them to make this happen. 1785156ff4a5SPeter Zijlstra 1786ed53a0d9SPeter Zijlstra In addition to building the kernel with IBT, seal all functions that 17874cdfc11bSNur Hussein are not indirect call targets, avoiding them ever becoming one. 1788ed53a0d9SPeter Zijlstra 1789ed53a0d9SPeter Zijlstra This requires LTO like objtool runs and will slow down the build. It 1790ed53a0d9SPeter Zijlstra does significantly reduce the number of ENDBR instructions in the 1791ed53a0d9SPeter Zijlstra kernel image. 1792ed53a0d9SPeter Zijlstra 179335e97790SDave Hansenconfig X86_INTEL_MEMORY_PROTECTION_KEYS 179438f3e775SBabu Moger prompt "Memory Protection Keys" 179535e97790SDave Hansen def_bool y 1796284244a9SDave Hansen # Note: only available in 64-bit mode 179738f3e775SBabu Moger depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD) 179852c8e601SIngo Molnar select ARCH_USES_HIGH_VMA_FLAGS 179952c8e601SIngo Molnar select ARCH_HAS_PKEYS 1800a7f7f624SMasahiro Yamada help 1801284244a9SDave Hansen Memory Protection Keys provides a mechanism for enforcing 1802284244a9SDave Hansen page-based protections, but without requiring modification of the 1803284244a9SDave Hansen page tables when an application changes protection domains. 1804284244a9SDave Hansen 18051eecbcdcSMauro Carvalho Chehab For details, see Documentation/core-api/protection-keys.rst 1806284244a9SDave Hansen 1807284244a9SDave Hansen If unsure, say y. 180835e97790SDave Hansen 18095626f8d4SJoey Goulyconfig ARCH_PKEY_BITS 18105626f8d4SJoey Gouly int 18115626f8d4SJoey Gouly default 4 18125626f8d4SJoey Gouly 1813db616173SMichal Hockochoice 1814db616173SMichal Hocko prompt "TSX enable mode" 1815db616173SMichal Hocko depends on CPU_SUP_INTEL 1816db616173SMichal Hocko default X86_INTEL_TSX_MODE_OFF 1817db616173SMichal Hocko help 1818db616173SMichal Hocko Intel's TSX (Transactional Synchronization Extensions) feature 1819db616173SMichal Hocko allows to optimize locking protocols through lock elision which 1820db616173SMichal Hocko can lead to a noticeable performance boost. 1821db616173SMichal Hocko 1822db616173SMichal Hocko On the other hand it has been shown that TSX can be exploited 1823db616173SMichal Hocko to form side channel attacks (e.g. TAA) and chances are there 1824db616173SMichal Hocko will be more of those attacks discovered in the future. 1825db616173SMichal Hocko 1826db616173SMichal Hocko Therefore TSX is not enabled by default (aka tsx=off). An admin 1827db616173SMichal Hocko might override this decision by tsx=on the command line parameter. 1828db616173SMichal Hocko Even with TSX enabled, the kernel will attempt to enable the best 1829db616173SMichal Hocko possible TAA mitigation setting depending on the microcode available 1830db616173SMichal Hocko for the particular machine. 1831db616173SMichal Hocko 1832db616173SMichal Hocko This option allows to set the default tsx mode between tsx=on, =off 1833db616173SMichal Hocko and =auto. See Documentation/admin-guide/kernel-parameters.txt for more 1834db616173SMichal Hocko details. 1835db616173SMichal Hocko 1836db616173SMichal Hocko Say off if not sure, auto if TSX is in use but it should be used on safe 1837db616173SMichal Hocko platforms or on if TSX is in use and the security aspect of tsx is not 1838db616173SMichal Hocko relevant. 1839db616173SMichal Hocko 1840db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_OFF 1841db616173SMichal Hocko bool "off" 1842db616173SMichal Hocko help 1843db616173SMichal Hocko TSX is disabled if possible - equals to tsx=off command line parameter. 1844db616173SMichal Hocko 1845db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_ON 1846db616173SMichal Hocko bool "on" 1847db616173SMichal Hocko help 1848db616173SMichal Hocko TSX is always enabled on TSX capable HW - equals the tsx=on command 1849db616173SMichal Hocko line parameter. 1850db616173SMichal Hocko 1851db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_AUTO 1852db616173SMichal Hocko bool "auto" 1853db616173SMichal Hocko help 1854db616173SMichal Hocko TSX is enabled on TSX capable HW that is believed to be safe against 1855db616173SMichal Hocko side channel attacks- equals the tsx=auto command line parameter. 1856db616173SMichal Hockoendchoice 1857db616173SMichal Hocko 1858e7e05452SSean Christophersonconfig X86_SGX 1859e7e05452SSean Christopherson bool "Software Guard eXtensions (SGX)" 1860b8d1d163SDaniel Sneddon depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC 1861e59236b5SEric Biggers select CRYPTO_LIB_SHA256 1862e7e05452SSean Christopherson select MMU_NOTIFIER 1863901ddbb9SJarkko Sakkinen select NUMA_KEEP_MEMINFO if NUMA 186440e0e784STony Luck select XARRAY_MULTI 1865e7e05452SSean Christopherson help 1866e7e05452SSean Christopherson Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions 1867e7e05452SSean Christopherson that can be used by applications to set aside private regions of code 1868e7e05452SSean Christopherson and data, referred to as enclaves. An enclave's private memory can 1869e7e05452SSean Christopherson only be accessed by code running within the enclave. Accesses from 1870e7e05452SSean Christopherson outside the enclave, including other enclaves, are disallowed by 1871e7e05452SSean Christopherson hardware. 1872e7e05452SSean Christopherson 1873e7e05452SSean Christopherson If unsure, say N. 1874e7e05452SSean Christopherson 187518e66b69SRick Edgecombeconfig X86_USER_SHADOW_STACK 187618e66b69SRick Edgecombe bool "X86 userspace shadow stack" 187718e66b69SRick Edgecombe depends on AS_WRUSS 187818e66b69SRick Edgecombe depends on X86_64 187918e66b69SRick Edgecombe select ARCH_USES_HIGH_VMA_FLAGS 1880bcc9d04eSMark Brown select ARCH_HAS_USER_SHADOW_STACK 188118e66b69SRick Edgecombe select X86_CET 188218e66b69SRick Edgecombe help 188318e66b69SRick Edgecombe Shadow stack protection is a hardware feature that detects function 188418e66b69SRick Edgecombe return address corruption. This helps mitigate ROP attacks. 188518e66b69SRick Edgecombe Applications must be enabled to use it, and old userspace does not 188618e66b69SRick Edgecombe get protection "for free". 188718e66b69SRick Edgecombe 188818e66b69SRick Edgecombe CPUs supporting shadow stacks were first released in 2020. 188918e66b69SRick Edgecombe 189054acee60SDave Hansen See Documentation/arch/x86/shstk.rst for more information. 189118e66b69SRick Edgecombe 189218e66b69SRick Edgecombe If unsure, say N. 189318e66b69SRick Edgecombe 1894c33621b4SKai Huangconfig INTEL_TDX_HOST 1895c33621b4SKai Huang bool "Intel Trust Domain Extensions (TDX) host support" 1896c33621b4SKai Huang depends on CPU_SUP_INTEL 1897c33621b4SKai Huang depends on X86_64 1898c33621b4SKai Huang depends on KVM_INTEL 18993115cabdSKai Huang depends on X86_X2APIC 1900abe8dbabSKai Huang select ARCH_KEEP_MEMBLOCK 1901ac3a2208SKai Huang depends on CONTIG_ALLOC 1902cb8eb06dSDave Hansen depends on !KEXEC_CORE 190383e1bdc9SKai Huang depends on X86_MCE 1904c33621b4SKai Huang help 1905c33621b4SKai Huang Intel Trust Domain Extensions (TDX) protects guest VMs from malicious 1906c33621b4SKai Huang host and certain physical attacks. This option enables necessary TDX 1907c33621b4SKai Huang support in the host kernel to run confidential VMs. 1908c33621b4SKai Huang 1909c33621b4SKai Huang If unsure, say N. 1910c33621b4SKai Huang 1911506f1d07SSam Ravnborgconfig EFI 19129ba16087SJan Beulich bool "EFI runtime service support" 19135b83683fSHuang, Ying depends on ACPI 1914f6ce5002SSergey Vlasov select UCS2_STRING 1915022ee6c5SArd Biesheuvel select EFI_RUNTIME_WRAPPERS 19161ff2fc02STom Lendacky select ARCH_USE_MEMREMAP_PROT 1917aba7e066SArd Biesheuvel select EFI_RUNTIME_MAP if KEXEC_CORE 1918a7f7f624SMasahiro Yamada help 19198b2cb7a8SHuang, Ying This enables the kernel to use EFI runtime services that are 1920506f1d07SSam Ravnborg available (such as the EFI variable services). 1921506f1d07SSam Ravnborg 19228b2cb7a8SHuang, Ying This option is only useful on systems that have EFI firmware. 19238b2cb7a8SHuang, Ying In addition, you should use the latest ELILO loader available 19248b2cb7a8SHuang, Ying at <http://elilo.sourceforge.net> in order to take advantage 19258b2cb7a8SHuang, Ying of EFI runtime services. However, even with this option, the 19268b2cb7a8SHuang, Ying resultant kernel should continue to boot on existing non-EFI 19278b2cb7a8SHuang, Ying platforms. 1928506f1d07SSam Ravnborg 1929291f3632SMatt Flemingconfig EFI_STUB 1930291f3632SMatt Fleming bool "EFI stub support" 1931c6dbd3e5SPeter Zijlstra depends on EFI 19327b2a583aSMatt Fleming select RELOCATABLE 1933a7f7f624SMasahiro Yamada help 1934291f3632SMatt Fleming This kernel feature allows a bzImage to be loaded directly 1935291f3632SMatt Fleming by EFI firmware without the use of a bootloader. 1936291f3632SMatt Fleming 19374f4cfa6cSMauro Carvalho Chehab See Documentation/admin-guide/efi-stub.rst for more information. 19380c759662SMatt Fleming 1939cc3fdda2SArd Biesheuvelconfig EFI_HANDOVER_PROTOCOL 1940cc3fdda2SArd Biesheuvel bool "EFI handover protocol (DEPRECATED)" 1941cc3fdda2SArd Biesheuvel depends on EFI_STUB 1942cc3fdda2SArd Biesheuvel default y 1943cc3fdda2SArd Biesheuvel help 1944cc3fdda2SArd Biesheuvel Select this in order to include support for the deprecated EFI 1945cc3fdda2SArd Biesheuvel handover protocol, which defines alternative entry points into the 1946cc3fdda2SArd Biesheuvel EFI stub. This is a practice that has no basis in the UEFI 1947cc3fdda2SArd Biesheuvel specification, and requires a priori knowledge on the part of the 1948cc3fdda2SArd Biesheuvel bootloader about Linux/x86 specific ways of passing the command line 1949cc3fdda2SArd Biesheuvel and initrd, and where in memory those assets may be loaded. 1950cc3fdda2SArd Biesheuvel 1951cc3fdda2SArd Biesheuvel If in doubt, say Y. Even though the corresponding support is not 1952cc3fdda2SArd Biesheuvel present in upstream GRUB or other bootloaders, most distros build 1953cc3fdda2SArd Biesheuvel GRUB with numerous downstream patches applied, and may rely on the 1954cc3fdda2SArd Biesheuvel handover protocol as as result. 1955cc3fdda2SArd Biesheuvel 19567d453eeeSMatt Flemingconfig EFI_MIXED 19577d453eeeSMatt Fleming bool "EFI mixed-mode support" 19587d453eeeSMatt Fleming depends on EFI_STUB && X86_64 1959a7f7f624SMasahiro Yamada help 19607d453eeeSMatt Fleming Enabling this feature allows a 64-bit kernel to be booted 19617d453eeeSMatt Fleming on a 32-bit firmware, provided that your CPU supports 64-bit 19627d453eeeSMatt Fleming mode. 19637d453eeeSMatt Fleming 19647d453eeeSMatt Fleming Note that it is not possible to boot a mixed-mode enabled 19657d453eeeSMatt Fleming kernel via the EFI boot stub - a bootloader that supports 19667d453eeeSMatt Fleming the EFI handover protocol must be used. 19677d453eeeSMatt Fleming 19687d453eeeSMatt Fleming If unsure, say N. 19697d453eeeSMatt Fleming 19701fff234dSArd Biesheuvelconfig EFI_RUNTIME_MAP 19711fff234dSArd Biesheuvel bool "Export EFI runtime maps to sysfs" if EXPERT 19721fff234dSArd Biesheuvel depends on EFI 19731fff234dSArd Biesheuvel help 19741fff234dSArd Biesheuvel Export EFI runtime memory regions to /sys/firmware/efi/runtime-map. 19751fff234dSArd Biesheuvel That memory map is required by the 2nd kernel to set up EFI virtual 19761fff234dSArd Biesheuvel mappings after kexec, but can also be used for debugging purposes. 19771fff234dSArd Biesheuvel 19781fff234dSArd Biesheuvel See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map. 19791fff234dSArd Biesheuvel 19808636a1f9SMasahiro Yamadasource "kernel/Kconfig.hz" 1981506f1d07SSam Ravnborg 19826af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC 19836af51380SEric DeVolder def_bool y 1984506f1d07SSam Ravnborg 19856af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_FILE 1986c1ad12eeSArnd Bergmann def_bool X86_64 1987506f1d07SSam Ravnborg 19886af51380SEric DeVolderconfig ARCH_SELECTS_KEXEC_FILE 19896af51380SEric DeVolder def_bool y 19906af51380SEric DeVolder depends on KEXEC_FILE 1991b69a2afdSJonathan McDowell select HAVE_IMA_KEXEC if IMA 199274ca317cSVivek Goyal 1993e6265fe7SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_PURGATORY 1994c1ad12eeSArnd Bergmann def_bool y 1995b799a09fSAKASHI Takahiro 19966af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG 19976af51380SEric DeVolder def_bool y 199899d5cadfSJiri Bohac 19996af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG_FORCE 20006af51380SEric DeVolder def_bool y 200199d5cadfSJiri Bohac 20026af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG 20036af51380SEric DeVolder def_bool y 200499d5cadfSJiri Bohac 20056af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_JUMP 20066af51380SEric DeVolder def_bool y 20078e7d8381SVivek Goyal 20082b082d6fSAlexander Grafconfig ARCH_SUPPORTS_KEXEC_HANDOVER 20092b082d6fSAlexander Graf def_bool X86_64 20102b082d6fSAlexander Graf 20116af51380SEric DeVolderconfig ARCH_SUPPORTS_CRASH_DUMP 20126af51380SEric DeVolder def_bool X86_64 || (X86_32 && HIGHMEM) 20138e7d8381SVivek Goyal 201431daa343SDave Vasilevskyconfig ARCH_DEFAULT_CRASH_DUMP 201531daa343SDave Vasilevsky def_bool y 201631daa343SDave Vasilevsky 2017ea53ad9cSEric DeVolderconfig ARCH_SUPPORTS_CRASH_HOTPLUG 2018ea53ad9cSEric DeVolder def_bool y 20193ab83521SHuang Ying 20209c08a2a1SBaoquan Heconfig ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 202185fcde40SBaoquan He def_bool CRASH_RESERVE 20229c08a2a1SBaoquan He 2023506f1d07SSam Ravnborgconfig PHYSICAL_START 20246a108a14SDavid Rientjes hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 2025ceefccc9SH. Peter Anvin default "0x1000000" 2026a7f7f624SMasahiro Yamada help 2027506f1d07SSam Ravnborg This gives the physical address where the kernel is loaded. 2028506f1d07SSam Ravnborg 202943b1d3e6SChris Koch If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage 203043b1d3e6SChris Koch will decompress itself to above physical address and run from there. 203143b1d3e6SChris Koch Otherwise, bzImage will run from the address where it has been loaded 203243b1d3e6SChris Koch by the boot loader. The only exception is if it is loaded below the 203343b1d3e6SChris Koch above physical address, in which case it will relocate itself there. 2034506f1d07SSam Ravnborg 2035506f1d07SSam Ravnborg In normal kdump cases one does not have to set/change this option 2036506f1d07SSam Ravnborg as now bzImage can be compiled as a completely relocatable image 2037506f1d07SSam Ravnborg (CONFIG_RELOCATABLE=y) and be used to load and run from a different 2038506f1d07SSam Ravnborg address. This option is mainly useful for the folks who don't want 2039506f1d07SSam Ravnborg to use a bzImage for capturing the crash dump and want to use a 2040506f1d07SSam Ravnborg vmlinux instead. vmlinux is not relocatable hence a kernel needs 2041506f1d07SSam Ravnborg to be specifically compiled to run from a specific memory area 2042506f1d07SSam Ravnborg (normally a reserved region) and this option comes handy. 2043506f1d07SSam Ravnborg 2044ceefccc9SH. Peter Anvin So if you are using bzImage for capturing the crash dump, 2045ceefccc9SH. Peter Anvin leave the value here unchanged to 0x1000000 and set 2046ceefccc9SH. Peter Anvin CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux 2047ceefccc9SH. Peter Anvin for capturing the crash dump change this value to start of 2048ceefccc9SH. Peter Anvin the reserved region. In other words, it can be set based on 2049ceefccc9SH. Peter Anvin the "X" value as specified in the "crashkernel=YM@XM" 2050ceefccc9SH. Peter Anvin command line boot parameter passed to the panic-ed 2051330d4810SMauro Carvalho Chehab kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst 2052ceefccc9SH. Peter Anvin for more details about crash dumps. 2053506f1d07SSam Ravnborg 2054506f1d07SSam Ravnborg Usage of bzImage for capturing the crash dump is recommended as 2055506f1d07SSam Ravnborg one does not have to build two kernels. Same kernel can be used 2056506f1d07SSam Ravnborg as production kernel and capture kernel. Above option should have 2057506f1d07SSam Ravnborg gone away after relocatable bzImage support is introduced. But it 2058506f1d07SSam Ravnborg is present because there are users out there who continue to use 2059506f1d07SSam Ravnborg vmlinux for dump capture. This option should go away down the 2060506f1d07SSam Ravnborg line. 2061506f1d07SSam Ravnborg 2062506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2063506f1d07SSam Ravnborg 2064506f1d07SSam Ravnborgconfig RELOCATABLE 206526717808SH. Peter Anvin bool "Build a relocatable kernel" 206626717808SH. Peter Anvin default y 2067a7f7f624SMasahiro Yamada help 2068506f1d07SSam Ravnborg This builds a kernel image that retains relocation information 2069506f1d07SSam Ravnborg so it can be loaded someplace besides the default 1MB. 2070506f1d07SSam Ravnborg The relocations tend to make the kernel binary about 10% larger, 2071506f1d07SSam Ravnborg but are discarded at runtime. 2072506f1d07SSam Ravnborg 2073506f1d07SSam Ravnborg One use is for the kexec on panic case where the recovery kernel 2074506f1d07SSam Ravnborg must live at a different physical address than the primary 2075506f1d07SSam Ravnborg kernel. 2076506f1d07SSam Ravnborg 2077506f1d07SSam Ravnborg Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address 2078506f1d07SSam Ravnborg it has been loaded at and the compile time physical address 20798ab3820fSKees Cook (CONFIG_PHYSICAL_START) is used as the minimum location. 2080506f1d07SSam Ravnborg 20818ab3820fSKees Cookconfig RANDOMIZE_BASE 2082e8581e3dSBaoquan He bool "Randomize the address of the kernel image (KASLR)" 20838ab3820fSKees Cook depends on RELOCATABLE 20846807c846SIngo Molnar default y 2085a7f7f624SMasahiro Yamada help 2086e8581e3dSBaoquan He In support of Kernel Address Space Layout Randomization (KASLR), 2087e8581e3dSBaoquan He this randomizes the physical address at which the kernel image 2088e8581e3dSBaoquan He is decompressed and the virtual address where the kernel 2089e8581e3dSBaoquan He image is mapped, as a security feature that deters exploit 2090e8581e3dSBaoquan He attempts relying on knowledge of the location of kernel 2091e8581e3dSBaoquan He code internals. 2092e8581e3dSBaoquan He 2093ed9f007eSKees Cook On 64-bit, the kernel physical and virtual addresses are 2094ed9f007eSKees Cook randomized separately. The physical address will be anywhere 2095ed9f007eSKees Cook between 16MB and the top of physical memory (up to 64TB). The 2096ed9f007eSKees Cook virtual address will be randomized from 16MB up to 1GB (9 bits 2097ed9f007eSKees Cook of entropy). Note that this also reduces the memory space 2098ed9f007eSKees Cook available to kernel modules from 1.5GB to 1GB. 2099ed9f007eSKees Cook 2100ed9f007eSKees Cook On 32-bit, the kernel physical and virtual addresses are 2101ed9f007eSKees Cook randomized together. They will be randomized from 16MB up to 2102ed9f007eSKees Cook 512MB (8 bits of entropy). 21038ab3820fSKees Cook 2104a653f356SKees Cook Entropy is generated using the RDRAND instruction if it is 2105e8581e3dSBaoquan He supported. If RDTSC is supported, its value is mixed into 2106e8581e3dSBaoquan He the entropy pool as well. If neither RDRAND nor RDTSC are 2107ed9f007eSKees Cook supported, then entropy is read from the i8254 timer. The 2108ed9f007eSKees Cook usable entropy is limited by the kernel being built using 2109ed9f007eSKees Cook 2GB addressing, and that PHYSICAL_ALIGN must be at a 2110ed9f007eSKees Cook minimum of 2MB. As a result, only 10 bits of entropy are 2111ed9f007eSKees Cook theoretically possible, but the implementations are further 2112ed9f007eSKees Cook limited due to memory layouts. 2113e8581e3dSBaoquan He 21146807c846SIngo Molnar If unsure, say Y. 2115da2b6fb9SKees Cook 21168ab3820fSKees Cook# Relocation on x86 needs some additional build support 2117845adf72SH. Peter Anvinconfig X86_NEED_RELOCS 2118845adf72SH. Peter Anvin def_bool y 21198ab3820fSKees Cook depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE) 21209b400d17SArd Biesheuvel select ARCH_VMLINUX_NEEDS_RELOCS 2121845adf72SH. Peter Anvin 2122506f1d07SSam Ravnborgconfig PHYSICAL_ALIGN 2123a0215061SKees Cook hex "Alignment value to which kernel should be aligned" 21248ab3820fSKees Cook default "0x200000" 2125a0215061SKees Cook range 0x2000 0x1000000 if X86_32 2126a0215061SKees Cook range 0x200000 0x1000000 if X86_64 2127a7f7f624SMasahiro Yamada help 2128506f1d07SSam Ravnborg This value puts the alignment restrictions on physical address 2129506f1d07SSam Ravnborg where kernel is loaded and run from. Kernel is compiled for an 2130506f1d07SSam Ravnborg address which meets above alignment restriction. 2131506f1d07SSam Ravnborg 2132506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2133506f1d07SSam Ravnborg CONFIG_RELOCATABLE is set, kernel will move itself to nearest 2134506f1d07SSam Ravnborg address aligned to above value and run from there. 2135506f1d07SSam Ravnborg 2136506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2137506f1d07SSam Ravnborg CONFIG_RELOCATABLE is not set, kernel will ignore the run time 2138506f1d07SSam Ravnborg load address and decompress itself to the address it has been 2139506f1d07SSam Ravnborg compiled for and run from there. The address for which kernel is 2140506f1d07SSam Ravnborg compiled already meets above alignment restrictions. Hence the 2141506f1d07SSam Ravnborg end result is that kernel runs from a physical address meeting 2142506f1d07SSam Ravnborg above alignment restrictions. 2143506f1d07SSam Ravnborg 2144a0215061SKees Cook On 32-bit this value must be a multiple of 0x2000. On 64-bit 2145a0215061SKees Cook this value must be a multiple of 0x200000. 2146a0215061SKees Cook 2147506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2148506f1d07SSam Ravnborg 21490483e1faSThomas Garnierconfig RANDOMIZE_MEMORY 21500483e1faSThomas Garnier bool "Randomize the kernel memory sections" 21510483e1faSThomas Garnier depends on X86_64 21520483e1faSThomas Garnier depends on RANDOMIZE_BASE 21530483e1faSThomas Garnier default RANDOMIZE_BASE 2154a7f7f624SMasahiro Yamada help 21550483e1faSThomas Garnier Randomizes the base virtual address of kernel memory sections 21560483e1faSThomas Garnier (physical memory mapping, vmalloc & vmemmap). This security feature 21570483e1faSThomas Garnier makes exploits relying on predictable memory locations less reliable. 21580483e1faSThomas Garnier 21590483e1faSThomas Garnier The order of allocations remains unchanged. Entropy is generated in 21600483e1faSThomas Garnier the same way as RANDOMIZE_BASE. Current implementation in the optimal 21610483e1faSThomas Garnier configuration have in average 30,000 different possible virtual 21620483e1faSThomas Garnier addresses for each memory section. 21630483e1faSThomas Garnier 21646807c846SIngo Molnar If unsure, say Y. 21650483e1faSThomas Garnier 216690397a41SThomas Garnierconfig RANDOMIZE_MEMORY_PHYSICAL_PADDING 216790397a41SThomas Garnier hex "Physical memory mapping padding" if EXPERT 216890397a41SThomas Garnier depends on RANDOMIZE_MEMORY 216990397a41SThomas Garnier default "0xa" if MEMORY_HOTPLUG 217090397a41SThomas Garnier default "0x0" 217190397a41SThomas Garnier range 0x1 0x40 if MEMORY_HOTPLUG 217290397a41SThomas Garnier range 0x0 0x40 2173a7f7f624SMasahiro Yamada help 217490397a41SThomas Garnier Define the padding in terabytes added to the existing physical 217590397a41SThomas Garnier memory size during kernel memory randomization. It is useful 217690397a41SThomas Garnier for memory hotplug support but reduces the entropy available for 217790397a41SThomas Garnier address randomization. 217890397a41SThomas Garnier 217990397a41SThomas Garnier If unsure, leave at the default value. 218090397a41SThomas Garnier 21816449dcb0SKirill A. Shutemovconfig ADDRESS_MASKING 21826449dcb0SKirill A. Shutemov bool "Linear Address Masking support" 21836449dcb0SKirill A. Shutemov depends on X86_64 21843267cb6dSPawan Gupta depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS 21856449dcb0SKirill A. Shutemov help 21866449dcb0SKirill A. Shutemov Linear Address Masking (LAM) modifies the checking that is applied 21876449dcb0SKirill A. Shutemov to 64-bit linear addresses, allowing software to use of the 21886449dcb0SKirill A. Shutemov untranslated address bits for metadata. 21896449dcb0SKirill A. Shutemov 21906449dcb0SKirill A. Shutemov The capability can be used for efficient address sanitizers (ASAN) 21916449dcb0SKirill A. Shutemov implementation and for optimizations in JITs. 21926449dcb0SKirill A. Shutemov 2193506f1d07SSam Ravnborgconfig HOTPLUG_CPU 2194bebd024eSThomas Gleixner def_bool y 219540b31360SStephen Rothwell depends on SMP 2196506f1d07SSam Ravnborg 2197506f1d07SSam Ravnborgconfig COMPAT_VDSO 2198b0b49f26SAndy Lutomirski def_bool n 2199de711563SMateusz Jończyk prompt "Workaround for glibc 2.3.2 / 2.3.3 (released in year 2003/2004)" 2200953fee1dSIngo Molnar depends on COMPAT_32 2201a7f7f624SMasahiro Yamada help 2202b0b49f26SAndy Lutomirski Certain buggy versions of glibc will crash if they are 2203b0b49f26SAndy Lutomirski presented with a 32-bit vDSO that is not mapped at the address 2204b0b49f26SAndy Lutomirski indicated in its segment table. 2205e84446deSRandy Dunlap 2206b0b49f26SAndy Lutomirski The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a 2207b0b49f26SAndy Lutomirski and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and 2208b0b49f26SAndy Lutomirski 49ad572a70b8aeb91e57483a11dd1b77e31c4468. Glibc 2.3.3 is 2209b0b49f26SAndy Lutomirski the only released version with the bug, but OpenSUSE 9 2210b0b49f26SAndy Lutomirski contains a buggy "glibc 2.3.2". 2211506f1d07SSam Ravnborg 2212b0b49f26SAndy Lutomirski The symptom of the bug is that everything crashes on startup, saying: 2213b0b49f26SAndy Lutomirski dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed! 2214b0b49f26SAndy Lutomirski 2215b0b49f26SAndy Lutomirski Saying Y here changes the default value of the vdso32 boot 2216b0b49f26SAndy Lutomirski option from 1 to 0, which turns off the 32-bit vDSO entirely. 2217b0b49f26SAndy Lutomirski This works around the glibc bug but hurts performance. 2218b0b49f26SAndy Lutomirski 2219b0b49f26SAndy Lutomirski If unsure, say N: if you are compiling your own kernel, you 2220b0b49f26SAndy Lutomirski are unlikely to be using a buggy version of glibc. 2221506f1d07SSam Ravnborg 22223dc33bd3SKees Cookchoice 22233dc33bd3SKees Cook prompt "vsyscall table for legacy applications" 22243dc33bd3SKees Cook depends on X86_64 2225625b7b7fSAndy Lutomirski default LEGACY_VSYSCALL_XONLY 22263dc33bd3SKees Cook help 22273dc33bd3SKees Cook Legacy user code that does not know how to find the vDSO expects 22283dc33bd3SKees Cook to be able to issue three syscalls by calling fixed addresses in 22293dc33bd3SKees Cook kernel space. Since this location is not randomized with ASLR, 22303dc33bd3SKees Cook it can be used to assist security vulnerability exploitation. 22313dc33bd3SKees Cook 22323dc33bd3SKees Cook This setting can be changed at boot time via the kernel command 2233bf00745eSAndy Lutomirski line parameter vsyscall=[emulate|xonly|none]. Emulate mode 2234bf00745eSAndy Lutomirski is deprecated and can only be enabled using the kernel command 2235bf00745eSAndy Lutomirski line. 22363dc33bd3SKees Cook 22373dc33bd3SKees Cook On a system with recent enough glibc (2.14 or newer) and no 22383dc33bd3SKees Cook static binaries, you can say None without a performance penalty 22393dc33bd3SKees Cook to improve security. 22403dc33bd3SKees Cook 2241bd49e16eSAndy Lutomirski If unsure, select "Emulate execution only". 22423dc33bd3SKees Cook 2243bd49e16eSAndy Lutomirski config LEGACY_VSYSCALL_XONLY 2244bd49e16eSAndy Lutomirski bool "Emulate execution only" 2245bd49e16eSAndy Lutomirski help 2246bd49e16eSAndy Lutomirski The kernel traps and emulates calls into the fixed vsyscall 2247bd49e16eSAndy Lutomirski address mapping and does not allow reads. This 2248bd49e16eSAndy Lutomirski configuration is recommended when userspace might use the 2249bd49e16eSAndy Lutomirski legacy vsyscall area but support for legacy binary 2250bd49e16eSAndy Lutomirski instrumentation of legacy code is not needed. It mitigates 2251bd49e16eSAndy Lutomirski certain uses of the vsyscall area as an ASLR-bypassing 2252bd49e16eSAndy Lutomirski buffer. 22533dc33bd3SKees Cook 22543dc33bd3SKees Cook config LEGACY_VSYSCALL_NONE 22553dc33bd3SKees Cook bool "None" 22563dc33bd3SKees Cook help 22573dc33bd3SKees Cook There will be no vsyscall mapping at all. This will 22583dc33bd3SKees Cook eliminate any risk of ASLR bypass due to the vsyscall 22593dc33bd3SKees Cook fixed address mapping. Attempts to use the vsyscalls 22603dc33bd3SKees Cook will be reported to dmesg, so that either old or 22613dc33bd3SKees Cook malicious userspace programs can be identified. 22623dc33bd3SKees Cook 22633dc33bd3SKees Cookendchoice 22643dc33bd3SKees Cook 2265516cbf37STim Birdconfig CMDLINE_BOOL 2266516cbf37STim Bird bool "Built-in kernel command line" 2267a7f7f624SMasahiro Yamada help 2268516cbf37STim Bird Allow for specifying boot arguments to the kernel at 2269516cbf37STim Bird build time. On some systems (e.g. embedded ones), it is 2270516cbf37STim Bird necessary or convenient to provide some or all of the 2271516cbf37STim Bird kernel boot arguments with the kernel itself (that is, 2272516cbf37STim Bird to not rely on the boot loader to provide them.) 2273516cbf37STim Bird 2274516cbf37STim Bird To compile command line arguments into the kernel, 2275516cbf37STim Bird set this option to 'Y', then fill in the 227669711ca1SSébastien Hinderer boot arguments in CONFIG_CMDLINE. 2277516cbf37STim Bird 2278516cbf37STim Bird Systems with fully functional boot loaders (i.e. non-embedded) 2279516cbf37STim Bird should leave this option set to 'N'. 2280516cbf37STim Bird 2281516cbf37STim Birdconfig CMDLINE 2282516cbf37STim Bird string "Built-in kernel command string" 2283516cbf37STim Bird depends on CMDLINE_BOOL 2284516cbf37STim Bird default "" 2285a7f7f624SMasahiro Yamada help 2286516cbf37STim Bird Enter arguments here that should be compiled into the kernel 2287516cbf37STim Bird image and used at boot time. If the boot loader provides a 2288516cbf37STim Bird command line at boot time, it is appended to this string to 2289516cbf37STim Bird form the full kernel command line, when the system boots. 2290516cbf37STim Bird 2291516cbf37STim Bird However, you can use the CONFIG_CMDLINE_OVERRIDE option to 2292516cbf37STim Bird change this behavior. 2293516cbf37STim Bird 2294516cbf37STim Bird In most cases, the command line (whether built-in or provided 2295516cbf37STim Bird by the boot loader) should specify the device for the root 2296516cbf37STim Bird file system. 2297516cbf37STim Bird 2298516cbf37STim Birdconfig CMDLINE_OVERRIDE 2299516cbf37STim Bird bool "Built-in command line overrides boot loader arguments" 2300645e6466SAnders Roxell depends on CMDLINE_BOOL && CMDLINE != "" 2301a7f7f624SMasahiro Yamada help 2302516cbf37STim Bird Set this option to 'Y' to have the kernel ignore the boot loader 2303516cbf37STim Bird command line, and use ONLY the built-in command line. 2304516cbf37STim Bird 2305516cbf37STim Bird This is used to work around broken boot loaders. This should 2306516cbf37STim Bird be set to 'N' under normal conditions. 2307516cbf37STim Bird 2308a5b9e5a2SAndy Lutomirskiconfig MODIFY_LDT_SYSCALL 2309a5b9e5a2SAndy Lutomirski bool "Enable the LDT (local descriptor table)" if EXPERT 2310a5b9e5a2SAndy Lutomirski default y 2311a7f7f624SMasahiro Yamada help 2312a5b9e5a2SAndy Lutomirski Linux can allow user programs to install a per-process x86 2313a5b9e5a2SAndy Lutomirski Local Descriptor Table (LDT) using the modify_ldt(2) system 2314a5b9e5a2SAndy Lutomirski call. This is required to run 16-bit or segmented code such as 2315a5b9e5a2SAndy Lutomirski DOSEMU or some Wine programs. It is also used by some very old 2316a5b9e5a2SAndy Lutomirski threading libraries. 2317a5b9e5a2SAndy Lutomirski 2318a5b9e5a2SAndy Lutomirski Enabling this feature adds a small amount of overhead to 2319a5b9e5a2SAndy Lutomirski context switches and increases the low-level kernel attack 2320a5b9e5a2SAndy Lutomirski surface. Disabling it removes the modify_ldt(2) system call. 2321a5b9e5a2SAndy Lutomirski 2322a5b9e5a2SAndy Lutomirski Saying 'N' here may make sense for embedded or server kernels. 2323a5b9e5a2SAndy Lutomirski 23243aac3ebeSThomas Gleixnerconfig STRICT_SIGALTSTACK_SIZE 23253aac3ebeSThomas Gleixner bool "Enforce strict size checking for sigaltstack" 23263aac3ebeSThomas Gleixner depends on DYNAMIC_SIGFRAME 23273aac3ebeSThomas Gleixner help 23283aac3ebeSThomas Gleixner For historical reasons MINSIGSTKSZ is a constant which became 23293aac3ebeSThomas Gleixner already too small with AVX512 support. Add a mechanism to 23303aac3ebeSThomas Gleixner enforce strict checking of the sigaltstack size against the 23313aac3ebeSThomas Gleixner real size of the FPU frame. This option enables the check 23323aac3ebeSThomas Gleixner by default. It can also be controlled via the kernel command 23333aac3ebeSThomas Gleixner line option 'strict_sas_size' independent of this config 23343aac3ebeSThomas Gleixner switch. Enabling it might break existing applications which 23353aac3ebeSThomas Gleixner allocate a too small sigaltstack but 'work' because they 23363aac3ebeSThomas Gleixner never get a signal delivered. 23373aac3ebeSThomas Gleixner 23383aac3ebeSThomas Gleixner Say 'N' unless you want to really enforce this check. 23393aac3ebeSThomas Gleixner 2340d6f635bcSKees Cookconfig CFI_AUTO_DEFAULT 2341d6f635bcSKees Cook bool "Attempt to use FineIBT by default at boot time" 2342d6f635bcSKees Cook depends on FINEIBT 23435595c31cSPaweł Anikiel depends on !RUST || RUSTC_VERSION >= 108800 2344d6f635bcSKees Cook default y 2345d6f635bcSKees Cook help 2346d6f635bcSKees Cook Attempt to use FineIBT by default at boot time. If enabled, 2347d6f635bcSKees Cook this is the same as booting with "cfi=auto". If disabled, 2348d6f635bcSKees Cook this is the same as booting with "cfi=kcfi". 2349d6f635bcSKees Cook 2350b700e7f0SSeth Jenningssource "kernel/livepatch/Kconfig" 2351b700e7f0SSeth Jennings 2352350afa8aSRavi Bangoriaconfig X86_BUS_LOCK_DETECT 2353350afa8aSRavi Bangoria bool "Split Lock Detect and Bus Lock Detect support" 2354408eb741SRavi Bangoria depends on CPU_SUP_INTEL || CPU_SUP_AMD 2355350afa8aSRavi Bangoria default y 2356350afa8aSRavi Bangoria help 2357350afa8aSRavi Bangoria Enable Split Lock Detect and Bus Lock Detect functionalities. 2358350afa8aSRavi Bangoria See <file:Documentation/arch/x86/buslock.rst> for more information. 2359350afa8aSRavi Bangoria 2360506f1d07SSam Ravnborgendmenu 2361506f1d07SSam Ravnborg 23621ca3683cSUros Bizjakconfig CC_HAS_NAMED_AS 236347ff30ccSUros Bizjak def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null) 236447ff30ccSUros Bizjak depends on CC_IS_GCC 23651ca3683cSUros Bizjak 2366b6762467SUros Bizjak# 2367b6762467SUros Bizjak# -fsanitize=kernel-address (KASAN) and -fsanitize=thread (KCSAN) 2368b6762467SUros Bizjak# are incompatible with named address spaces with GCC < 13.3 2369b6762467SUros Bizjak# (see GCC PR sanitizer/111736 and also PR sanitizer/115172). 2370b6762467SUros Bizjak# 2371b6762467SUros Bizjak 23729ebe5500SUros Bizjakconfig CC_HAS_NAMED_AS_FIXED_SANITIZERS 2373b6762467SUros Bizjak def_bool y 2374b6762467SUros Bizjak depends on !(KASAN || KCSAN) || GCC_VERSION >= 130300 2375b6762467SUros Bizjak depends on !(UBSAN_BOOL && KASAN) || GCC_VERSION >= 140200 23761ca3683cSUros Bizjak 23771ca3683cSUros Bizjakconfig USE_X86_SEG_SUPPORT 2378b6762467SUros Bizjak def_bool CC_HAS_NAMED_AS 2379b6762467SUros Bizjak depends on CC_HAS_NAMED_AS_FIXED_SANITIZERS 23801ca3683cSUros Bizjak 2381f43b9876SPeter Zijlstraconfig CC_HAS_SLS 2382f43b9876SPeter Zijlstra def_bool $(cc-option,-mharden-sls=all) 2383f43b9876SPeter Zijlstra 2384f43b9876SPeter Zijlstraconfig CC_HAS_RETURN_THUNK 2385f43b9876SPeter Zijlstra def_bool $(cc-option,-mfunction-return=thunk-extern) 2386f43b9876SPeter Zijlstra 2387bea75b33SThomas Gleixnerconfig CC_HAS_ENTRY_PADDING 2388bea75b33SThomas Gleixner def_bool $(cc-option,-fpatchable-function-entry=16,16) 2389bea75b33SThomas Gleixner 23900c92385dSPeter Zijlstraconfig CC_HAS_KCFI_ARITY 23910c92385dSPeter Zijlstra def_bool $(cc-option,-fsanitize=kcfi -fsanitize-kcfi-arity) 23920c92385dSPeter Zijlstra depends on CC_IS_CLANG && !RUST 23930c92385dSPeter Zijlstra 2394bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_CFI 2395bea75b33SThomas Gleixner int 2396bea75b33SThomas Gleixner default 59 if FUNCTION_ALIGNMENT_64B 2397bea75b33SThomas Gleixner default 27 if FUNCTION_ALIGNMENT_32B 2398bea75b33SThomas Gleixner default 11 if FUNCTION_ALIGNMENT_16B 2399bea75b33SThomas Gleixner default 3 if FUNCTION_ALIGNMENT_8B 2400bea75b33SThomas Gleixner default 0 2401bea75b33SThomas Gleixner 2402bea75b33SThomas Gleixner# Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG 2403bea75b33SThomas Gleixner# except Kconfig can't do arithmetic :/ 2404bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_BYTES 2405bea75b33SThomas Gleixner int 2406bea75b33SThomas Gleixner default FUNCTION_PADDING_CFI if CFI_CLANG 2407bea75b33SThomas Gleixner default FUNCTION_ALIGNMENT 2408bea75b33SThomas Gleixner 2409931ab636SPeter Zijlstraconfig CALL_PADDING 2410931ab636SPeter Zijlstra def_bool n 2411931ab636SPeter Zijlstra depends on CC_HAS_ENTRY_PADDING && OBJTOOL 2412931ab636SPeter Zijlstra select FUNCTION_ALIGNMENT_16B 2413931ab636SPeter Zijlstra 2414931ab636SPeter Zijlstraconfig FINEIBT 2415931ab636SPeter Zijlstra def_bool y 2416aefb2f2eSBreno Leitao depends on X86_KERNEL_IBT && CFI_CLANG && MITIGATION_RETPOLINE 2417931ab636SPeter Zijlstra select CALL_PADDING 2418931ab636SPeter Zijlstra 24190c92385dSPeter Zijlstraconfig FINEIBT_BHI 24200c92385dSPeter Zijlstra def_bool y 24210c92385dSPeter Zijlstra depends on FINEIBT && CC_HAS_KCFI_ARITY 24220c92385dSPeter Zijlstra 24238f7c0d8bSThomas Gleixnerconfig HAVE_CALL_THUNKS 24248f7c0d8bSThomas Gleixner def_bool y 24250911b8c5SBreno Leitao depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL 24268f7c0d8bSThomas Gleixner 24278f7c0d8bSThomas Gleixnerconfig CALL_THUNKS 24288f7c0d8bSThomas Gleixner def_bool n 2429931ab636SPeter Zijlstra select CALL_PADDING 24308f7c0d8bSThomas Gleixner 2431b341b20dSPeter Zijlstraconfig PREFIX_SYMBOLS 2432b341b20dSPeter Zijlstra def_bool y 2433931ab636SPeter Zijlstra depends on CALL_PADDING && !CFI_CLANG 2434b341b20dSPeter Zijlstra 2435fe42754bSSean Christophersonmenuconfig CPU_MITIGATIONS 2436fe42754bSSean Christopherson bool "Mitigations for CPU vulnerabilities" 2437f43b9876SPeter Zijlstra default y 2438f43b9876SPeter Zijlstra help 2439fe42754bSSean Christopherson Say Y here to enable options which enable mitigations for hardware 2440fe42754bSSean Christopherson vulnerabilities (usually related to speculative execution). 2441ce0abef6SSean Christopherson Mitigations can be disabled or restricted to SMT systems at runtime 2442ce0abef6SSean Christopherson via the "mitigations" kernel parameter. 2443f43b9876SPeter Zijlstra 2444ce0abef6SSean Christopherson If you say N, all mitigations will be disabled. This CANNOT be 2445ce0abef6SSean Christopherson overridden at runtime. 2446ce0abef6SSean Christopherson 2447ce0abef6SSean Christopherson Say 'Y', unless you really know what you are doing. 2448f43b9876SPeter Zijlstra 2449fe42754bSSean Christophersonif CPU_MITIGATIONS 2450f43b9876SPeter Zijlstra 2451ea4654e0SBreno Leitaoconfig MITIGATION_PAGE_TABLE_ISOLATION 2452f43b9876SPeter Zijlstra bool "Remove the kernel mapping in user mode" 2453f43b9876SPeter Zijlstra default y 2454f43b9876SPeter Zijlstra depends on (X86_64 || X86_PAE) 2455f43b9876SPeter Zijlstra help 2456f43b9876SPeter Zijlstra This feature reduces the number of hardware side channels by 2457f43b9876SPeter Zijlstra ensuring that the majority of kernel addresses are not mapped 2458f43b9876SPeter Zijlstra into userspace. 2459f43b9876SPeter Zijlstra 2460ff61f079SJonathan Corbet See Documentation/arch/x86/pti.rst for more details. 2461f43b9876SPeter Zijlstra 2462aefb2f2eSBreno Leitaoconfig MITIGATION_RETPOLINE 2463f43b9876SPeter Zijlstra bool "Avoid speculative indirect branches in kernel" 2464f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2465f43b9876SPeter Zijlstra default y 2466f43b9876SPeter Zijlstra help 2467f43b9876SPeter Zijlstra Compile kernel with the retpoline compiler options to guard against 2468f43b9876SPeter Zijlstra kernel-to-user data leaks by avoiding speculative indirect 2469f43b9876SPeter Zijlstra branches. Requires a compiler with -mindirect-branch=thunk-extern 2470f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2471f43b9876SPeter Zijlstra 24720911b8c5SBreno Leitaoconfig MITIGATION_RETHUNK 2473f43b9876SPeter Zijlstra bool "Enable return-thunks" 2474aefb2f2eSBreno Leitao depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK 2475f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2476b648ab48SBen Hutchings default y if X86_64 2477f43b9876SPeter Zijlstra help 2478f43b9876SPeter Zijlstra Compile the kernel with the return-thunks compiler option to guard 2479f43b9876SPeter Zijlstra against kernel-to-user data leaks by avoiding return speculation. 2480f43b9876SPeter Zijlstra Requires a compiler with -mfunction-return=thunk-extern 2481f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2482f43b9876SPeter Zijlstra 2483ac61d439SBreno Leitaoconfig MITIGATION_UNRET_ENTRY 2484f43b9876SPeter Zijlstra bool "Enable UNRET on kernel entry" 24850911b8c5SBreno Leitao depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64 2486f43b9876SPeter Zijlstra default y 2487f43b9876SPeter Zijlstra help 2488f43b9876SPeter Zijlstra Compile the kernel with support for the retbleed=unret mitigation. 2489f43b9876SPeter Zijlstra 24905fa31af3SBreno Leitaoconfig MITIGATION_CALL_DEPTH_TRACKING 249180e4c1cdSThomas Gleixner bool "Mitigate RSB underflow with call depth tracking" 249280e4c1cdSThomas Gleixner depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS 249380e4c1cdSThomas Gleixner select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 249480e4c1cdSThomas Gleixner select CALL_THUNKS 249580e4c1cdSThomas Gleixner default y 249680e4c1cdSThomas Gleixner help 249780e4c1cdSThomas Gleixner Compile the kernel with call depth tracking to mitigate the Intel 249886e39b94SBreno Leitao SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off 249986e39b94SBreno Leitao by default and needs to be enabled on the kernel command line via the 250086e39b94SBreno Leitao retbleed=stuff option. For non-affected systems the overhead of this 250186e39b94SBreno Leitao option is marginal as the call depth tracking is using run-time 250286e39b94SBreno Leitao generated call thunks in a compiler generated padding area and call 250386e39b94SBreno Leitao patching. This increases text size by ~5%. For non affected systems 250486e39b94SBreno Leitao this space is unused. On affected SKL systems this results in a 250586e39b94SBreno Leitao significant performance gain over the IBRS mitigation. 250680e4c1cdSThomas Gleixner 2507e81dc127SThomas Gleixnerconfig CALL_THUNKS_DEBUG 2508e81dc127SThomas Gleixner bool "Enable call thunks and call depth tracking debugging" 25095fa31af3SBreno Leitao depends on MITIGATION_CALL_DEPTH_TRACKING 2510e81dc127SThomas Gleixner select FUNCTION_ALIGNMENT_32B 2511e81dc127SThomas Gleixner default n 2512e81dc127SThomas Gleixner help 2513e81dc127SThomas Gleixner Enable call/ret counters for imbalance detection and build in 2514e81dc127SThomas Gleixner a noisy dmesg about callthunks generation and call patching for 2515e81dc127SThomas Gleixner trouble shooting. The debug prints need to be enabled on the 2516e81dc127SThomas Gleixner kernel command line with 'debug-callthunks'. 251754628de6SRandy Dunlap Only enable this when you are debugging call thunks as this 251854628de6SRandy Dunlap creates a noticeable runtime overhead. If unsure say N. 251980e4c1cdSThomas Gleixner 2520e0b8fcfaSBreno Leitaoconfig MITIGATION_IBPB_ENTRY 2521f43b9876SPeter Zijlstra bool "Enable IBPB on kernel entry" 2522b648ab48SBen Hutchings depends on CPU_SUP_AMD && X86_64 2523f43b9876SPeter Zijlstra default y 2524f43b9876SPeter Zijlstra help 2525318e8c33SPatrick Bellasi Compile the kernel with support for the retbleed=ibpb and 2526318e8c33SPatrick Bellasi spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations. 2527f43b9876SPeter Zijlstra 25281da8d217SBreno Leitaoconfig MITIGATION_IBRS_ENTRY 2529f43b9876SPeter Zijlstra bool "Enable IBRS on kernel entry" 2530b648ab48SBen Hutchings depends on CPU_SUP_INTEL && X86_64 2531f43b9876SPeter Zijlstra default y 2532f43b9876SPeter Zijlstra help 2533f43b9876SPeter Zijlstra Compile the kernel with support for the spectre_v2=ibrs mitigation. 2534f43b9876SPeter Zijlstra This mitigates both spectre_v2 and retbleed at great cost to 2535f43b9876SPeter Zijlstra performance. 2536f43b9876SPeter Zijlstra 2537a033eec9SBreno Leitaoconfig MITIGATION_SRSO 2538fb3bd914SBorislav Petkov (AMD) bool "Mitigate speculative RAS overflow on AMD" 25390911b8c5SBreno Leitao depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK 2540fb3bd914SBorislav Petkov (AMD) default y 2541fb3bd914SBorislav Petkov (AMD) help 2542fb3bd914SBorislav Petkov (AMD) Enable the SRSO mitigation needed on AMD Zen1-4 machines. 2543fb3bd914SBorislav Petkov (AMD) 25447b75782fSBreno Leitaoconfig MITIGATION_SLS 2545f43b9876SPeter Zijlstra bool "Mitigate Straight-Line-Speculation" 2546f43b9876SPeter Zijlstra depends on CC_HAS_SLS && X86_64 2547f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2548f43b9876SPeter Zijlstra default n 2549f43b9876SPeter Zijlstra help 2550f43b9876SPeter Zijlstra Compile the kernel with straight-line-speculation options to guard 2551f43b9876SPeter Zijlstra against straight line speculation. The kernel image might be slightly 2552f43b9876SPeter Zijlstra larger. 2553f43b9876SPeter Zijlstra 2554225f2bd0SBreno Leitaoconfig MITIGATION_GDS 2555225f2bd0SBreno Leitao bool "Mitigate Gather Data Sampling" 2556225f2bd0SBreno Leitao depends on CPU_SUP_INTEL 2557225f2bd0SBreno Leitao default y 2558225f2bd0SBreno Leitao help 2559225f2bd0SBreno Leitao Enable mitigation for Gather Data Sampling (GDS). GDS is a hardware 2560225f2bd0SBreno Leitao vulnerability which allows unprivileged speculative access to data 2561225f2bd0SBreno Leitao which was previously stored in vector registers. The attacker uses gather 2562225f2bd0SBreno Leitao instructions to infer the stale vector register data. 2563225f2bd0SBreno Leitao 25648076fcdeSPawan Guptaconfig MITIGATION_RFDS 25658076fcdeSPawan Gupta bool "RFDS Mitigation" 25668076fcdeSPawan Gupta depends on CPU_SUP_INTEL 25678076fcdeSPawan Gupta default y 25688076fcdeSPawan Gupta help 25698076fcdeSPawan Gupta Enable mitigation for Register File Data Sampling (RFDS) by default. 25708076fcdeSPawan Gupta RFDS is a hardware vulnerability which affects Intel Atom CPUs. It 25718076fcdeSPawan Gupta allows unprivileged speculative access to stale data previously 25728076fcdeSPawan Gupta stored in floating point, vector and integer registers. 25738076fcdeSPawan Gupta See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst> 25748076fcdeSPawan Gupta 25754f511739SJosh Poimboeufconfig MITIGATION_SPECTRE_BHI 25764f511739SJosh Poimboeuf bool "Mitigate Spectre-BHB (Branch History Injection)" 2577ec9404e4SPawan Gupta depends on CPU_SUP_INTEL 25784f511739SJosh Poimboeuf default y 2579ec9404e4SPawan Gupta help 2580ec9404e4SPawan Gupta Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks 2581ec9404e4SPawan Gupta where the branch history buffer is poisoned to speculatively steer 2582ec9404e4SPawan Gupta indirect branches. 2583ec9404e4SPawan Gupta See <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2584ec9404e4SPawan Gupta 258594045568SBreno Leitaoconfig MITIGATION_MDS 258694045568SBreno Leitao bool "Mitigate Microarchitectural Data Sampling (MDS) hardware bug" 258794045568SBreno Leitao depends on CPU_SUP_INTEL 258894045568SBreno Leitao default y 258994045568SBreno Leitao help 259094045568SBreno Leitao Enable mitigation for Microarchitectural Data Sampling (MDS). MDS is 259194045568SBreno Leitao a hardware vulnerability which allows unprivileged speculative access 259294045568SBreno Leitao to data which is available in various CPU internal buffers. 259394045568SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/mds.rst> 2594b8da0b33SBreno Leitao 2595b8da0b33SBreno Leitaoconfig MITIGATION_TAA 2596b8da0b33SBreno Leitao bool "Mitigate TSX Asynchronous Abort (TAA) hardware bug" 2597b8da0b33SBreno Leitao depends on CPU_SUP_INTEL 2598b8da0b33SBreno Leitao default y 2599b8da0b33SBreno Leitao help 2600b8da0b33SBreno Leitao Enable mitigation for TSX Asynchronous Abort (TAA). TAA is a hardware 2601b8da0b33SBreno Leitao vulnerability that allows unprivileged speculative access to data 2602b8da0b33SBreno Leitao which is available in various CPU internal buffers by using 2603b8da0b33SBreno Leitao asynchronous aborts within an Intel TSX transactional region. 2604b8da0b33SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst> 2605163f9fe6SBreno Leitao 2606163f9fe6SBreno Leitaoconfig MITIGATION_MMIO_STALE_DATA 2607163f9fe6SBreno Leitao bool "Mitigate MMIO Stale Data hardware bug" 2608163f9fe6SBreno Leitao depends on CPU_SUP_INTEL 2609163f9fe6SBreno Leitao default y 2610163f9fe6SBreno Leitao help 2611163f9fe6SBreno Leitao Enable mitigation for MMIO Stale Data hardware bugs. Processor MMIO 2612163f9fe6SBreno Leitao Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO) 2613163f9fe6SBreno Leitao vulnerabilities that can expose data. The vulnerabilities require the 2614163f9fe6SBreno Leitao attacker to have access to MMIO. 2615163f9fe6SBreno Leitao See also 2616163f9fe6SBreno Leitao <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst> 26173a4ee4ffSBreno Leitao 26183a4ee4ffSBreno Leitaoconfig MITIGATION_L1TF 26193a4ee4ffSBreno Leitao bool "Mitigate L1 Terminal Fault (L1TF) hardware bug" 26203a4ee4ffSBreno Leitao depends on CPU_SUP_INTEL 26213a4ee4ffSBreno Leitao default y 26223a4ee4ffSBreno Leitao help 26233a4ee4ffSBreno Leitao Mitigate L1 Terminal Fault (L1TF) hardware bug. L1 Terminal Fault is a 26243a4ee4ffSBreno Leitao hardware vulnerability which allows unprivileged speculative access to data 26253a4ee4ffSBreno Leitao available in the Level 1 Data Cache. 26263a4ee4ffSBreno Leitao See <file:Documentation/admin-guide/hw-vuln/l1tf.rst 2627894e2885SBreno Leitao 2628894e2885SBreno Leitaoconfig MITIGATION_RETBLEED 2629894e2885SBreno Leitao bool "Mitigate RETBleed hardware bug" 2630894e2885SBreno Leitao depends on (CPU_SUP_INTEL && MITIGATION_SPECTRE_V2) || MITIGATION_UNRET_ENTRY || MITIGATION_IBPB_ENTRY 2631894e2885SBreno Leitao default y 2632894e2885SBreno Leitao help 2633894e2885SBreno Leitao Enable mitigation for RETBleed (Arbitrary Speculative Code Execution 2634894e2885SBreno Leitao with Return Instructions) vulnerability. RETBleed is a speculative 2635894e2885SBreno Leitao execution attack which takes advantage of microarchitectural behavior 2636894e2885SBreno Leitao in many modern microprocessors, similar to Spectre v2. An 2637894e2885SBreno Leitao unprivileged attacker can use these flaws to bypass conventional 2638894e2885SBreno Leitao memory security restrictions to gain read access to privileged memory 2639894e2885SBreno Leitao that would otherwise be inaccessible. 2640ca01c0d8SBreno Leitao 2641ca01c0d8SBreno Leitaoconfig MITIGATION_SPECTRE_V1 2642ca01c0d8SBreno Leitao bool "Mitigate SPECTRE V1 hardware bug" 2643ca01c0d8SBreno Leitao default y 2644ca01c0d8SBreno Leitao help 2645ca01c0d8SBreno Leitao Enable mitigation for Spectre V1 (Bounds Check Bypass). Spectre V1 is a 2646ca01c0d8SBreno Leitao class of side channel attacks that takes advantage of speculative 2647ca01c0d8SBreno Leitao execution that bypasses conditional branch instructions used for 2648ca01c0d8SBreno Leitao memory access bounds check. 2649ca01c0d8SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2650a0b02e3fSBreno Leitao 265172c70f48SBreno Leitaoconfig MITIGATION_SPECTRE_V2 265272c70f48SBreno Leitao bool "Mitigate SPECTRE V2 hardware bug" 265372c70f48SBreno Leitao default y 265472c70f48SBreno Leitao help 265572c70f48SBreno Leitao Enable mitigation for Spectre V2 (Branch Target Injection). Spectre 265672c70f48SBreno Leitao V2 is a class of side channel attacks that takes advantage of 265772c70f48SBreno Leitao indirect branch predictors inside the processor. In Spectre variant 2 265872c70f48SBreno Leitao attacks, the attacker can steer speculative indirect branches in the 265972c70f48SBreno Leitao victim to gadget code by poisoning the branch target buffer of a CPU 266072c70f48SBreno Leitao used for predicting indirect branch addresses. 266172c70f48SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 266272c70f48SBreno Leitao 2663a0b02e3fSBreno Leitaoconfig MITIGATION_SRBDS 2664a0b02e3fSBreno Leitao bool "Mitigate Special Register Buffer Data Sampling (SRBDS) hardware bug" 2665a0b02e3fSBreno Leitao depends on CPU_SUP_INTEL 2666a0b02e3fSBreno Leitao default y 2667a0b02e3fSBreno Leitao help 2668a0b02e3fSBreno Leitao Enable mitigation for Special Register Buffer Data Sampling (SRBDS). 2669a0b02e3fSBreno Leitao SRBDS is a hardware vulnerability that allows Microarchitectural Data 2670a0b02e3fSBreno Leitao Sampling (MDS) techniques to infer values returned from special 2671a0b02e3fSBreno Leitao register accesses. An unprivileged user can extract values returned 2672a0b02e3fSBreno Leitao from RDRAND and RDSEED executed on another core or sibling thread 2673a0b02e3fSBreno Leitao using MDS techniques. 2674a0b02e3fSBreno Leitao See also 2675a0b02e3fSBreno Leitao <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst> 2676b908cdabSBreno Leitao 2677b908cdabSBreno Leitaoconfig MITIGATION_SSB 2678b908cdabSBreno Leitao bool "Mitigate Speculative Store Bypass (SSB) hardware bug" 2679b908cdabSBreno Leitao default y 2680b908cdabSBreno Leitao help 2681b908cdabSBreno Leitao Enable mitigation for Speculative Store Bypass (SSB). SSB is a 2682b908cdabSBreno Leitao hardware security vulnerability and its exploitation takes advantage 2683b908cdabSBreno Leitao of speculative execution in a similar way to the Meltdown and Spectre 2684b908cdabSBreno Leitao security vulnerabilities. 2685b908cdabSBreno Leitao 26868754e67aSPawan Guptaconfig MITIGATION_ITS 26878754e67aSPawan Gupta bool "Enable Indirect Target Selection mitigation" 26888754e67aSPawan Gupta depends on CPU_SUP_INTEL && X86_64 26898754e67aSPawan Gupta depends on MITIGATION_RETPOLINE && MITIGATION_RETHUNK 2690872df34dSPeter Zijlstra select EXECMEM 26918754e67aSPawan Gupta default y 26928754e67aSPawan Gupta help 26938754e67aSPawan Gupta Enable Indirect Target Selection (ITS) mitigation. ITS is a bug in 26948754e67aSPawan Gupta BPU on some Intel CPUs that may allow Spectre V2 style attacks. If 26958754e67aSPawan Gupta disabled, mitigation cannot be enabled via cmdline. 26968754e67aSPawan Gupta See <file:Documentation/admin-guide/hw-vuln/indirect-target-selection.rst> 26978754e67aSPawan Gupta 2698d8010d4bSBorislav Petkov (AMD)config MITIGATION_TSA 2699d8010d4bSBorislav Petkov (AMD) bool "Mitigate Transient Scheduler Attacks" 2700d8010d4bSBorislav Petkov (AMD) depends on CPU_SUP_AMD 2701d8010d4bSBorislav Petkov (AMD) default y 2702d8010d4bSBorislav Petkov (AMD) help 2703d8010d4bSBorislav Petkov (AMD) Enable mitigation for Transient Scheduler Attacks. TSA is a hardware 2704d8010d4bSBorislav Petkov (AMD) security vulnerability on AMD CPUs which can lead to forwarding of 2705d8010d4bSBorislav Petkov (AMD) invalid info to subsequent instructions and thus can affect their 2706d8010d4bSBorislav Petkov (AMD) timing and thereby cause a leakage. 2707f43b9876SPeter Zijlstraendif 2708f43b9876SPeter Zijlstra 27093072e413SMichal Hockoconfig ARCH_HAS_ADD_PAGES 27103072e413SMichal Hocko def_bool y 27115c11f00bSDavid Hildenbrand depends on ARCH_ENABLE_MEMORY_HOTPLUG 27123072e413SMichal Hocko 2713da85f865SBjorn Helgaasmenu "Power management and ACPI options" 2714e279b6c1SSam Ravnborg 2715e279b6c1SSam Ravnborgconfig ARCH_HIBERNATION_HEADER 27163c2362e6SHarvey Harrison def_bool y 271744556530SZhimin Gu depends on HIBERNATION 2718e279b6c1SSam Ravnborg 2719e279b6c1SSam Ravnborgsource "kernel/power/Kconfig" 2720e279b6c1SSam Ravnborg 2721e279b6c1SSam Ravnborgsource "drivers/acpi/Kconfig" 2722e279b6c1SSam Ravnborg 2723a6b68076SAndi Kleenconfig X86_APM_BOOT 27246fc108a0SJan Beulich def_bool y 2725282e5aabSPaul Bolle depends on APM 2726a6b68076SAndi Kleen 2727e279b6c1SSam Ravnborgmenuconfig APM 2728e279b6c1SSam Ravnborg tristate "APM (Advanced Power Management) BIOS support" 2729efefa6f6SIngo Molnar depends on X86_32 && PM_SLEEP 2730a7f7f624SMasahiro Yamada help 2731e279b6c1SSam Ravnborg APM is a BIOS specification for saving power using several different 2732e279b6c1SSam Ravnborg techniques. This is mostly useful for battery powered laptops with 2733e279b6c1SSam Ravnborg APM compliant BIOSes. If you say Y here, the system time will be 2734e279b6c1SSam Ravnborg reset after a RESUME operation, the /proc/apm device will provide 2735e279b6c1SSam Ravnborg battery status information, and user-space programs will receive 2736e279b6c1SSam Ravnborg notification of APM "events" (e.g. battery status change). 2737e279b6c1SSam Ravnborg 2738e279b6c1SSam Ravnborg If you select "Y" here, you can disable actual use of the APM 2739e279b6c1SSam Ravnborg BIOS by passing the "apm=off" option to the kernel at boot time. 2740e279b6c1SSam Ravnborg 2741e279b6c1SSam Ravnborg Note that the APM support is almost completely disabled for 2742e279b6c1SSam Ravnborg machines with more than one CPU. 2743e279b6c1SSam Ravnborg 2744e279b6c1SSam Ravnborg In order to use APM, you will need supporting software. For location 2745151f4e2bSMauro Carvalho Chehab and more information, read <file:Documentation/power/apm-acpi.rst> 27462dc98fd3SMichael Witten and the Battery Powered Linux mini-HOWTO, available from 2747e279b6c1SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 2748e279b6c1SSam Ravnborg 2749e279b6c1SSam Ravnborg This driver does not spin down disk drives (see the hdparm(8) 2750e279b6c1SSam Ravnborg manpage ("man 8 hdparm") for that), and it doesn't turn off 2751e279b6c1SSam Ravnborg VESA-compliant "green" monitors. 2752e279b6c1SSam Ravnborg 2753e279b6c1SSam Ravnborg This driver does not support the TI 4000M TravelMate and the ACER 2754e279b6c1SSam Ravnborg 486/DX4/75 because they don't have compliant BIOSes. Many "green" 2755e279b6c1SSam Ravnborg desktop machines also don't have compliant BIOSes, and this driver 2756e279b6c1SSam Ravnborg may cause those machines to panic during the boot phase. 2757e279b6c1SSam Ravnborg 2758e279b6c1SSam Ravnborg Generally, if you don't have a battery in your machine, there isn't 2759e279b6c1SSam Ravnborg much point in using this driver and you should say N. If you get 2760e279b6c1SSam Ravnborg random kernel OOPSes or reboots that don't seem to be related to 2761e279b6c1SSam Ravnborg anything, try disabling/enabling this option (or disabling/enabling 2762e279b6c1SSam Ravnborg APM in your BIOS). 2763e279b6c1SSam Ravnborg 2764e279b6c1SSam Ravnborg Some other things you should try when experiencing seemingly random, 2765e279b6c1SSam Ravnborg "weird" problems: 2766e279b6c1SSam Ravnborg 2767e279b6c1SSam Ravnborg 1) make sure that you have enough swap space and that it is 2768e279b6c1SSam Ravnborg enabled. 27697987448fSStephen Kitt 2) pass the "idle=poll" option to the kernel 2770e279b6c1SSam Ravnborg 3) switch on floating point emulation in the kernel and pass 2771e279b6c1SSam Ravnborg the "no387" option to the kernel 2772e279b6c1SSam Ravnborg 4) pass the "floppy=nodma" option to the kernel 2773e279b6c1SSam Ravnborg 5) pass the "mem=4M" option to the kernel (thereby disabling 2774e279b6c1SSam Ravnborg all but the first 4 MB of RAM) 2775e279b6c1SSam Ravnborg 6) make sure that the CPU is not over clocked. 2776e279b6c1SSam Ravnborg 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/> 2777e279b6c1SSam Ravnborg 8) disable the cache from your BIOS settings 2778e279b6c1SSam Ravnborg 9) install a fan for the video card or exchange video RAM 2779e279b6c1SSam Ravnborg 10) install a better fan for the CPU 2780e279b6c1SSam Ravnborg 11) exchange RAM chips 2781e279b6c1SSam Ravnborg 12) exchange the motherboard. 2782e279b6c1SSam Ravnborg 2783e279b6c1SSam Ravnborg To compile this driver as a module, choose M here: the 2784e279b6c1SSam Ravnborg module will be called apm. 2785e279b6c1SSam Ravnborg 2786e279b6c1SSam Ravnborgif APM 2787e279b6c1SSam Ravnborg 2788e279b6c1SSam Ravnborgconfig APM_IGNORE_USER_SUSPEND 2789e279b6c1SSam Ravnborg bool "Ignore USER SUSPEND" 2790a7f7f624SMasahiro Yamada help 2791e279b6c1SSam Ravnborg This option will ignore USER SUSPEND requests. On machines with a 2792e279b6c1SSam Ravnborg compliant APM BIOS, you want to say N. However, on the NEC Versa M 2793e279b6c1SSam Ravnborg series notebooks, it is necessary to say Y because of a BIOS bug. 2794e279b6c1SSam Ravnborg 2795e279b6c1SSam Ravnborgconfig APM_DO_ENABLE 2796e279b6c1SSam Ravnborg bool "Enable PM at boot time" 2797a7f7f624SMasahiro Yamada help 2798e279b6c1SSam Ravnborg Enable APM features at boot time. From page 36 of the APM BIOS 2799e279b6c1SSam Ravnborg specification: "When disabled, the APM BIOS does not automatically 2800e279b6c1SSam Ravnborg power manage devices, enter the Standby State, enter the Suspend 2801e279b6c1SSam Ravnborg State, or take power saving steps in response to CPU Idle calls." 2802e279b6c1SSam Ravnborg This driver will make CPU Idle calls when Linux is idle (unless this 2803e279b6c1SSam Ravnborg feature is turned off -- see "Do CPU IDLE calls", below). This 2804e279b6c1SSam Ravnborg should always save battery power, but more complicated APM features 2805e279b6c1SSam Ravnborg will be dependent on your BIOS implementation. You may need to turn 2806e279b6c1SSam Ravnborg this option off if your computer hangs at boot time when using APM 2807e279b6c1SSam Ravnborg support, or if it beeps continuously instead of suspending. Turn 2808e279b6c1SSam Ravnborg this off if you have a NEC UltraLite Versa 33/C or a Toshiba 2809e279b6c1SSam Ravnborg T400CDT. This is off by default since most machines do fine without 2810e279b6c1SSam Ravnborg this feature. 2811e279b6c1SSam Ravnborg 2812e279b6c1SSam Ravnborgconfig APM_CPU_IDLE 2813dd8af076SLen Brown depends on CPU_IDLE 2814e279b6c1SSam Ravnborg bool "Make CPU Idle calls when idle" 2815a7f7f624SMasahiro Yamada help 2816e279b6c1SSam Ravnborg Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. 2817e279b6c1SSam Ravnborg On some machines, this can activate improved power savings, such as 2818e279b6c1SSam Ravnborg a slowed CPU clock rate, when the machine is idle. These idle calls 2819e279b6c1SSam Ravnborg are made after the idle loop has run for some length of time (e.g., 2820e279b6c1SSam Ravnborg 333 mS). On some machines, this will cause a hang at boot time or 2821e279b6c1SSam Ravnborg whenever the CPU becomes idle. (On machines with more than one CPU, 2822e279b6c1SSam Ravnborg this option does nothing.) 2823e279b6c1SSam Ravnborg 2824e279b6c1SSam Ravnborgconfig APM_DISPLAY_BLANK 2825e279b6c1SSam Ravnborg bool "Enable console blanking using APM" 2826a7f7f624SMasahiro Yamada help 2827e279b6c1SSam Ravnborg Enable console blanking using the APM. Some laptops can use this to 2828e279b6c1SSam Ravnborg turn off the LCD backlight when the screen blanker of the Linux 2829e279b6c1SSam Ravnborg virtual console blanks the screen. Note that this is only used by 2830e279b6c1SSam Ravnborg the virtual console screen blanker, and won't turn off the backlight 2831e279b6c1SSam Ravnborg when using the X Window system. This also doesn't have anything to 2832e279b6c1SSam Ravnborg do with your VESA-compliant power-saving monitor. Further, this 2833e279b6c1SSam Ravnborg option doesn't work for all laptops -- it might not turn off your 2834e279b6c1SSam Ravnborg backlight at all, or it might print a lot of errors to the console, 2835e279b6c1SSam Ravnborg especially if you are using gpm. 2836e279b6c1SSam Ravnborg 2837e279b6c1SSam Ravnborgconfig APM_ALLOW_INTS 2838e279b6c1SSam Ravnborg bool "Allow interrupts during APM BIOS calls" 2839a7f7f624SMasahiro Yamada help 2840e279b6c1SSam Ravnborg Normally we disable external interrupts while we are making calls to 2841e279b6c1SSam Ravnborg the APM BIOS as a measure to lessen the effects of a badly behaving 2842e279b6c1SSam Ravnborg BIOS implementation. The BIOS should reenable interrupts if it 2843e279b6c1SSam Ravnborg needs to. Unfortunately, some BIOSes do not -- especially those in 2844e279b6c1SSam Ravnborg many of the newer IBM Thinkpads. If you experience hangs when you 2845e279b6c1SSam Ravnborg suspend, try setting this to Y. Otherwise, say N. 2846e279b6c1SSam Ravnborg 2847e279b6c1SSam Ravnborgendif # APM 2848e279b6c1SSam Ravnborg 2849bb0a56ecSDave Jonessource "drivers/cpufreq/Kconfig" 2850e279b6c1SSam Ravnborg 2851e279b6c1SSam Ravnborgsource "drivers/cpuidle/Kconfig" 2852e279b6c1SSam Ravnborg 285327471fdbSAndy Henroidsource "drivers/idle/Kconfig" 285427471fdbSAndy Henroid 2855e279b6c1SSam Ravnborgendmenu 2856e279b6c1SSam Ravnborg 2857e279b6c1SSam Ravnborgmenu "Bus options (PCI etc.)" 2858e279b6c1SSam Ravnborg 2859e279b6c1SSam Ravnborgchoice 2860e279b6c1SSam Ravnborg prompt "PCI access mode" 2861efefa6f6SIngo Molnar depends on X86_32 && PCI 2862e279b6c1SSam Ravnborg default PCI_GOANY 2863a7f7f624SMasahiro Yamada help 2864e279b6c1SSam Ravnborg On PCI systems, the BIOS can be used to detect the PCI devices and 2865e279b6c1SSam Ravnborg determine their configuration. However, some old PCI motherboards 2866e279b6c1SSam Ravnborg have BIOS bugs and may crash if this is done. Also, some embedded 2867e279b6c1SSam Ravnborg PCI-based systems don't have any BIOS at all. Linux can also try to 2868e279b6c1SSam Ravnborg detect the PCI hardware directly without using the BIOS. 2869e279b6c1SSam Ravnborg 2870e279b6c1SSam Ravnborg With this option, you can specify how Linux should detect the 2871e279b6c1SSam Ravnborg PCI devices. If you choose "BIOS", the BIOS will be used, 2872e279b6c1SSam Ravnborg if you choose "Direct", the BIOS won't be used, and if you 2873e279b6c1SSam Ravnborg choose "MMConfig", then PCI Express MMCONFIG will be used. 2874e279b6c1SSam Ravnborg If you choose "Any", the kernel will try MMCONFIG, then the 2875e279b6c1SSam Ravnborg direct access method and falls back to the BIOS if that doesn't 2876e279b6c1SSam Ravnborg work. If unsure, go with the default, which is "Any". 2877e279b6c1SSam Ravnborg 2878e279b6c1SSam Ravnborgconfig PCI_GOBIOS 2879e279b6c1SSam Ravnborg bool "BIOS" 2880e279b6c1SSam Ravnborg 2881e279b6c1SSam Ravnborgconfig PCI_GOMMCONFIG 2882e279b6c1SSam Ravnborg bool "MMConfig" 2883e279b6c1SSam Ravnborg 2884e279b6c1SSam Ravnborgconfig PCI_GODIRECT 2885e279b6c1SSam Ravnborg bool "Direct" 2886e279b6c1SSam Ravnborg 28873ef0e1f8SAndres Salomonconfig PCI_GOOLPC 288876fb6570SDaniel Drake bool "OLPC XO-1" 28893ef0e1f8SAndres Salomon depends on OLPC 28903ef0e1f8SAndres Salomon 28912bdd1b03SAndres Salomonconfig PCI_GOANY 28922bdd1b03SAndres Salomon bool "Any" 28932bdd1b03SAndres Salomon 2894e279b6c1SSam Ravnborgendchoice 2895e279b6c1SSam Ravnborg 2896e279b6c1SSam Ravnborgconfig PCI_BIOS 28973c2362e6SHarvey Harrison def_bool y 2898efefa6f6SIngo Molnar depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY) 2899e279b6c1SSam Ravnborg 2900e279b6c1SSam Ravnborg# x86-64 doesn't support PCI BIOS access from long mode so always go direct. 2901e279b6c1SSam Ravnborgconfig PCI_DIRECT 29023c2362e6SHarvey Harrison def_bool y 29030aba496fSShaohua Li depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG)) 2904e279b6c1SSam Ravnborg 2905e279b6c1SSam Ravnborgconfig PCI_MMCONFIG 2906b45c9f36SJan Kiszka bool "Support mmconfig PCI config space access" if X86_64 2907b45c9f36SJan Kiszka default y 29084590d98fSAndy Shevchenko depends on PCI && (ACPI || JAILHOUSE_GUEST) 2909b45c9f36SJan Kiszka depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG) 291021d8fb8dSMateusz Jończyk help 291121d8fb8dSMateusz Jończyk Add support for accessing the PCI configuration space as a memory 291221d8fb8dSMateusz Jończyk mapped area. It is the recommended method if the system supports 291321d8fb8dSMateusz Jończyk this (it must have PCI Express and ACPI for it to be available). 291421d8fb8dSMateusz Jończyk 291521d8fb8dSMateusz Jończyk In the unlikely case that enabling this configuration option causes 291621d8fb8dSMateusz Jończyk problems, the mechanism can be switched off with the 'pci=nommconf' 291721d8fb8dSMateusz Jończyk command line parameter. 291821d8fb8dSMateusz Jończyk 291921d8fb8dSMateusz Jończyk Say N only if you are sure that your platform does not support this 292021d8fb8dSMateusz Jończyk access method or you have problems caused by it. 292121d8fb8dSMateusz Jończyk 292221d8fb8dSMateusz Jończyk Say Y otherwise. 2923e279b6c1SSam Ravnborg 29243ef0e1f8SAndres Salomonconfig PCI_OLPC 29252bdd1b03SAndres Salomon def_bool y 29262bdd1b03SAndres Salomon depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY) 29273ef0e1f8SAndres Salomon 2928b5401a96SAlex Nixonconfig PCI_XEN 2929b5401a96SAlex Nixon def_bool y 2930b5401a96SAlex Nixon depends on PCI && XEN 2931b5401a96SAlex Nixon 29328364e1f8SJan Kiszkaconfig MMCONF_FAM10H 29338364e1f8SJan Kiszka def_bool y 29348364e1f8SJan Kiszka depends on X86_64 && PCI_MMCONFIG && ACPI 2935e279b6c1SSam Ravnborg 29363f6ea84aSIra W. Snyderconfig PCI_CNB20LE_QUIRK 2937d9f87802SMateusz Jończyk bool "Read PCI host bridge windows from the CNB20LE chipset" if EXPERT 2938d9f87802SMateusz Jończyk depends on X86_32 && PCI 29393f6ea84aSIra W. Snyder help 29403f6ea84aSIra W. Snyder Read the PCI windows out of the CNB20LE host bridge. This allows 29413f6ea84aSIra W. Snyder PCI hotplug to work on systems with the CNB20LE chipset which do 29423f6ea84aSIra W. Snyder not have ACPI. 29433f6ea84aSIra W. Snyder 2944d9f87802SMateusz Jończyk The ServerWorks (later Broadcom) CNB20LE was a chipset designed 2945d9f87802SMateusz Jończyk most probably only for Pentium III. 2946d9f87802SMateusz Jończyk 2947d9f87802SMateusz Jończyk To find out if you have such a chipset, search for a PCI device with 2948d9f87802SMateusz Jończyk 1166:0009 PCI IDs, for example by executing 2949d9f87802SMateusz Jończyk lspci -nn | grep '1166:0009' 2950d9f87802SMateusz Jończyk The code is inactive if there is none. 2951d9f87802SMateusz Jończyk 295264a5fed6SBjorn Helgaas There's no public spec for this chipset, and this functionality 295364a5fed6SBjorn Helgaas is known to be incomplete. 295464a5fed6SBjorn Helgaas 295564a5fed6SBjorn Helgaas You should say N unless you know you need this. 295664a5fed6SBjorn Helgaas 29573a495511SWilliam Breathitt Grayconfig ISA_BUS 295817a2a129SWilliam Breathitt Gray bool "ISA bus support on modern systems" if EXPERT 29593a495511SWilliam Breathitt Gray help 296017a2a129SWilliam Breathitt Gray Expose ISA bus device drivers and options available for selection and 296117a2a129SWilliam Breathitt Gray configuration. Enable this option if your target machine has an ISA 296217a2a129SWilliam Breathitt Gray bus. ISA is an older system, displaced by PCI and newer bus 296317a2a129SWilliam Breathitt Gray architectures -- if your target machine is modern, it probably does 296417a2a129SWilliam Breathitt Gray not have an ISA bus. 29653a495511SWilliam Breathitt Gray 29663a495511SWilliam Breathitt Gray If unsure, say N. 29673a495511SWilliam Breathitt Gray 29681c00f016SDavid Rientjes# x86_64 have no ISA slots, but can have ISA-style DMA. 2969e279b6c1SSam Ravnborgconfig ISA_DMA_API 29701c00f016SDavid Rientjes bool "ISA-style DMA support" if (X86_64 && EXPERT) 29711c00f016SDavid Rientjes default y 29721c00f016SDavid Rientjes help 29731c00f016SDavid Rientjes Enables ISA-style DMA support for devices requiring such controllers. 29741c00f016SDavid Rientjes If unsure, say Y. 2975e279b6c1SSam Ravnborg 297651e68d05SLinus Torvaldsif X86_32 297751e68d05SLinus Torvalds 2978e279b6c1SSam Ravnborgconfig ISA 2979e279b6c1SSam Ravnborg bool "ISA support" 2980a7f7f624SMasahiro Yamada help 2981e279b6c1SSam Ravnborg Find out whether you have ISA slots on your motherboard. ISA is the 2982e279b6c1SSam Ravnborg name of a bus system, i.e. the way the CPU talks to the other stuff 2983e279b6c1SSam Ravnborg inside your box. Other bus systems are PCI, EISA, MicroChannel 2984e279b6c1SSam Ravnborg (MCA) or VESA. ISA is an older system, now being displaced by PCI; 2985e279b6c1SSam Ravnborg newer boards don't support it. If you have ISA, say Y, otherwise N. 2986e279b6c1SSam Ravnborg 2987e279b6c1SSam Ravnborgconfig SCx200 2988e279b6c1SSam Ravnborg tristate "NatSemi SCx200 support" 2989a7f7f624SMasahiro Yamada help 2990e279b6c1SSam Ravnborg This provides basic support for National Semiconductor's 2991e279b6c1SSam Ravnborg (now AMD's) Geode processors. The driver probes for the 2992e279b6c1SSam Ravnborg PCI-IDs of several on-chip devices, so its a good dependency 2993e279b6c1SSam Ravnborg for other scx200_* drivers. 2994e279b6c1SSam Ravnborg 2995e279b6c1SSam Ravnborg If compiled as a module, the driver is named scx200. 2996e279b6c1SSam Ravnborg 2997e279b6c1SSam Ravnborgconfig SCx200HR_TIMER 2998e279b6c1SSam Ravnborg tristate "NatSemi SCx200 27MHz High-Resolution Timer Support" 2999592913ecSJohn Stultz depends on SCx200 3000e279b6c1SSam Ravnborg default y 3001a7f7f624SMasahiro Yamada help 3002e279b6c1SSam Ravnborg This driver provides a clocksource built upon the on-chip 3003e279b6c1SSam Ravnborg 27MHz high-resolution timer. Its also a workaround for 3004e279b6c1SSam Ravnborg NSC Geode SC-1100's buggy TSC, which loses time when the 3005e279b6c1SSam Ravnborg processor goes idle (as is done by the scheduler). The 3006e279b6c1SSam Ravnborg other workaround is idle=poll boot option. 3007e279b6c1SSam Ravnborg 30083ef0e1f8SAndres Salomonconfig OLPC 30093ef0e1f8SAndres Salomon bool "One Laptop Per Child support" 301054008979SThomas Gleixner depends on !X86_PAE 30113c554946SAndres Salomon select GPIOLIB 3012dc3119e7SThomas Gleixner select OF 301345bb1674SDaniel Drake select OF_PROMTREE 3014b4e51854SGrant Likely select IRQ_DOMAIN 30150c3d931bSLubomir Rintel select OLPC_EC 3016a7f7f624SMasahiro Yamada help 30173ef0e1f8SAndres Salomon Add support for detecting the unique features of the OLPC 30183ef0e1f8SAndres Salomon XO hardware. 30193ef0e1f8SAndres Salomon 3020a3128588SDaniel Drakeconfig OLPC_XO1_PM 3021a3128588SDaniel Drake bool "OLPC XO-1 Power Management" 3022fa112cf1SBorislav Petkov depends on OLPC && MFD_CS5535=y && PM_SLEEP 3023a7f7f624SMasahiro Yamada help 302497c4cb71SDaniel Drake Add support for poweroff and suspend of the OLPC XO-1 laptop. 3025bf1ebf00SDaniel Drake 3026cfee9597SDaniel Drakeconfig OLPC_XO1_RTC 3027cfee9597SDaniel Drake bool "OLPC XO-1 Real Time Clock" 3028cfee9597SDaniel Drake depends on OLPC_XO1_PM && RTC_DRV_CMOS 3029a7f7f624SMasahiro Yamada help 3030cfee9597SDaniel Drake Add support for the XO-1 real time clock, which can be used as a 3031cfee9597SDaniel Drake programmable wakeup source. 3032cfee9597SDaniel Drake 30337feda8e9SDaniel Drakeconfig OLPC_XO1_SCI 30347feda8e9SDaniel Drake bool "OLPC XO-1 SCI extras" 303592e830f2SArnd Bergmann depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y 3036ed8e47feSRandy Dunlap depends on INPUT=y 3037d8d01a63SDaniel Drake select POWER_SUPPLY 3038a7f7f624SMasahiro Yamada help 30397feda8e9SDaniel Drake Add support for SCI-based features of the OLPC XO-1 laptop: 30407bc74b3dSDaniel Drake - EC-driven system wakeups 30417feda8e9SDaniel Drake - Power button 30427bc74b3dSDaniel Drake - Ebook switch 30432cf2baeaSDaniel Drake - Lid switch 3044e1040ac6SDaniel Drake - AC adapter status updates 3045e1040ac6SDaniel Drake - Battery status updates 30467feda8e9SDaniel Drake 3047a0f30f59SDaniel Drakeconfig OLPC_XO15_SCI 3048a0f30f59SDaniel Drake bool "OLPC XO-1.5 SCI extras" 3049d8d01a63SDaniel Drake depends on OLPC && ACPI 3050d8d01a63SDaniel Drake select POWER_SUPPLY 3051a7f7f624SMasahiro Yamada help 3052a0f30f59SDaniel Drake Add support for SCI-based features of the OLPC XO-1.5 laptop: 3053a0f30f59SDaniel Drake - EC-driven system wakeups 3054a0f30f59SDaniel Drake - AC adapter status updates 3055a0f30f59SDaniel Drake - Battery status updates 3056e279b6c1SSam Ravnborg 3057298c9babSDmitry Torokhovconfig GEODE_COMMON 3058298c9babSDmitry Torokhov bool 3059298c9babSDmitry Torokhov 3060d4f3e350SEd Wildgooseconfig ALIX 3061d4f3e350SEd Wildgoose bool "PCEngines ALIX System Support (LED setup)" 3062d4f3e350SEd Wildgoose select GPIOLIB 3063298c9babSDmitry Torokhov select GEODE_COMMON 3064a7f7f624SMasahiro Yamada help 3065d4f3e350SEd Wildgoose This option enables system support for the PCEngines ALIX. 3066d4f3e350SEd Wildgoose At present this just sets up LEDs for GPIO control on 3067d4f3e350SEd Wildgoose ALIX2/3/6 boards. However, other system specific setup should 3068d4f3e350SEd Wildgoose get added here. 3069d4f3e350SEd Wildgoose 3070d4f3e350SEd Wildgoose Note: You must still enable the drivers for GPIO and LED support 3071d4f3e350SEd Wildgoose (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs 3072d4f3e350SEd Wildgoose 3073d4f3e350SEd Wildgoose Note: You have to set alix.force=1 for boards with Award BIOS. 3074d4f3e350SEd Wildgoose 3075da4e3302SPhilip Prindevilleconfig NET5501 3076da4e3302SPhilip Prindeville bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)" 3077da4e3302SPhilip Prindeville select GPIOLIB 3078298c9babSDmitry Torokhov select GEODE_COMMON 3079a7f7f624SMasahiro Yamada help 3080da4e3302SPhilip Prindeville This option enables system support for the Soekris Engineering net5501. 3081da4e3302SPhilip Prindeville 30823197059aSPhilip A. Prindevilleconfig GEOS 30833197059aSPhilip A. Prindeville bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)" 30843197059aSPhilip A. Prindeville select GPIOLIB 3085298c9babSDmitry Torokhov select GEODE_COMMON 30863197059aSPhilip A. Prindeville depends on DMI 3087a7f7f624SMasahiro Yamada help 30883197059aSPhilip A. Prindeville This option enables system support for the Traverse Technologies GEOS. 30893197059aSPhilip A. Prindeville 30907d029125SVivien Didelotconfig TS5500 30917d029125SVivien Didelot bool "Technologic Systems TS-5500 platform support" 30927d029125SVivien Didelot depends on MELAN 30937d029125SVivien Didelot select CHECK_SIGNATURE 30947d029125SVivien Didelot select NEW_LEDS 30957d029125SVivien Didelot select LEDS_CLASS 3096a7f7f624SMasahiro Yamada help 30977d029125SVivien Didelot This option enables system support for the Technologic Systems TS-5500. 30987d029125SVivien Didelot 3099e279b6c1SSam Ravnborgendif # X86_32 3100e279b6c1SSam Ravnborg 310123ac4ae8SAndreas Herrmannconfig AMD_NB 3102e279b6c1SSam Ravnborg def_bool y 3103e6e6e5e8SYazen Ghannam depends on AMD_NODE 3104e6e6e5e8SYazen Ghannam 3105e6e6e5e8SYazen Ghannamconfig AMD_NODE 3106e6e6e5e8SYazen Ghannam def_bool y 31070e152cd7SBorislav Petkov depends on CPU_SUP_AMD && PCI 3108e279b6c1SSam Ravnborg 3109e279b6c1SSam Ravnborgendmenu 3110e279b6c1SSam Ravnborg 31111572497cSChristoph Hellwigmenu "Binary Emulations" 3112e279b6c1SSam Ravnborg 3113e279b6c1SSam Ravnborgconfig IA32_EMULATION 3114e279b6c1SSam Ravnborg bool "IA32 Emulation" 3115e279b6c1SSam Ravnborg depends on X86_64 311639f88911SIngo Molnar select ARCH_WANT_OLD_COMPAT_IPC 3117d1603990SRandy Dunlap select BINFMT_ELF 311839f88911SIngo Molnar select COMPAT_OLD_SIGACTION 3119a7f7f624SMasahiro Yamada help 31205fd92e65SH. J. Lu Include code to run legacy 32-bit programs under a 31215fd92e65SH. J. Lu 64-bit kernel. You should likely turn this on, unless you're 31225fd92e65SH. J. Lu 100% sure that you don't have any 32-bit programs left. 3123e279b6c1SSam Ravnborg 3124a11e0975SNikolay Borisovconfig IA32_EMULATION_DEFAULT_DISABLED 3125a11e0975SNikolay Borisov bool "IA32 emulation disabled by default" 3126a11e0975SNikolay Borisov default n 3127a11e0975SNikolay Borisov depends on IA32_EMULATION 3128a11e0975SNikolay Borisov help 3129a11e0975SNikolay Borisov Make IA32 emulation disabled by default. This prevents loading 32-bit 3130a11e0975SNikolay Borisov processes and access to 32-bit syscalls. If unsure, leave it to its 3131a11e0975SNikolay Borisov default value. 3132a11e0975SNikolay Borisov 313383a44a4fSMasahiro Yamadaconfig X86_X32_ABI 31346ea30386SKees Cook bool "x32 ABI for 64-bit mode" 31359b54050bSBrian Gerst depends on X86_64 3136aaeed6ecSNathan Chancellor # llvm-objcopy does not convert x86_64 .note.gnu.property or 3137aaeed6ecSNathan Chancellor # compressed debug sections to x86_x32 properly: 3138aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/514 3139aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/1141 3140aaeed6ecSNathan Chancellor depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm) 3141a7f7f624SMasahiro Yamada help 31425fd92e65SH. J. Lu Include code to run binaries for the x32 native 32-bit ABI 31435fd92e65SH. J. Lu for 64-bit processors. An x32 process gets access to the 31445fd92e65SH. J. Lu full 64-bit register file and wide data path while leaving 31455fd92e65SH. J. Lu pointers at 32 bits for smaller memory footprint. 31465fd92e65SH. J. Lu 3147953fee1dSIngo Molnarconfig COMPAT_32 3148953fee1dSIngo Molnar def_bool y 3149953fee1dSIngo Molnar depends on IA32_EMULATION || X86_32 3150953fee1dSIngo Molnar select HAVE_UID16 3151953fee1dSIngo Molnar select OLD_SIGSUSPEND3 3152953fee1dSIngo Molnar 3153e279b6c1SSam Ravnborgconfig COMPAT 31543c2362e6SHarvey Harrison def_bool y 315583a44a4fSMasahiro Yamada depends on IA32_EMULATION || X86_X32_ABI 3156e279b6c1SSam Ravnborg 3157e279b6c1SSam Ravnborgconfig COMPAT_FOR_U64_ALIGNMENT 31583120e25eSJan Beulich def_bool y 3159a9251280SLinus Torvalds depends on COMPAT 3160ee009e4aSDavid Howells 3161e279b6c1SSam Ravnborgendmenu 3162e279b6c1SSam Ravnborg 3163e5beae16SKeith Packardconfig HAVE_ATOMIC_IOMAP 3164e5beae16SKeith Packard def_bool y 3165e5beae16SKeith Packard depends on X86_32 3166e5beae16SKeith Packard 3167edf88417SAvi Kivitysource "arch/x86/kvm/Kconfig" 31685e8ebd84SJason A. Donenfeld 31693d37d939SH. Peter Anvin (Intel)source "arch/x86/Kconfig.cpufeatures" 31703d37d939SH. Peter Anvin (Intel) 31715e8ebd84SJason A. Donenfeldsource "arch/x86/Kconfig.assembler" 3172