1# SPDX-License-Identifier: GPL-2.0 2config SUPERH 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_CPU_CACHE_ALIASING 6 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) 7 select ARCH_HAS_BINFMT_FLAT if !MMU 8 select ARCH_HAS_CPU_FINALIZE_INIT 9 select ARCH_HAS_CURRENT_STACK_POINTER 10 select ARCH_HAS_GIGANTIC_PAGE 11 select ARCH_HAS_GCOV_PROFILE_ALL 12 select ARCH_HAS_PTE_SPECIAL 13 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 14 select ARCH_HIBERNATION_POSSIBLE if MMU 15 select ARCH_MIGHT_HAVE_PC_PARPORT 16 select ARCH_WANT_IPC_PARSE_VERSION 17 select ARCH_NEED_CMPXCHG_1_EMU 18 select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU 19 select CPU_NO_EFFICIENT_FFS 20 select DMA_DECLARE_COHERENT 21 select GENERIC_ATOMIC64 22 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST 23 select GENERIC_IDLE_POLL_SETUP 24 select GENERIC_IRQ_SHOW 25 select GENERIC_LIB_ASHLDI3 26 select GENERIC_LIB_ASHRDI3 27 select GENERIC_LIB_LSHRDI3 28 select GENERIC_PCI_IOMAP if PCI 29 select GENERIC_SCHED_CLOCK 30 select GENERIC_SMP_IDLE_THREAD 31 select GUP_GET_PXX_LOW_HIGH if X2TLB 32 select HAS_IOPORT if HAS_IOPORT_MAP 33 select GENERIC_IOREMAP if MMU 34 select HAVE_ARCH_AUDITSYSCALL 35 select HAVE_ARCH_KGDB 36 select HAVE_ARCH_SECCOMP_FILTER 37 select HAVE_ARCH_TLB_REMOVE_TABLE if X2TLB 38 select HAVE_ARCH_TRACEHOOK 39 select HAVE_DEBUG_BUGVERBOSE 40 select HAVE_DEBUG_KMEMLEAK 41 select HAVE_DYNAMIC_FTRACE 42 select HAVE_GUP_FAST if MMU 43 select HAVE_FUNCTION_GRAPH_TRACER 44 select HAVE_FUNCTION_TRACER 45 select HAVE_HW_BREAKPOINT 46 select HAVE_IOREMAP_PROT if MMU && !X2TLB 47 select HAVE_KERNEL_BZIP2 48 select HAVE_KERNEL_GZIP 49 select HAVE_KERNEL_LZMA 50 select HAVE_KERNEL_LZO 51 select HAVE_KERNEL_XZ 52 select HAVE_KPROBES 53 select HAVE_KRETPROBES 54 select HAVE_MIXED_BREAKPOINTS_REGS 55 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER 56 select HAVE_NMI 57 select HAVE_PATA_PLATFORM 58 select HAVE_PERF_EVENTS 59 select HAVE_REGS_AND_STACK_ACCESS_API 60 select HAVE_UID16 61 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS 62 select HAVE_STACKPROTECTOR 63 select HAVE_SYSCALL_TRACEPOINTS 64 select IRQ_FORCED_THREADING 65 select LOCK_MM_AND_FIND_VMA 66 select MODULES_USE_ELF_RELA 67 select NEED_SG_DMA_LENGTH 68 select NO_DMA if !MMU && !DMA_COHERENT 69 select NO_GENERIC_PCI_IOPORT_MAP if PCI 70 select OLD_SIGACTION 71 select OLD_SIGSUSPEND 72 select PCI_DOMAINS if PCI 73 select PERF_EVENTS 74 select PERF_USE_VMALLOC 75 select RTC_LIB 76 select SPARSE_IRQ 77 select TRACE_IRQFLAGS_SUPPORT 78 help 79 The SuperH is a RISC processor targeted for use in embedded systems 80 and consumer electronics; it was also used in the Sega Dreamcast 81 gaming console. The SuperH port has a home page at 82 <http://www.linux-sh.org/>. 83 84config GENERIC_BUG 85 def_bool y 86 depends on BUG 87 88config GENERIC_HWEIGHT 89 def_bool y 90 91config GENERIC_CALIBRATE_DELAY 92 bool 93 94config GENERIC_LOCKBREAK 95 def_bool y 96 depends on SMP && PREEMPTION 97 98config ARCH_SUSPEND_POSSIBLE 99 def_bool n 100 101config ARCH_HIBERNATION_POSSIBLE 102 def_bool n 103 104config SYS_SUPPORTS_APM_EMULATION 105 bool 106 select ARCH_SUSPEND_POSSIBLE 107 108config SYS_SUPPORTS_SMP 109 bool 110 111config STACKTRACE_SUPPORT 112 def_bool y 113 114config LOCKDEP_SUPPORT 115 def_bool y 116 117config ARCH_HAS_ILOG2_U32 118 def_bool n 119 120config ARCH_HAS_ILOG2_U64 121 def_bool n 122 123config NO_IOPORT_MAP 124 def_bool !PCI 125 depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE && \ 126 !SH_DREAMCAST 127 128config IO_TRAPPED 129 bool 130 131config SWAP_IO_SPACE 132 bool 133 134config DMA_COHERENT 135 bool 136 137config DMA_NONCOHERENT 138 def_bool !NO_DMA && !DMA_COHERENT 139 select ARCH_HAS_DMA_PREP_COHERENT 140 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 141 select DMA_DIRECT_REMAP 142 143config PGTABLE_LEVELS 144 default 3 if X2TLB 145 default 2 146 147menu "System type" 148 149# 150# Processor families 151# 152config CPU_SH2 153 bool 154 select SH_INTC 155 156config CPU_SH2A 157 bool 158 select CPU_SH2 159 select UNCACHED_MAPPING 160 161config CPU_J2 162 bool 163 select CPU_SH2 164 select OF 165 select OF_EARLY_FLATTREE 166 167config CPU_SH3 168 bool 169 select CPU_HAS_INTEVT 170 select CPU_HAS_SR_RB 171 select SH_INTC 172 select SYS_SUPPORTS_SH_TMU 173 174config CPU_SH4 175 bool 176 select ARCH_SUPPORTS_HUGETLBFS if MMU 177 select CPU_HAS_INTEVT 178 select CPU_HAS_SR_RB 179 select CPU_HAS_FPU if !CPU_SH4AL_DSP 180 select SH_INTC 181 select SYS_SUPPORTS_SH_TMU 182 183config CPU_SH4A 184 bool 185 select CPU_SH4 186 187config CPU_SH4AL_DSP 188 bool 189 select CPU_SH4A 190 select CPU_HAS_DSP 191 192config CPU_SHX2 193 bool 194 195config CPU_SHX3 196 bool 197 select DMA_COHERENT 198 select SYS_SUPPORTS_SMP 199 200config ARCH_SHMOBILE 201 bool 202 select ARCH_SUSPEND_POSSIBLE 203 select PM 204 205config CPU_HAS_PMU 206 depends on CPU_SH4 || CPU_SH4A 207 default y 208 bool 209 210choice 211 prompt "Processor sub-type selection" 212 213# 214# Processor subtypes 215# 216 217# SH-2 Processor Support 218 219config CPU_SUBTYPE_SH7619 220 bool "Support SH7619 processor" 221 select CPU_SH2 222 select SYS_SUPPORTS_SH_CMT 223 224config CPU_SUBTYPE_J2 225 bool "Support J2 processor" 226 select CPU_J2 227 select SYS_SUPPORTS_SMP 228 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 229 230# SH-2A Processor Support 231 232config CPU_SUBTYPE_SH7201 233 bool "Support SH7201 processor" 234 select CPU_SH2A 235 select CPU_HAS_FPU 236 select SYS_SUPPORTS_SH_MTU2 237 238config CPU_SUBTYPE_SH7203 239 bool "Support SH7203 processor" 240 select CPU_SH2A 241 select CPU_HAS_FPU 242 select SYS_SUPPORTS_SH_CMT 243 select SYS_SUPPORTS_SH_MTU2 244 select PINCTRL 245 246config CPU_SUBTYPE_SH7206 247 bool "Support SH7206 processor" 248 select CPU_SH2A 249 select SYS_SUPPORTS_SH_CMT 250 select SYS_SUPPORTS_SH_MTU2 251 252config CPU_SUBTYPE_SH7263 253 bool "Support SH7263 processor" 254 select CPU_SH2A 255 select CPU_HAS_FPU 256 select SYS_SUPPORTS_SH_CMT 257 select SYS_SUPPORTS_SH_MTU2 258 259config CPU_SUBTYPE_SH7264 260 bool "Support SH7264 processor" 261 select CPU_SH2A 262 select CPU_HAS_FPU 263 select SYS_SUPPORTS_SH_CMT 264 select SYS_SUPPORTS_SH_MTU2 265 select PINCTRL 266 267config CPU_SUBTYPE_SH7269 268 bool "Support SH7269 processor" 269 select CPU_SH2A 270 select CPU_HAS_FPU 271 select SYS_SUPPORTS_SH_CMT 272 select SYS_SUPPORTS_SH_MTU2 273 select PINCTRL 274 275config CPU_SUBTYPE_MXG 276 bool "Support MX-G processor" 277 select CPU_SH2A 278 select SYS_SUPPORTS_SH_MTU2 279 help 280 Select MX-G if running on an R8A03022BG part. 281 282# SH-3 Processor Support 283 284config CPU_SUBTYPE_SH7705 285 bool "Support SH7705 processor" 286 select CPU_SH3 287 288config CPU_SUBTYPE_SH7706 289 bool "Support SH7706 processor" 290 select CPU_SH3 291 help 292 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 293 294config CPU_SUBTYPE_SH7707 295 bool "Support SH7707 processor" 296 select CPU_SH3 297 help 298 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 299 300config CPU_SUBTYPE_SH7708 301 bool "Support SH7708 processor" 302 select CPU_SH3 303 help 304 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 305 if you have a 100 Mhz SH-3 HD6417708R CPU. 306 307config CPU_SUBTYPE_SH7709 308 bool "Support SH7709 processor" 309 select CPU_SH3 310 help 311 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 312 313config CPU_SUBTYPE_SH7710 314 bool "Support SH7710 processor" 315 select CPU_SH3 316 select CPU_HAS_DSP 317 help 318 Select SH7710 if you have a SH3-DSP SH7710 CPU. 319 320config CPU_SUBTYPE_SH7712 321 bool "Support SH7712 processor" 322 select CPU_SH3 323 select CPU_HAS_DSP 324 help 325 Select SH7712 if you have a SH3-DSP SH7712 CPU. 326 327config CPU_SUBTYPE_SH7720 328 bool "Support SH7720 processor" 329 select CPU_SH3 330 select CPU_HAS_DSP 331 select SYS_SUPPORTS_SH_CMT 332 select USB_OHCI_SH if USB_OHCI_HCD 333 select PINCTRL 334 help 335 Select SH7720 if you have a SH3-DSP SH7720 CPU. 336 337config CPU_SUBTYPE_SH7721 338 bool "Support SH7721 processor" 339 select CPU_SH3 340 select CPU_HAS_DSP 341 select SYS_SUPPORTS_SH_CMT 342 select USB_OHCI_SH if USB_OHCI_HCD 343 help 344 Select SH7721 if you have a SH3-DSP SH7721 CPU. 345 346# SH-4 Processor Support 347 348config CPU_SUBTYPE_SH7750 349 bool "Support SH7750 processor" 350 select CPU_SH4 351 help 352 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 353 354config CPU_SUBTYPE_SH7091 355 bool "Support SH7091 processor" 356 select CPU_SH4 357 help 358 Select SH7091 if you have an SH-4 based Sega device (such as 359 the Dreamcast, Naomi, and Naomi 2). 360 361config CPU_SUBTYPE_SH7750R 362 bool "Support SH7750R processor" 363 select CPU_SH4 364 365config CPU_SUBTYPE_SH7750S 366 bool "Support SH7750S processor" 367 select CPU_SH4 368 369config CPU_SUBTYPE_SH7751 370 bool "Support SH7751 processor" 371 select CPU_SH4 372 help 373 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 374 or if you have a HD6417751R CPU. 375 376config CPU_SUBTYPE_SH7751R 377 bool "Support SH7751R processor" 378 select CPU_SH4 379 380config CPU_SUBTYPE_SH7760 381 bool "Support SH7760 processor" 382 select CPU_SH4 383 384# SH-4A Processor Support 385 386config CPU_SUBTYPE_SH7723 387 bool "Support SH7723 processor" 388 select CPU_SH4A 389 select CPU_SHX2 390 select ARCH_SHMOBILE 391 select SYS_SUPPORTS_SH_CMT 392 select PINCTRL 393 help 394 Select SH7723 if you have an SH-MobileR2 CPU. 395 396config CPU_SUBTYPE_SH7724 397 bool "Support SH7724 processor" 398 select CPU_SH4A 399 select CPU_SHX2 400 select ARCH_SHMOBILE 401 select SYS_SUPPORTS_SH_CMT 402 select PINCTRL 403 help 404 Select SH7724 if you have an SH-MobileR2R CPU. 405 406config CPU_SUBTYPE_SH7734 407 bool "Support SH7734 processor" 408 select CPU_SH4A 409 select CPU_SHX2 410 select PINCTRL 411 help 412 Select SH7734 if you have a SH4A SH7734 CPU. 413 414config CPU_SUBTYPE_SH7757 415 bool "Support SH7757 processor" 416 select CPU_SH4A 417 select CPU_SHX2 418 select PINCTRL 419 help 420 Select SH7757 if you have a SH4A SH7757 CPU. 421 422config CPU_SUBTYPE_SH7763 423 bool "Support SH7763 processor" 424 select CPU_SH4A 425 select USB_OHCI_SH if USB_OHCI_HCD 426 help 427 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 428 429config CPU_SUBTYPE_SH7770 430 bool "Support SH7770 processor" 431 select CPU_SH4A 432 433config CPU_SUBTYPE_SH7780 434 bool "Support SH7780 processor" 435 select CPU_SH4A 436 437config CPU_SUBTYPE_SH7785 438 bool "Support SH7785 processor" 439 select CPU_SH4A 440 select CPU_SHX2 441 select PINCTRL 442 443config CPU_SUBTYPE_SH7786 444 bool "Support SH7786 processor" 445 select CPU_SH4A 446 select CPU_SHX3 447 select CPU_HAS_PTEAEX 448 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 449 select USB_OHCI_SH if USB_OHCI_HCD 450 select USB_EHCI_SH if USB_EHCI_HCD 451 select PINCTRL 452 453config CPU_SUBTYPE_SHX3 454 bool "Support SH-X3 processor" 455 select CPU_SH4A 456 select CPU_SHX3 457 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 458 select GPIOLIB 459 select GPIOLIB_LEGACY 460 select PINCTRL 461 462# SH4AL-DSP Processor Support 463 464config CPU_SUBTYPE_SH7343 465 bool "Support SH7343 processor" 466 select CPU_SH4AL_DSP 467 select ARCH_SHMOBILE 468 select SYS_SUPPORTS_SH_CMT 469 470config CPU_SUBTYPE_SH7722 471 bool "Support SH7722 processor" 472 select CPU_SH4AL_DSP 473 select CPU_SHX2 474 select ARCH_SHMOBILE 475 select SYS_SUPPORTS_SH_CMT 476 select PINCTRL 477 478config CPU_SUBTYPE_SH7366 479 bool "Support SH7366 processor" 480 select CPU_SH4AL_DSP 481 select CPU_SHX2 482 select ARCH_SHMOBILE 483 select SYS_SUPPORTS_SH_CMT 484 485endchoice 486 487source "arch/sh/mm/Kconfig" 488 489source "arch/sh/Kconfig.cpu" 490 491source "arch/sh/boards/Kconfig" 492 493menu "Timer and clock configuration" 494 495config SH_PCLK_FREQ 496 int "Peripheral clock frequency (in Hz)" 497 depends on SH_CLK_CPG_LEGACY 498 default "31250000" if CPU_SUBTYPE_SH7619 499 default "33333333" if CPU_SUBTYPE_SH7770 || \ 500 CPU_SUBTYPE_SH7760 || \ 501 CPU_SUBTYPE_SH7705 || \ 502 CPU_SUBTYPE_SH7203 || \ 503 CPU_SUBTYPE_SH7206 || \ 504 CPU_SUBTYPE_SH7263 || \ 505 CPU_SUBTYPE_MXG 506 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 507 default "50000000" 508 help 509 This option is used to specify the peripheral clock frequency. 510 This is necessary for determining the reference clock value on 511 platforms lacking an RTC. 512 513config SH_CLK_CPG 514 def_bool y 515 516config SH_CLK_CPG_LEGACY 517 depends on SH_CLK_CPG 518 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ 519 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ 520 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ 521 !CPU_SUBTYPE_SH7269 522 523endmenu 524 525menu "CPU Frequency scaling" 526source "drivers/cpufreq/Kconfig" 527endmenu 528 529source "arch/sh/drivers/Kconfig" 530 531endmenu 532 533menu "Kernel features" 534 535source "kernel/Kconfig.hz" 536 537config ARCH_SUPPORTS_KEXEC 538 def_bool MMU 539 540config ARCH_SUPPORTS_CRASH_DUMP 541 def_bool BROKEN_ON_SMP 542 543config ARCH_DEFAULT_CRASH_DUMP 544 def_bool y 545 546config ARCH_SUPPORTS_KEXEC_JUMP 547 def_bool y 548 549config PHYSICAL_START 550 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 551 default MEMORY_START 552 help 553 This gives the physical address where the kernel is loaded 554 and is ordinarily the same as MEMORY_START. 555 556 Different values are primarily used in the case of kexec on panic 557 where the fail safe kernel needs to run at a different address 558 than the panic-ed kernel. 559 560config SMP 561 bool "Symmetric multi-processing support" 562 depends on SYS_SUPPORTS_SMP 563 help 564 This enables support for systems with more than one CPU. If you have 565 a system with only one CPU, say N. If you have a system with more 566 than one CPU, say Y. 567 568 If you say N here, the kernel will run on uni- and multiprocessor 569 machines, but will use only one CPU of a multiprocessor machine. If 570 you say Y here, the kernel will run on many, but not all, 571 uniprocessor machines. On a uniprocessor machine, the kernel 572 will run faster if you say N here. 573 574 People using multiprocessor machines who say Y here should also say 575 Y to "Enhanced Real Time Clock Support", below. 576 577 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO 578 available at <https://www.tldp.org/docs.html#howto>. 579 580 If you don't know what to do here, say N. 581 582config NR_CPUS 583 int "Maximum number of CPUs (2-32)" 584 range 2 32 585 depends on SMP 586 default "4" if CPU_SUBTYPE_SHX3 587 default "2" 588 help 589 This allows you to specify the maximum number of CPUs which this 590 kernel will support. The maximum supported value is 32 and the 591 minimum value which makes sense is 2. 592 593 This is purely to save memory - each supported CPU adds 594 approximately eight kilobytes to the kernel image. 595 596config HOTPLUG_CPU 597 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 598 depends on SMP 599 help 600 Say Y here to experiment with turning CPUs off and on. CPUs 601 can be controlled through /sys/devices/system/cpu. 602 603config GUSA 604 def_bool y 605 depends on !SMP 606 help 607 This enables support for gUSA (general UserSpace Atomicity). 608 This is the default implementation for both UP and non-ll/sc 609 CPUs, and is used by the libc, amongst others. 610 611 For additional information, design information can be found 612 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. 613 614 This should only be disabled for special cases where alternate 615 atomicity implementations exist. 616 617config GUSA_RB 618 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" 619 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) 620 help 621 Enabling this option will allow the kernel to implement some 622 atomic operations using a software implementation of load-locked/ 623 store-conditional (LLSC). On machines which do not have hardware 624 LLSC, this should be more efficient than the other alternative of 625 disabling interrupts around the atomic sequence. 626 627config HW_PERF_EVENTS 628 bool "Enable hardware performance counter support for perf events" 629 depends on PERF_EVENTS && CPU_HAS_PMU 630 default y 631 help 632 Enable hardware performance counter support for perf events. If 633 disabled, perf events will use software events only. 634 635source "drivers/sh/Kconfig" 636 637endmenu 638 639menu "Boot options" 640 641config BUILTIN_DTB 642 bool "Use builtin DTB" 643 default n 644 depends on SH_DEVICE_TREE 645 select GENERIC_BUILTIN_DTB 646 help 647 Link a device tree blob for particular hardware into the kernel, 648 suppressing use of the DTB pointer provided by the bootloader. 649 This option should only be used with legacy bootloaders that are 650 not capable of providing a DTB to the kernel, or for experimental 651 hardware without stable device tree bindings. 652 653config BUILTIN_DTB_NAME 654 string "Source file for builtin DTB" 655 default "" 656 depends on BUILTIN_DTB 657 help 658 Base name (without suffix, relative to arch/sh/boot/dts) for the 659 a DTS file that will be used to produce the DTB linked into the 660 kernel. 661 662config ZERO_PAGE_OFFSET 663 hex 664 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ 665 SH_7751_SOLUTION_ENGINE 666 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 667 default "0x00002000" if PAGE_SIZE_8KB 668 default "0x00001000" 669 help 670 This sets the default offset of zero page. 671 672config BOOT_LINK_OFFSET 673 hex 674 default "0x00210000" if SH_SHMIN 675 default "0x00810000" if SH_7780_SOLUTION_ENGINE 676 default "0x009e0000" if SH_TITAN 677 default "0x01800000" if SH_SDK7780 678 default "0x02000000" if SH_EDOSK7760 679 default "0x00800000" 680 help 681 This option allows you to set the link address offset of the zImage. 682 This can be useful if you are on a board which has a small amount of 683 memory. 684 685config ENTRY_OFFSET 686 hex 687 default "0x00001000" if PAGE_SIZE_4KB 688 default "0x00002000" if PAGE_SIZE_8KB 689 default "0x00004000" if PAGE_SIZE_16KB 690 default "0x00010000" if PAGE_SIZE_64KB 691 default "0x00000000" 692 693config ROMIMAGE_MMCIF 694 bool "Include MMCIF loader in romImage (EXPERIMENTAL)" 695 depends on CPU_SUBTYPE_SH7724 696 help 697 Say Y here to include experimental MMCIF loading code in 698 romImage. With this enabled it is possible to write the romImage 699 kernel image to an MMC card and boot the kernel straight from 700 the reset vector. At reset the processor Mask ROM will load the 701 first part of the romImage which in turn loads the rest the kernel 702 image to RAM using the MMCIF hardware block. 703 704choice 705 prompt "Kernel command line" 706 default CMDLINE_OVERWRITE 707 help 708 Setting this option allows the kernel command line arguments 709 to be set. 710 711config CMDLINE_OVERWRITE 712 bool "Overwrite bootloader kernel arguments" 713 help 714 Given string will overwrite any arguments passed in by 715 a bootloader. 716 717config CMDLINE_EXTEND 718 bool "Extend bootloader kernel arguments" 719 help 720 Given string will be concatenated with arguments passed in 721 by a bootloader. 722 723config CMDLINE_FROM_BOOTLOADER 724 bool "Use bootloader kernel arguments" 725 help 726 Uses the command-line options passed by the boot loader. 727 728endchoice 729 730config CMDLINE 731 string "Kernel command line arguments string" 732 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND 733 default "console=ttySC1,115200" 734 735endmenu 736 737menu "Bus options" 738 739config MAPLE 740 bool "Maple Bus support" 741 depends on SH_DREAMCAST 742 help 743 The Maple Bus is SEGA's serial communication bus for peripherals 744 on the Dreamcast. Without this bus support you won't be able to 745 get your Dreamcast keyboard etc to work, so most users 746 probably want to say 'Y' here, unless you are only using the 747 Dreamcast with a serial line terminal or a remote network 748 connection. 749 750endmenu 751 752menu "Power management options (EXPERIMENTAL)" 753 754source "kernel/power/Kconfig" 755 756source "drivers/cpuidle/Kconfig" 757 758endmenu 759