Home
last modified time | relevance | path

Searched full:eyeq (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/reset/
H A DKconfig98 bool "Mobileye EyeQ reset controller"
99 depends on EYEQ || COMPILE_TEST
101 default EYEQ
103 This enables the Mobileye EyeQ reset controller, used in EyeQ5, EyeQ6L
H A DMakefile19 obj-$(CONFIG_RESET_EYEQ) += reset-eyeq.o
H A Dreset-eyeq.c17 * We use eqr_ as prefix, as-in "EyeQ Reset", but way shorter.
/linux/drivers/clk/
H A DKconfig238 bool "Clock driver for the Mobileye EyeQ platform"
239 depends on EYEQ || COMPILE_TEST
241 default EYEQ
H A Dclk-eyeq.c3 * PLL clock driver for the Mobileye EyeQ platforms.
14 * We use eqc_ as prefix, as-in "EyeQ Clock", but way shorter.
23 #define pr_fmt(fmt) "clk-eyeq: " fmt
166 * All Mobileye EyeQ SoC have 64 bits long, but both factors (mult and div)
1206 .name = "clk-eyeq",
H A DMakefile71 obj-$(CONFIG_COMMON_CLK_EYEQ) += clk-eyeq.o
/linux/Documentation/devicetree/bindings/i2c/
H A Dst,nomadik-i2c.yaml58 # Clock name in DB8500 or EyeQ
H A Dsnps,designware-i2c.yaml35 - description: Mobileye EyeQ DesignWare I2C controller
/linux/drivers/pinctrl/
H A Dpinctrl-eyeq5.c703 /* Get match data based on parent OF node set in clk-eyeq */ in eq5p_probe()
/linux/
H A DMAINTAINERS18340 F: arch/mips/configs/eyeq*_defconfig
18342 F: drivers/clk/clk-eyeq.c
18345 F: drivers/reset/reset-eyeq.c