| #
f4b369c6 |
| 20-Apr-2026 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge branch 'next' into for-linus
Prepare input updates for 7.1 merge window.
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|
Revision tags: v7.0, v7.0-rc7, v7.0-rc6, v7.0-rc5, v7.0-rc4 |
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| #
0421ccdf |
| 12-Mar-2026 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge tag 'v7.0-rc3' into next
Sync up with the mainline to brig up the latest changes, specifically changes to ALPS driver.
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| #
4ee64205 |
| 21-Apr-2026 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "We've finally gotten rid of the struct clk_ops::round_rate() code after m
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "We've finally gotten rid of the struct clk_ops::round_rate() code after months of effort from Brian Masney. Now the only option is to use determine_rate(), which is good because that takes a struct argument instead of just a couple unsigned longs, allowing us to easily modify the way we determine and set rates in the clk tree.
Beyond that core framework change we've got the typical pile of new SoC clk driver additions, fixes for clk data and/or adding missing clks because the consumer driver using those clks wasn't ready, etc. The usual suspects are all here: Qualcomm, Samsung, Mediatek, and Rockchip along with some newcomers making RISC-V SoCs like ESWIN's eic700 and Tenstorrent's Atlantis. The clk driver side of this looks pretty normal.
Core: - Remove the round_rate() clk op (yay!)
New Drivers: - ESWIN eic700 SoC clk support - Econet EN751221 SoC clock/reset support - Global TCSR, RPMh, and display clock controller support for the Qualcomm Eliza platform - TCSR, the multiple global, and the RPMh clock controller support for the Qualcomm Nord platform - GPU clock controller support for Qualcomm SM8750 - Video and GPU clock controller support for Qualcomm Glymur - Global clock controller support for Qualcomm IPQ5210 - Axis ARTPEC-9: Add new PLL clocks and new drivers for eight clock controllers on the SoC - ExynosAutov920: Add G3D (GPU) clock controller - Clock driver for the Rockchip RV1103B SoC - Initial support for the Renesas RZ/G3L (R9A08G046) SoC - Clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (132 commits) clk: visconti: pll: initialize clk_init_data to zero clk: fsl-sai: Add MCLK generation support clk: fsl-sai: Extract clock setup into fsl_sai_clk_register() dt-bindings: clock: fsl-sai: Document clock-cells = <1> support clk: fsl-sai: Add i.MX8M support with 8 byte register offset clk: fsl-sai: Sort the headers dt-bindings: clock: fsl-sai: Document i.MX8M support clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC clk: qcom: rpmh: Add support for Nord rpmh clocks clk: qcom: Add TCSR clock driver for Nord SoC dt-bindings: clock: qcom: Add Nord Global Clock Controller dt-bindings: clock: qcom-rpmhcc: Add support for Nord SoCs dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller clk: qcom: gcc-x1e80100: Keep GCC USB QTB clock always ON clk: qcom: Constify list of critical CBCR registers clk: qcom: Constify qcom_cc_driver_data clk: qcom: videocc-glymur: Constify qcom_cc_desc clk: qcom: Add a driver for SM8750 GPU clocks dt-bindings: clock: qcom: Add SM8750 GPU clocks clk: qcom: ipq-cmn-pll: Add IPQ8074 SoC support ...
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| #
d730905b |
| 17-Apr-2026 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- Support for Mobileye EyeQ6Lplus
- Cleanups and fixes
* tag 'mips_7
Merge tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- Support for Mobileye EyeQ6Lplus
- Cleanups and fixes
* tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits) MIPS/mtd: Handle READY GPIO in generic NAND platform data MIPS/input: Move RB532 button to GPIO descriptors MIPS: validate DT bootargs before appending them MIPS: Alchemy: Remove unused forward declaration MAINTAINERS: Mobileye: Add EyeQ6Lplus files MIPS: config: add eyeq6lplus_defconfig MIPS: Add Mobileye EyeQ6Lplus evaluation board dts MIPS: Add Mobileye EyeQ6Lplus SoC dtsi clk: eyeq: Add Mobileye EyeQ6Lplus OLB clk: eyeq: Adjust PLL accuracy computation clk: eyeq: Skip post-divisor when computing PLL frequency pinctrl: eyeq5: Add Mobileye EyeQ6Lplus OLB pinctrl: eyeq5: Use match data reset: eyeq: Add Mobileye EyeQ6Lplus OLB MIPS: Add Mobileye EyeQ6Lplus support dt-bindings: soc: mobileye: Add EyeQ6Lplus OLB dt-bindings: mips: Add Mobileye EyeQ6Lplus SoC MIPS: dts: loongson64g-package: Switch to Loongson UART driver mips: pci-mt7620: rework initialization procedure mips: pci-mt7620: add more register init values ...
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| #
31b43c07 |
| 17-Apr-2026 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann: "The driver updates again are all over the place with many minor fix
Merge tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann: "The driver updates again are all over the place with many minor fixes going into platform specific code. The most notable changes are:
- Support for Microchip pic64gx system controllers - Work on cleaning up devicetree bindings for SoC drivers, and converting them into the new format - Lots of smaller changes for Qualcomm SoC drivers, including support for a number of newly supported chips - reset controller API cleanups and a new driver for Cix Sky1 - Reworks of the Tegra PMC and CBB drivers, along with a change to how individual Tegra SoCs get selected in Kconfig and BPMP firmware driver updates including a refresh of the ABI header to match the version used by firmware - STM32 updates to the firewall bus driver and support for the debug bus through OP-TEE - SCMI firmware driver improvements for reliability, in particular for dealing with broken firmware interrupts - Memory driver updates for Tegra, and a patch to remove the unused Baikal T1 driver"
* tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (193 commits) firmware: arm_ffa: Use the correct buffer size during RXTX_MAP firmware: qcom: scm: Allow QSEECOM on Lenovo IdeaCentre Mini X clk: spear: fix resource leak in clk_register_vco_pll() reset: rzv2h-usb2phy: Add support for VBUS mux controller registration reset: rzv2h-usb2phy: Convert to regmap API dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/G3E USB2PHY reset dt-bindings: reset: renesas,rzv2h-usb2phy: Add '#mux-state-cells' property soc: microchip: add mpfs gpio interrupt mux driver dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux gpio: mpfs: Add interrupt support soc: qcom: ubwc: add helpers to get programmable values soc: qcom: ubwc: add helper to get min_acc length firmware: qcom: scm: Register gunyah watchdog device soc: qcom: socinfo: Add SoC ID for SA8650P dt-bindings: arm: qcom,ids: Add SoC ID for SA8650P firmware: qcom: scm: Allow QSEECOM on Mahua CRD soc: qcom: wcnss: simplify allocation of req soc: qcom: pd-mapper: Add support for Eliza soc: qcom: aoss: compare against normalized cooling state soc: qcom: llcc: fix v1 SB syndrome register offset ...
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| #
522a83ab |
| 16-Apr-2026 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-tenstorrent', 'clk-rockchip', 'clk-imx' and 'clk-allwinner' into clk-next
* clk-tenstorrent: clk: tenstorrent: Add Atlantis clock controller driver reset: tenstorrent: Add re
Merge branches 'clk-tenstorrent', 'clk-rockchip', 'clk-imx' and 'clk-allwinner' into clk-next
* clk-tenstorrent: clk: tenstorrent: Add Atlantis clock controller driver reset: tenstorrent: Add reset controller for Atlantis dt-bindings: clk: tenstorrent: Add tenstorrent,atlantis-prcm-rcpu
* clk-rockchip: clk: rockchip: rk3568: Add PCIe pipe clock gates clk: rockchip: Add clock controller for the RV1103B dt-bindings: clock: rockchip: Add RV1103B CRU support
* clk-imx: clk: imx8mq: Correct the CSI PHY sels clk: vf610: Add support for the Ethernet switch clocks dt-bindings: clock: vf610: Add definitions for MTIP L2 switch dt-bindings: clock: vf610: Drop VF610_CLK_END define clk: vf610: Move VF610_CLK_END define to clk-vf610 driver clk: imx: imx8-acm: fix flags for acm clocks clk: imx: imx6q: Fix device node reference leak in of_assigned_ldb_sels() clk: imx: imx6q: Fix device node reference leak in pll6_bypassed() clk: imx: fracn-gppll: Add 477.4MHz support clk: imx: fracn-gppll: Add 333.333333 MHz support clk: imx: pll14xx: Use unsigned format specifier dt-bindings: clock: imx6q[ul]-clock: add optional clock enet[1]_ref_pad
* clk-allwinner: clk: sunxi-ng: sun55i-a523-r: Add missing r-spi module clock
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| #
36cab4bd |
| 16-Mar-2026 |
Benoît Monin <benoit.monin@bootlin.com> |
reset: eyeq: Add Mobileye EyeQ6Lplus OLB
Declare the two reset domains found in the EyeQ6Lplus OLB and add them to the data matched by 'mobileye,eyeq6lplus-olb' compatible.
Those reset domains are
reset: eyeq: Add Mobileye EyeQ6Lplus OLB
Declare the two reset domains found in the EyeQ6Lplus OLB and add them to the data matched by 'mobileye,eyeq6lplus-olb' compatible.
Those reset domains are identical to those present in the EyeQ5 OLB, so no changes are needed to support them.
Also select reset-eyeq for all EYEQ SoCs instead of listing each one individually, as it is needed by all Mobileye EyeQ SoC.
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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| #
5aa81ab2 |
| 12-Apr-2026 |
Stephen Boyd <sboyd@kernel.org> |
Merge tag 'tenstorrent-clk-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux into clk-tenstorrent
Pull Tenstorrent clk driver updates from Drew Fustini:
- Clock and rese
Merge tag 'tenstorrent-clk-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux into clk-tenstorrent
Pull Tenstorrent clk driver updates from Drew Fustini:
- Clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC
* tag 'tenstorrent-clk-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux: clk: tenstorrent: Add Atlantis clock controller driver reset: tenstorrent: Add reset controller for Atlantis dt-bindings: clk: tenstorrent: Add tenstorrent,atlantis-prcm-rcpu
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| #
fbf57f25 |
| 02-Apr-2026 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'reset-for-v7.1' of https://git.pengutronix.de/git/pza/linux into soc/drivers
Reset controller updates for v7.1
* Rework the reset core to support firmware nodes, add more fine grained
Merge tag 'reset-for-v7.1' of https://git.pengutronix.de/git/pza/linux into soc/drivers
Reset controller updates for v7.1
* Rework the reset core to support firmware nodes, add more fine grained locking, and use guard() helpers. * Change the reset-gpio driver to use firmware nodes. * Add support for the Cix Sky1 SoC reset controller. * Add support for the RZ/G3E SoC to the reset-rzv2h-usb2phy driver and convert it to regmap. Prepare registering a VBUS mux controller. * Replace use of the deprecated register_restart_handler() function in the ath79, intel-gw, lpc18xx, ma35d1, npcm, and sunplus reset drivers. * Combine two allocations into one in the sti/reset-syscfg driver. * Fix the reset-rzg2l-usbphy-ctrl MODULE_AUTHOR email. * Fix the reset_control_rearm() kerneldoc comment.
The last commit is a merge of reset-fixes-for-v7.0-2 into reset/next, to solve a merge conflict between commits a9b95ce36de4 ("reset: gpio: add a devlink between reset-gpio and its consumer") and fbffb8c7c7bb ("reset: gpio: fix double free in reset_add_gpio_aux_device() error path").
* tag 'reset-for-v7.1' of https://git.pengutronix.de/git/pza/linux: (35 commits) reset: rzv2h-usb2phy: Add support for VBUS mux controller registration reset: rzv2h-usb2phy: Convert to regmap API dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/G3E USB2PHY reset dt-bindings: reset: renesas,rzv2h-usb2phy: Add '#mux-state-cells' property reset: core: Drop unnecessary double quote reset: rzv2h-usb2phy: Keep PHY clock enabled for entire device lifetime reset: spacemit: k3: Decouple composite reset lines reset: gpio: fix double free in reset_add_gpio_aux_device() error path reset: rzg2l-usbphy-ctrl: Fix malformed MODULE_AUTHOR string reset: sti: kzalloc + kcalloc to kzalloc reset: don't overwrite fwnode_reset_n_cells reset: core: Fix indentation reset: add Sky1 soc reset support dt-bindings: soc: cix: document the syscon on Sky1 SoC reset: gpio: make the driver fwnode-agnostic reset: convert reset core to using firmware nodes reset: convert the core API to using firmware nodes reset: convert of_reset_control_get_count() to using firmware nodes reset: protect struct reset_control with its own mutex reset: protect struct reset_controller_dev with its own mutex ...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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| #
f62fcdf8 |
| 01-Apr-2026 |
Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> |
reset: rzv2h-usb2phy: Add support for VBUS mux controller registration
The RZ/V2H USB2 PHY requires control of the VBUS selection line (VBENCTL) through a mux controller described in the device tree
reset: rzv2h-usb2phy: Add support for VBUS mux controller registration
The RZ/V2H USB2 PHY requires control of the VBUS selection line (VBENCTL) through a mux controller described in the device tree as "mux-controller". This change adds support for registering the rzv2h-usb-vbenctl auxiliary driver during probe.
This enables proper management of USB2.0 VBUS source selection on platforms using the RZ/V2H SoC.
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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| #
890628c8 |
| 01-Apr-2026 |
Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> |
reset: rzv2h-usb2phy: Convert to regmap API
Replace raw MMIO accesses (readl/writel) with regmap_read() and regmap_multi_reg_write() via devm_regmap_init_mmio(). Drop the manual spinlock as regmap p
reset: rzv2h-usb2phy: Convert to regmap API
Replace raw MMIO accesses (readl/writel) with regmap_read() and regmap_multi_reg_write() via devm_regmap_init_mmio(). Drop the manual spinlock as regmap provides internal locking.
Replace the custom rzv2h_usb2phy_regval struct with the standard reg_sequence, and encode assert/deassert sequences as reg_sequence arrays rather than individual scalar fields in the of_data descriptor.
Use the reg_sequence .delay_us field to encode the 11 µs post-assert delay, replacing the explicit usleep_range(11, 20) call in rzv2h_usbphy_reset_assert().
Select REGMAP_MMIO in Kconfig.
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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| #
42d3b66d |
| 12-Mar-2026 |
Matthew Brost <matthew.brost@intel.com> |
Merge drm/drm-next into drm-xe-next
Backmerging to bring in 7.00-rc3. Important ahead GPU SVM merging THP support.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
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Revision tags: v7.0-rc3 |
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| #
89b23af1 |
| 06-Mar-2026 |
Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com> |
reset: tenstorrent: Add reset controller for Atlantis
Adds Atlantis Reset Controller driver, which shares the same regmap as prcm ( clock controller).
This version of the reset controller driver co
reset: tenstorrent: Add reset controller for Atlantis
Adds Atlantis Reset Controller driver, which shares the same regmap as prcm ( clock controller).
This version of the reset controller driver covers resets from the RCPU prcm.
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com> Reviewed-by: Drew Fustini <fustini@kernel.org> Signed-off-by: Drew Fustini <fustini@kernel.org>
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| #
7cd3ca90 |
| 02-Mar-2026 |
Gary Yang <gary.yang@cixtech.com> |
reset: add Sky1 soc reset support
Add support for the resets on Cix's Sky1 SoC. There are two reset controllers on Cix Sky1 Soc. One is located in S0 domain, and the other is located in S5 domain.
reset: add Sky1 soc reset support
Add support for the resets on Cix's Sky1 SoC. There are two reset controllers on Cix Sky1 Soc. One is located in S0 domain, and the other is located in S5 domain.
Signed-off-by: Gary Yang <gary.yang@cixtech.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Revision tags: v7.0-rc2 |
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| #
f09812b8 |
| 25-Feb-2026 |
Jani Nikula <jani.nikula@intel.com> |
Merge drm/drm-next into drm-intel-next
Sync with v7.0-rc1 which contains a few treewide changes affecting i915.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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| #
8b85987d |
| 23-Feb-2026 |
Maxime Ripard <mripard@kernel.org> |
Merge drm/drm-next into drm-misc-next
Let's merge 7.0-rc1 to start the new drm-misc-next window
Signed-off-by: Maxime Ripard <mripard@kernel.org>
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| #
c17ee635 |
| 23-Feb-2026 |
Maxime Ripard <mripard@kernel.org> |
Merge drm/drm-fixes into drm-misc-fixes
7.0-rc1 was just released, let's merge it to kick the new release cycle.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
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Revision tags: v7.0-rc1 |
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| #
bdbddf72 |
| 11-Feb-2026 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'soc-drivers-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann: "There are are a number of to firmware drivers, in particular the TE
Merge tag 'soc-drivers-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann: "There are are a number of to firmware drivers, in particular the TEE subsystem:
- a bus callback for TEE firmware that device drivers can register to
- sysfs support for tee firmware information
- minor updates to platform specific TEE drivers for AMD, NXP, Qualcomm and the generic optee driver
- ARM SCMI firmware refactoring to improve the protocol discover among other fixes and cleanups
- ARM FF-A firmware interoperability improvements
The reset controller and memory controller subsystems gain support for additional hardware platforms from Mediatek, Renesas, NXP, Canaan and SpacemiT.
Most of the other changes are for random drivers/soc code. Among a number of cleanups and newly added hardware support, including:
- Mediatek MT8196 DVFS power management and mailbox support
- Qualcomm SCM firmware and MDT loader refactoring, as part of the new Glymur platform support.
- NXP i.MX9 System Manager firmware support for accessing the syslog
- Minor updates for TI, Renesas, Samsung, Apple, Marvell and AMD SoCs"
* tag 'soc-drivers-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (171 commits) bus: fsl-mc: fix an error handling in fsl_mc_device_add() reset: spacemit: Add SpacemiT K3 reset driver reset: spacemit: Extract common K1 reset code reset: Create subdirectory for SpacemiT drivers dt-bindings: soc: spacemit: Add K3 reset support and IDs reset: canaan: k230: drop OF dependency and enable by default reset: rzg2l-usbphy-ctrl: Add suspend/resume support reset: rzg2l-usbphy-ctrl: Propagate the return value of regmap_field_update_bits() reset: gpio: check the return value of gpiod_set_value_cansleep() reset: imx8mp-audiomix: Support i.MX8ULP SIM LPAV reset: imx8mp-audiomix: Extend the driver usage reset: imx8mp-audiomix: Switch to using regmap API reset: imx8mp-audiomix: Drop unneeded macros soc: fsl: qe: qe_ports_ic: Consolidate chained IRQ handler install/remove soc: mediatek: mtk-cmdq: Add mminfra_offset adjustment for DRAM addresses soc: mediatek: mtk-cmdq: Extend cmdq_pkt_write API for SoCs without subsys ID soc: mediatek: mtk-cmdq: Add pa_base parsing for hardware without subsys ID support soc: mediatek: mtk-cmdq: Add cmdq_get_mbox_priv() in cmdq_pkt_create() mailbox: mtk-cmdq: Add driver data to support for MT8196 mailbox: mtk-cmdq: Add mminfra_offset configuration for DRAM transaction ...
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| #
ec496f77 |
| 09-Feb-2026 |
Jiri Kosina <jkosina@suse.com> |
Merge branch 'for-6.20/sony' into for-linus
- Support for Rock band 4 PS4 and PS5 guitars (Rosalie Wanders)
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Revision tags: v6.19, v6.19-rc8 |
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| #
a393bda1 |
| 29-Jan-2026 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'reset-for-v6.20' of https://git.pengutronix.de/git/pza/linux into soc/drivers
Reset controller updates for v6.20
* Add a compatible to the reset-gpio driver, suppress the sysfs bind at
Merge tag 'reset-for-v6.20' of https://git.pengutronix.de/git/pza/linux into soc/drivers
Reset controller updates for v6.20
* Add a compatible to the reset-gpio driver, suppress the sysfs bind attributes, and propagate GPIO API errors. * Add support for the i.MX8ULP SIM LPAV reset controller. * Add RZ/G3S USBPHY suspend/resume support. * Enable reset-k230 by default on ARCH_CANAAN * Add support for the SpacemiT K3 SoC reset controller. * Merge the 'spacemit-clkrst-v6.20-3' tag, shared with the clk tree, as a dependency for the SpacemiT changes.
* tag 'reset-for-v6.20' of https://git.pengutronix.de/git/pza/linux: reset: spacemit: Add SpacemiT K3 reset driver reset: spacemit: Extract common K1 reset code reset: Create subdirectory for SpacemiT drivers dt-bindings: soc: spacemit: Add K3 reset support and IDs reset: canaan: k230: drop OF dependency and enable by default reset: rzg2l-usbphy-ctrl: Add suspend/resume support reset: rzg2l-usbphy-ctrl: Propagate the return value of regmap_field_update_bits() reset: gpio: check the return value of gpiod_set_value_cansleep() reset: imx8mp-audiomix: Support i.MX8ULP SIM LPAV reset: imx8mp-audiomix: Extend the driver usage reset: imx8mp-audiomix: Switch to using regmap API reset: imx8mp-audiomix: Drop unneeded macros reset: gpio: suppress bind attributes in sysfs clk: spacemit: k3: extract common header reset: spacemit: fix auxiliary device id clk: spacemit: prepare common ccu header reset: gpio: add the "compatible" property
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v6.19-rc7 |
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2875b4b5 |
| 20-Jan-2026 |
Guodong Xu <guodong@riscstar.com> |
reset: Create subdirectory for SpacemiT drivers
Create a dedicated subdirectory for SpacemiT reset drivers to allow for better organization as support for more SoCs is added.
Move the existing K1 r
reset: Create subdirectory for SpacemiT drivers
Create a dedicated subdirectory for SpacemiT reset drivers to allow for better organization as support for more SoCs is added.
Move the existing K1 reset driver into this new directory and rename it to reset-spacemit-k1.c.
Rename the Kconfig symbol to RESET_SPACEMIT_K1 and update its default from ARCH_SPACEMIT to SPACEMIT_K1_CCU. The reset driver depends on the clock driver to register reset devices as an auxiliary device, so the default should reflect this dependency.
Also sort the drivers/reset/Kconfig entries alphabetically.
Reviewed-by: Alex Elder <elder@riscstar.com> Signed-off-by: Guodong Xu <guodong@riscstar.com> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://lore.kernel.org/spacemit/20260114092742-GYC7933267@gentoo.org/ [1] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Revision tags: v6.19-rc6 |
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| #
c7a5e01e |
| 17-Jan-2026 |
Junhui Liu <junhui.liu@pigmoral.tech> |
reset: canaan: k230: drop OF dependency and enable by default
The driver doesn't use any symbols depending on CONFIG_OF, so drop the dependency. Also, enable it by default when ARCH_CANAAN is select
reset: canaan: k230: drop OF dependency and enable by default
The driver doesn't use any symbols depending on CONFIG_OF, so drop the dependency. Also, enable it by default when ARCH_CANAAN is selected.
Fixes: 360a7a647759 ("reset: canaan: add reset driver for Kendryte K230") Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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cc4adab1 |
| 20-Jan-2026 |
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> |
Merge tag 'v6.19-rc1' into msm-next
Merge Linux 6.19-rc1 in order to catch up with other changes (e.g. UBWC config database defining UBWC_6).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.q
Merge tag 'v6.19-rc1' into msm-next
Merge Linux 6.19-rc1 in order to catch up with other changes (e.g. UBWC config database defining UBWC_6).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
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Revision tags: v6.19-rc5, v6.19-rc4, v6.19-rc3, v6.19-rc2 |
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5add3c3c |
| 19-Dec-2025 |
Thomas Hellström <thomas.hellstrom@linux.intel.com> |
Merge drm/drm-next into drm-xe-next
Backmerging to bring in 6.19-rc1. An important upstream bugfix and to help unblock PTL CI.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
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ec439c38 |
| 17-Dec-2025 |
Alexei Starovoitov <ast@kernel.org> |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf after 6.19-rc1
Cross-merge BPF and other fixes after downstream PR.
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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