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/freebsd/sys/powerpc/pseries/
H A Dplpar_iommu.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 #include <powerpc/pseries/phyp-hvcall.h>
55 static int papr_supports_stuff_tce = -1;
80 if (ofw_bus_has_prop(p, "ibm,my-dma-window")) in phyp_iommu_set_dma_tag()
82 if (ofw_bus_has_prop(p, "ibm,dma-window")) in phyp_iommu_set_dma_tag()
90 if (OF_getencprop(node, "ibm,#dma-size-cells", &dma_scells, in phyp_iommu_set_dma_tag()
92 OF_searchencprop(node, "#size-cells", &dma_scells, in phyp_iommu_set_dma_tag()
94 if (OF_getencprop(node, "ibm,#dma-address-cells", &dma_acells, in phyp_iommu_set_dma_tag()
96 OF_searchencprop(node, "#address-cells", &dma_acells, in phyp_iommu_set_dma_tag()
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/freebsd/sys/contrib/device-tree/Bindings/security/tpm/
H A Dibmvtpm.txt5 - compatible : property name that conveys the platform architecture
7 - device_type : specifies type of virtual device
8 - interrupts : property specifying the interrupt source number and
10 - ibm,my-drc-index : integer index for the connector between the device
11 and its parent - present only if Dynamic
13 - ibm,#dma-address-cells: specifies the number of cells that are used to
14 encode the physical address field of dma-window
16 - ibm,#dma-size-cells : specifies the number of cells that are used to
17 encode the size field of dma-window properties
18 - ibm,my-dma-window : specifies DMA window associated with this virtual
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/freebsd/sys/contrib/device-tree/Bindings/iommu/
H A Diommu.txt13 Example: 32-bit DMA to 64-bit physical addresses
15 * Implement scatter-gather at page level granularity so that the device does
18 * Provide system protection against "rogue" DMA by forcing all accesses to go
29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
30 typically have a fixed association to the master device, whereas multiple-
34 "dma-ranges" property that describes how the physical address space of the
35 IOMMU maps to memory. An empty "dma-ranges" property means that there is a
39 --------------------
40 - #iommu-cells: The number of cells in an IOMMU specifier needed to encode an
44 the specific IOMMU. Below are a few examples of typical use-cases:
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H A Dnvidia,tegra30-smmu.txt4 - compatible : "nvidia,tegra30-smmu"
5 - reg : Should contain 3 register banks(address and length) for each
7 - interrupts : Should contain MC General interrupt.
8 - nvidia,#asids : # of ASIDs
9 - dma-window : IOVA start address and length.
10 - nvidia,ahb : phandle to the ahb bus connected to SMMU.
14 compatible = "nvidia,tegra30-smmu";
19 dma-window = <0 0x40000000>; /* IOVA start & length */
H A Dsamsung,sysmmu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Szyprowski <m.szyprowski@samsung.com>
14 physical memory chunks visible as a contiguous region to DMA-capable peripheral
15 devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth.
20 another capabilities like L2 TLB or block-fetch buffers to minimize translation
32 * FIMD in Exynos5420 has one System MMU for window 0 and 4, the other system MMU
33 for window 1, 2 and 3.
42 const: samsung,exynos-sysmmu
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/freebsd/sys/arm/broadcom/bcm2835/
H A Dbcm2835_vcbus.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
58 * Master view" of the address space accessible by the DMA engine. Technically,
59 * we can slide this window around to whatever similarly sized range is
60 * convenient, but this is the most useful window given how busdma(9) works and
61 * that the window must be reconfigured for all channels in a given DMA engine.
62 * The DMA lite engine's window can be configured separately from the 30-bit DMA
H A Dbcm2838_pci.c1 /*-
2 * SPDX-License-Identifier: ISC
22 * BCM2838-compatible PCI-express controller.
95 * is 8 GiB). However, the system DMA controller is capable of accessing only a
96 * limited portion of the address space. Worse, the PCI-e controller has further
97 * constraints for DMA, and those limitations are not wholly clear to the
98 * author. NetBSD and Linux allow DMA on the lower 3 GiB of the physical memory,
99 * but experimentation shows DMA performed above 960 MiB results in data
108 #define REG_VALUE_DMA_WINDOW_LOW (MAX_MEMORY_LOG2 - 0xf)
112 (((MAX_MEMORY_LOG2 - 0xf) << 0x1b) | DMA_WINDOW_ENABLE)
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/freebsd/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra186-display.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^display-hub@[0-9a-f]+$"
19 - nvidia,tegra186-display
20 - nvidia,tegra194-display
22 '#address-cells':
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/freebsd/sys/dev/bhnd/bhndb/
H A Dbhndb.h1 /*-
50 * bhndb register window types.
55 BHNDB_REGWIN_T_DYN, /**< A dynamically configurable window */
69 * bhndb register window definition.
72 bhndb_regwin_type_t win_type; /**< window type */
73 bus_size_t win_offset; /**< offset of the window within the resource */
74 bus_size_t win_size; /**< size of the window */
83 /** Core-specific register window (BHNDB_REGWIN_T_CORE). */
93 /** SPROM register window (BHNDB_REGWIN_T_SPROM). */
96 /** Dynamic register window (BHNDB_REGWIN_T_DYN). */
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H A Dbhndb_subr.c1 /*-
2 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
50 * @param unit The device unit number, or -1 to select the next available unit
54 * @retval non-zero Failed to attach the bhndb device.
84 /* Skip non-allocated resources */ in bhndb_do_suspend_resources()
85 if (rle->res == NULL) in bhndb_do_suspend_resources()
88 BHNDB_SUSPEND_RESOURCE(device_get_parent(dev), dev, rle->type, in bhndb_do_suspend_resources()
89 rle->res); in bhndb_do_suspend_resources()
168 /* Skip non-allocated resources */ in bhnd_generic_br_resume_child()
169 if (rle->res == NULL) in bhnd_generic_br_resume_child()
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H A Dbhndb.c1 /*-
2 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
39 * a BHND-compatible bus (e.g. bcma or siba).
172 (unsigned long long) sc->chipid.enum_addr); in bhndb_child_location()
188 for (u_int i = 0; i < hw->num_hw_reqs; i++) { in bhndb_hw_matches()
192 match = &hw->hw_reqs[i]; in bhndb_hw_matches()
198 if (BHNDB_IS_CORE_DISABLED(sc->dev, sc->bus_dev, core)) in bhndb_hw_matches()
225 * priorities of per-core port resources.
255 for (regw = br->cf in bhndb_init_region_cfg()
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H A Dbhndb_pci_hwdata.c1 /*-
33 * configured as PCI-BHND bridges.
74 * Generic PCI-SIBA bridge configuration usable with all known siba(4)-based
79 * - Compatible with PCI_V0, PCI_V1, PCI_V2, and PCI_V3 devices.
80 * - Compatible with siba(4) bus enumeration.
81 * - Compatible with bcma(4) bus enumeration if the ChipCommon core is mapped
87 { -1, 0, 0 }
91 /* bar0+0x0000: configurable backplane window */
104 /* DMA unsupported under generic configuration */
109 * Generic PCI-BCMA bridge configuration usable with all known bcma(4)-based
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/freebsd/sys/dev/ntb/
H A Dntb.h1 /*-
41 * ntb_link_event() - notify driver context of a change in link status
50 * ntb_db_event() - notify driver context of a doorbell event
65 * ntb_port_number() - get the local port number
75 * ntb_port_count() - get the number of peer device ports
85 * ntb_peer_port_number() - get the peer port by given index
97 * ntb_peer_port_idx() - get the peer device port index by given port
110 * ntb_link_is_up() - get the current ntb link state
112 * @speed: OUT - The link speed expressed as PCIe generation number
113 * @width: OUT - The link width expressed as the number of PCIe lanes
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/freebsd/share/man/man9/
H A Dbus_dma.980 .Nd Bus and Machine Independent DMA Mapping Interface
163 Direct Memory Access (DMA) is a method of transferring data
165 A DMA transaction can be achieved between device to memory,
170 API is a bus, device, and machine-independent (MI) interface to
179 is used to describe the properties of a group of related DMA
181 One way to view this is that a tag describes the limitations of a DMA engine.
182 For example, if a DMA engine in a device is limited to 32-bit addresses,
188 Some devices may require multiple tags to describe DMA
190 For example, a device might require 16-byte alignment of its descriptor ring
195 If a device has restrictions that are common to all DMA transactions
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/freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/
H A Dmsi-pic.txt4 - compatible : compatible list, may contain one or two entries
5 The first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572,
6 etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" or
7 "fsl,mpic-msi-v4.3" depending on the parent type and version. If mpic
9 provided to access these 16 registers, and compatible "fsl,mpic-msi-v4.3"
13 - reg : It may contain one or two regions. The first region should contain
19 - interrupts : each one of the interrupts here is one entry per 32 MSIs,
21 be set as edge sensitive. If msi-available-ranges is present, only
25 - msi-available-ranges: use <start count> style section to define which
33 - msi-address-64: 64-bit PCI address of the MSIIR register. The MSIIR register
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/freebsd/sys/dev/rtwn/rtl8192c/pci/
H A Dr92ce_reg.h3 /*-
64 #define R92C_IMR_ROK 0x00000001 /* receive DMA OK */
65 #define R92C_IMR_VODOK 0x00000002 /* AC_VO DMA OK */
66 #define R92C_IMR_VIDOK 0x00000004 /* AC_VI DMA OK */
67 #define R92C_IMR_BEDOK 0x00000008 /* AC_BE DMA OK */
68 #define R92C_IMR_BKDOK 0x00000010 /* AC_BK DMA OK */
70 #define R92C_IMR_MGNTDOK 0x00000040 /* management queue DMA OK */
72 #define R92C_IMR_HIGHDOK 0x00000100 /* high queue DMA OK */
73 #define R92C_IMR_BDOK 0x00000200 /* beacon queue DMA OK */
74 #define R92C_IMR_ATIMEND 0x00000400 /* ATIM window end interrupt */
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/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210reg.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2004 Atheros Communications, Inc.
24 * Processor for IEEE 802.11a 5-GHz Wireless LANs.
33 /* DMA Registers */
72 #define AR_SLOT_TIME 0x8010 /* Length of a back-off */
80 #define AR_TIMER1 0x8030 /* Next DMA beacon alert time */
82 #define AR_TIMER3 0x8038 /* Next ATIM window time */
98 #define AR_BACKOFF 0x8088 /* Back-off status */
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/freebsd/sys/dev/rtwn/rtl8188e/
H A Dr88e_reg.h1 /*-
3 * Copyright (c) 2015-2016 Andriy Voskoboinyk <avos@FreeBSD.org>
47 #define R88E_HIMR_ROK 0x00000001 /* receive DMA OK */
49 #define R88E_HIMR_VODOK 0x00000004 /* AC_VO DMA OK */
50 #define R88E_HIMR_VIDOK 0x00000008 /* AC_VI DMA OK */
51 #define R88E_HIMR_BEDOK 0x00000010 /* AC_BE DMA OK */
52 #define R88E_HIMR_BKDOK 0x00000020 /* AC_BK DMA OK */
53 #define R88E_HIMR_MGNTDOK 0x00000040 /* management queue DMA OK */
54 #define R88E_HIMR_HIGHDOK 0x00000080 /* high queue DMA OK */
59 #define R88E_HIMR_ATIMEND 0x00001000 /* ATIM window end interrupt */
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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linu
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/freebsd/sys/dev/ae/
H A Dif_aereg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
55 #define AE_ISR_DMAR_TIMEOUT 0x00000200 /* DMA read timeout. */
56 #define AE_ISR_DMAW_TIMEOUT 0x00000400 /* DMA write timeout. */
84 #define AE_EADDR0_REG 0x1488 /* 5 - 2 bytes */
85 #define AE_EADDR1_REG 0x148c /* 1 - 0 bytes */
89 * L2 supports 64-bit addressing but all rings base addresses
97 Should be 120-byte aligned (i.e.
99 have 128-byte alignment). */
100 #define AE_TXD_BUFSIZE_REG 0x1548 /* Size of TxD ring in 4-byte units.
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dv3-v360epc-pci.txt6 - compatible: should be one of:
7 "v3,v360epc-pci"
8 "arm,integrator-ap-pci", "v3,v360epc-pci"
9 - reg: should contain two register areas:
12 - interrupts: should contain a reference to the V3 error interrupt
14 - bus-range: see pci.txt
15 - ranges: this follows the standard PCI bindings in the IEEE Std
16 1275-1994 (see pci.txt) with the following restriction:
17 - The non-prefetchable and prefetchable memory windows must
19 - The prefetchable memory window must be immediately adjacent
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H A Dhost-generic-pci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
13 Firmware-initialised PCI host controllers and PCI emulations, such as the
14 virtio-pci implementations found in kvmtool and other para-virtualised
21 Configuration Space is assumed to be memory-mapped (as opposed to being
26 For CAM, this 24-bit offset is:
41 - description:
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/freebsd/sys/contrib/dev/iwlwifi/
H A Diwl-prph.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
105 * data) into one of up to 7 prioritized Tx DMA FIFO channels within the
106 * device. A queue maps to only one (selectable by driver) Tx DMA channe
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/freebsd/sys/dev/aacraid/
H A Daacraid_pci.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
7 * Copyright (c) 2001-2010 Adaptec, Inc.
8 * Copyright (c) 2010-2012 PMC-Sierra, Inc.
106 nitems(aacraid_family_identifiers) - 1);
118 for (m = aacraid_family_identifiers; m->vendor != 0; m++) { in aac_find_ident()
119 if ((m->vendor == vendid) && (m->device == devid)) in aac_find_ident()
137 device_set_desc(dev, id->desc); in aacraid_pci_probe()
161 sc->aac_dev = dev; in aacraid_pci_attach()
170 command = pci_read_config(sc->aac_dev, PCIR_COMMAND, 2); in aacraid_pci_attach()
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/freebsd/sys/dev/tws/
H A Dtws.h1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
93 #define TWS_MAX_32BIT_SG_ELEMENTS 93 /* max 32-bit sg elements */
94 #define TWS_MAX_64BIT_SG_ELEMENTS 46 /* max 64-bit sg elements */
202 /* ------------ boolean types ------------------- */
211 /* ----------- per instance data ---------------- */
213 /* The softc holds our per-instance data. */
224 struct resource *reg_res; /* register interface window */
225 struct resource *mfa_res; /* mfa interface window */
250 boolean is64bit; /* True - 64bit else 32bit */
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