xref: /freebsd/share/man/man9/bus_dma.9 (revision 7cb028deff6f46fbefa99f4f19882c69fd7cb883)
124503465SHiten Pandya.\" Copyright (c) 2002, 2003 Hiten M. Pandya.
224503465SHiten Pandya.\" All rights reserved.
324503465SHiten Pandya.\"
424503465SHiten Pandya.\" Redistribution and use in source and binary forms, with or without
524503465SHiten Pandya.\" modification, are permitted provided that the following conditions
624503465SHiten Pandya.\" are met:
724503465SHiten Pandya.\" 1. Redistributions of source code must retain the above copyright
824503465SHiten Pandya.\"    notice, this list of conditions, and the following disclaimer,
924503465SHiten Pandya.\"    without modification, immediately at the beginning of the file.
1024503465SHiten Pandya.\" 2. The name of the author may not be used to endorse or promote products
1124503465SHiten Pandya.\"    derived from this software without specific prior written permission.
1224503465SHiten Pandya.\"
1324503465SHiten Pandya.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1424503465SHiten Pandya.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1524503465SHiten Pandya.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1624503465SHiten Pandya.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR, CONTRIBUTORS OR THE
1724503465SHiten Pandya.\" VOICES IN HITEN PANDYA'S HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
1824503465SHiten Pandya.\" SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
1924503465SHiten Pandya.\" TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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2124503465SHiten Pandya.\" LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
2224503465SHiten Pandya.\" NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2324503465SHiten Pandya.\" SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2424503465SHiten Pandya.\"
2524503465SHiten Pandya.\" Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
2624503465SHiten Pandya.\" All rights reserved.
2724503465SHiten Pandya.\"
2824503465SHiten Pandya.\" This code is derived from software contributed to The NetBSD Foundation
2924503465SHiten Pandya.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
3024503465SHiten Pandya.\" NASA Ames Research Center.
3124503465SHiten Pandya.\"
3224503465SHiten Pandya.\" Redistribution and use in source and binary forms, with or without
3324503465SHiten Pandya.\" modification, are permitted provided that the following conditions
3424503465SHiten Pandya.\" are met:
3524503465SHiten Pandya.\" 1. Redistributions of source code must retain the above copyright
3624503465SHiten Pandya.\"    notice, this list of conditions and the following disclaimer.
3724503465SHiten Pandya.\" 2. Redistributions in binary form must reproduce the above copyright
3824503465SHiten Pandya.\"    notice, this list of conditions and the following disclaimer in the
3924503465SHiten Pandya.\"    documentation and/or other materials provided with the distribution.
4024503465SHiten Pandya.\"
4124503465SHiten Pandya.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
4224503465SHiten Pandya.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
4324503465SHiten Pandya.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
4424503465SHiten Pandya.\" PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
4524503465SHiten Pandya.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
4624503465SHiten Pandya.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
4724503465SHiten Pandya.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
4824503465SHiten Pandya.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
4924503465SHiten Pandya.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
5024503465SHiten Pandya.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
5124503465SHiten Pandya.\" POSSIBILITY OF SUCH DAMAGE.
5224503465SHiten Pandya.\" $NetBSD: bus_dma.9,v 1.25 2002/10/14 13:43:16 wiz Exp $
5324503465SHiten Pandya.\"
549c0e3d3aSJohn Baldwin.Dd May 25, 2020
5524503465SHiten Pandya.Dt BUS_DMA 9
5624503465SHiten Pandya.Os
5724503465SHiten Pandya.Sh NAME
5824503465SHiten Pandya.Nm bus_dma ,
5924503465SHiten Pandya.Nm bus_dma_tag_create ,
6024503465SHiten Pandya.Nm bus_dma_tag_destroy ,
61757d4fbaSScott Long.Nm bus_dma_template_init ,
62757d4fbaSScott Long.Nm bus_dma_template_tag ,
63757d4fbaSScott Long.Nm bus_dma_template_clone ,
64e18eb7b1SScott Long.Nm bus_dma_template_fill ,
65e18eb7b1SScott Long.Nm BUS_DMA_TEMPLATE_FILL ,
6624503465SHiten Pandya.Nm bus_dmamap_create ,
6724503465SHiten Pandya.Nm bus_dmamap_destroy ,
6824503465SHiten Pandya.Nm bus_dmamap_load ,
69a073133cSJim Harris.Nm bus_dmamap_load_bio ,
70a073133cSJim Harris.Nm bus_dmamap_load_ccb ,
71c0341432SJohn Baldwin.Nm bus_dmamap_load_crp ,
729c0e3d3aSJohn Baldwin.Nm bus_dmamap_load_crp_buffer ,
7324503465SHiten Pandya.Nm bus_dmamap_load_mbuf ,
74824f4edfSScott Long.Nm bus_dmamap_load_mbuf_sg ,
7524503465SHiten Pandya.Nm bus_dmamap_load_uio ,
7624503465SHiten Pandya.Nm bus_dmamap_unload ,
7724503465SHiten Pandya.Nm bus_dmamap_sync ,
7824503465SHiten Pandya.Nm bus_dmamem_alloc ,
79a1bd700aSHiten Pandya.Nm bus_dmamem_free
8024503465SHiten Pandya.Nd Bus and Machine Independent DMA Mapping Interface
8124503465SHiten Pandya.Sh SYNOPSIS
8224503465SHiten Pandya.In machine/bus.h
8324503465SHiten Pandya.Ft int
8424503465SHiten Pandya.Fn bus_dma_tag_create "bus_dma_tag_t parent" "bus_size_t alignment" \
855c8d3de0SJohn Baldwin"bus_addr_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \
8624503465SHiten Pandya"bus_dma_filter_t *filtfunc" "void *filtfuncarg" "bus_size_t maxsize" \
870e5f9b7dSScott Long"int nsegments" "bus_size_t maxsegsz" "int flags" "bus_dma_lock_t *lockfunc" \
880e5f9b7dSScott Long"void *lockfuncarg" "bus_dma_tag_t *dmat"
8924503465SHiten Pandya.Ft int
9024503465SHiten Pandya.Fn bus_dma_tag_destroy "bus_dma_tag_t dmat"
91757d4fbaSScott Long.Ft void
92757d4fbaSScott Long.Fo bus_dma_template_init
93e18eb7b1SScott Long.Fa "bus_dma_template_t *template"
94757d4fbaSScott Long.Fa "bus_dma_tag_t parent"
95757d4fbaSScott Long.Fc
96757d4fbaSScott Long.Ft int
97757d4fbaSScott Long.Fo bus_dma_template_tag
98e18eb7b1SScott Long.Fa "bus_dma_template_t *template"
99757d4fbaSScott Long.Fa "bus_dma_tag_t *dmat"
100757d4fbaSScott Long.Fc
101757d4fbaSScott Long.Ft void
102757d4fbaSScott Long.Fo bus_dma_template_clone
103e18eb7b1SScott Long.Fa "bus_dma_template_t *template"
104757d4fbaSScott Long.Fa "bus_dma_tag_t dmat"
105757d4fbaSScott Long.Fc
106e18eb7b1SScott Long.Ft void
107e18eb7b1SScott Long.Fo bus_dma_template_fill
108e18eb7b1SScott Long.Fa "bus_dma_template_t *template"
109e18eb7b1SScott Long.Fa "bus_dma_param_t params[]"
110e18eb7b1SScott Long.Fa "u_int count"
111e18eb7b1SScott Long.Fc
112e18eb7b1SScott Long.Fo BUS_DMA_TEMPLATE_FILL
113e18eb7b1SScott Long.Fa "bus_dma_template_t *template"
114e18eb7b1SScott Long.Fa "bus_dma_param_t param ..."
115e18eb7b1SScott Long.Fc
11624503465SHiten Pandya.Ft int
11724503465SHiten Pandya.Fn bus_dmamap_create "bus_dma_tag_t dmat" "int flags" "bus_dmamap_t *mapp"
11824503465SHiten Pandya.Ft int
11924503465SHiten Pandya.Fn bus_dmamap_destroy "bus_dma_tag_t dmat" "bus_dmamap_t map"
12024503465SHiten Pandya.Ft int
12124503465SHiten Pandya.Fn bus_dmamap_load "bus_dma_tag_t dmat" "bus_dmamap_t map" "void *buf" \
12224503465SHiten Pandya"bus_size_t buflen" "bus_dmamap_callback_t *callback" "void *callback_arg" \
12324503465SHiten Pandya"int flags"
12424503465SHiten Pandya.Ft int
125a073133cSJim Harris.Fn bus_dmamap_load_bio "bus_dma_tag_t dmat" "bus_dmamap_t map" \
126a073133cSJim Harris"struct bio *bio" "bus_dmamap_callback_t *callback" "void *callback_arg" \
127a073133cSJim Harris"int flags"
128a073133cSJim Harris.Ft int
129a073133cSJim Harris.Fn bus_dmamap_load_ccb "bus_dma_tag_t dmat" "bus_dmamap_t map" \
130a073133cSJim Harris"union ccb *ccb" "bus_dmamap_callback_t *callback" "void *callback_arg" \
131a073133cSJim Harris"int flags"
132a073133cSJim Harris.Ft int
133c0341432SJohn Baldwin.Fn bus_dmamap_load_crp "bus_dma_tag_t dmat" "bus_dmamap_t map" \
134c0341432SJohn Baldwin"struct crypto *crp" "bus_dmamap_callback_t *callback" "void *callback_arg" \
135c0341432SJohn Baldwin"int flags"
136c0341432SJohn Baldwin.Ft int
1379c0e3d3aSJohn Baldwin.Fn bus_dmamap_load_crp_buffer "bus_dma_tag_t dmat" "bus_dmamap_t map" \
1389c0e3d3aSJohn Baldwin"struct crypto_buffer *cb" "bus_dmamap_callback_t *callback" \
1399c0e3d3aSJohn Baldwin"void *callback_arg" "int flags"
1409c0e3d3aSJohn Baldwin.Ft int
14124503465SHiten Pandya.Fn bus_dmamap_load_mbuf "bus_dma_tag_t dmat" "bus_dmamap_t map" \
14224503465SHiten Pandya"struct mbuf *mbuf" "bus_dmamap_callback2_t *callback" "void *callback_arg" \
14324503465SHiten Pandya"int flags"
14424503465SHiten Pandya.Ft int
145824f4edfSScott Long.Fn bus_dmamap_load_mbuf_sg "bus_dma_tag_t dmat" "bus_dmamap_t map" \
146824f4edfSScott Long"struct mbuf *mbuf" "bus_dma_segment_t *segs" "int *nsegs" "int flags"
147824f4edfSScott Long.Ft int
14824503465SHiten Pandya.Fn bus_dmamap_load_uio "bus_dma_tag_t dmat" "bus_dmamap_t map" \
14924503465SHiten Pandya"struct uio *uio" "bus_dmamap_callback2_t *callback" "void *callback_arg" \
15024503465SHiten Pandya"int flags"
15124503465SHiten Pandya.Ft void
15224503465SHiten Pandya.Fn bus_dmamap_unload "bus_dma_tag_t dmat" "bus_dmamap_t map"
15324503465SHiten Pandya.Ft void
15424503465SHiten Pandya.Fn bus_dmamap_sync "bus_dma_tag_t dmat" "bus_dmamap_t map" \
15524503465SHiten Pandya"op"
156cbfef69cSWarner Losh.Ft int
157cbfef69cSWarner Losh.Fn bus_dmamem_alloc "bus_dma_tag_t dmat" "void **vaddr" \
158cbfef69cSWarner Losh"int flags" "bus_dmamap_t *mapp"
15924503465SHiten Pandya.Ft void
16024503465SHiten Pandya.Fn bus_dmamem_free "bus_dma_tag_t dmat" "void *vaddr" \
16124503465SHiten Pandya"bus_dmamap_t map"
16224503465SHiten Pandya.Sh DESCRIPTION
16324503465SHiten PandyaDirect Memory Access (DMA) is a method of transferring data
16424503465SHiten Pandyawithout involving the CPU, thus providing higher performance.
16524503465SHiten PandyaA DMA transaction can be achieved between device to memory,
16624503465SHiten Pandyadevice to device, or memory to memory.
16724503465SHiten Pandya.Pp
16824503465SHiten PandyaThe
16924503465SHiten Pandya.Nm
17024503465SHiten PandyaAPI is a bus, device, and machine-independent (MI) interface to
17124503465SHiten PandyaDMA mechanisms.
17224503465SHiten PandyaIt provides the client with flexibility and simplicity by
17324503465SHiten Pandyaabstracting machine dependent issues like setting up
17424503465SHiten PandyaDMA mappings, handling cache issues, bus specific features
17524503465SHiten Pandyaand limitations.
176306095b8SJohn Baldwin.Sh OVERVIEW
177306095b8SJohn BaldwinA tag structure
178306095b8SJohn Baldwin.Vt ( bus_dma_tag_t )
179306095b8SJohn Baldwinis used to describe the properties of a group of related DMA
180306095b8SJohn Baldwintransactions.
181306095b8SJohn BaldwinOne way to view this is that a tag describes the limitations of a DMA engine.
182306095b8SJohn BaldwinFor example, if a DMA engine in a device is limited to 32-bit addresses,
183306095b8SJohn Baldwinthat limitation is specified by a parameter when creating the tag
184306095b8SJohn Baldwinfor that device.
185306095b8SJohn BaldwinSimilarly, a tag can be marked as requiring buffers whose addresses are
186306095b8SJohn Baldwinaligned to a specific boundary.
187306095b8SJohn Baldwin.Pp
188306095b8SJohn BaldwinSome devices may require multiple tags to describe DMA
189306095b8SJohn Baldwintransactions with differing properties.
190306095b8SJohn BaldwinFor example, a device might require 16-byte alignment of its descriptor ring
191306095b8SJohn Baldwinwhile permitting arbitrary alignment of I/O buffers.
192306095b8SJohn BaldwinIn this case,
193306095b8SJohn Baldwinthe driver must create one tag for the descriptor ring and a separate tag for
194306095b8SJohn BaldwinI/O buffers.
195306095b8SJohn BaldwinIf a device has restrictions that are common to all DMA transactions
196306095b8SJohn Baldwinin addition to restrictions that differ between unrelated groups of
197306095b8SJohn Baldwintransactions,
198306095b8SJohn Baldwinthe driver can first create a
199306095b8SJohn Baldwin.Dq parent
200306095b8SJohn Baldwintag that decribes the common restrictions.
201306095b8SJohn BaldwinThe per-group tags can then inherit these restrictions from this
202306095b8SJohn Baldwin.Dq parent
203306095b8SJohn Baldwintag rather than having to list them explicitly when creating the per-group tags.
204306095b8SJohn Baldwin.Pp
205306095b8SJohn BaldwinA mapping structure
206306095b8SJohn Baldwin.Vt ( bus_dmamap_t )
207306095b8SJohn Baldwinrepresents a mapping of a memory region for DMA.
208306095b8SJohn BaldwinOn systems with I/O MMUs,
209306095b8SJohn Baldwinthe mapping structure tracks any I/O MMU entries used by a request.
210306095b8SJohn BaldwinFor DMA requests that require bounce pages,
211306095b8SJohn Baldwinthe mapping tracks the bounce pages used.
212306095b8SJohn Baldwin.Pp
213306095b8SJohn BaldwinTo prepare for one or more DMA transactions,
214306095b8SJohn Baldwina mapping must be bound to a memory region by calling one of the
215306095b8SJohn Baldwin.Fn bus_dmamap_load
216306095b8SJohn Baldwinfunctions.
217306095b8SJohn BaldwinThese functions configure the mapping which can include programming entries
218306095b8SJohn Baldwinin an I/O MMU and/or allocating bounce pages.
219306095b8SJohn BaldwinAn output of these functions
220306095b8SJohn Baldwin(either directly or indirectly by invoking a callback routine)
221306095b8SJohn Baldwinis the list of scatter/gather address ranges a consumer can pass to a DMA
222306095b8SJohn Baldwinengine to access the memory region.
223306095b8SJohn BaldwinWhen a mapping is no longer needed,
224306095b8SJohn Baldwinthe mapping must be unloaded via
225306095b8SJohn Baldwin.Fn bus_dmamap_unload .
226306095b8SJohn Baldwin.Pp
227306095b8SJohn BaldwinBefore and after each DMA transaction,
228306095b8SJohn Baldwin.Fn bus_dmamap_sync
229306095b8SJohn Baldwinmust be used to ensure that the correct data is used by the DMA engine and
230306095b8SJohn Baldwinthe CPU.
231306095b8SJohn BaldwinIf a mapping uses bounce pages,
232306095b8SJohn Baldwinthe sync operations copy data between the bounce pages and the memory region
233306095b8SJohn Baldwinbound to the mapping.
234306095b8SJohn BaldwinSync operations also handle architecture-specific details such as CPU cache
235306095b8SJohn Baldwinflushing and CPU memory operation ordering.
236306095b8SJohn Baldwin.Sh STATIC VS DYNAMIC
237306095b8SJohn Baldwin.Nm
238306095b8SJohn Baldwinhandles two types of DMA transactions: static and dynamic.
239306095b8SJohn BaldwinStatic transactions are used with a long-lived memory region that is reused
240306095b8SJohn Baldwinfor many transactions such as a descriptor ring.
241306095b8SJohn BaldwinDynamic transactions are used for transfers to or from transient buffers
242306095b8SJohn Baldwinsuch as I/O buffers holding a network packet or disk block.
243306095b8SJohn BaldwinEach transaction type uses a different subset of the
244306095b8SJohn Baldwin.Nm
245306095b8SJohn BaldwinAPI.
246306095b8SJohn Baldwin.Ss Static Transactions
247306095b8SJohn BaldwinStatic transactions use memory regions allocated by
248306095b8SJohn Baldwin.Nm .
249306095b8SJohn BaldwinEach static memory region is allocated by calling
250306095b8SJohn Baldwin.Fn bus_dmamem_alloc .
251306095b8SJohn BaldwinThis function requires a valid tag describing the properties of the
252306095b8SJohn BaldwinDMA transactions to this region such as alignment or address restrictions.
253306095b8SJohn BaldwinMultiple regions can share a single tag if they share the same restrictions.
254306095b8SJohn Baldwin.Pp
255306095b8SJohn Baldwin.Fn bus_dmamem_alloc
256306095b8SJohn Baldwinallocates a memory region along with a mapping object.
257306095b8SJohn BaldwinThe associated tag, memory region, and mapping object must then be passed to
258306095b8SJohn Baldwin.Fn bus_dmamap_load
259306095b8SJohn Baldwinto bind the mapping to the allocated region and obtain the
260306095b8SJohn Baldwinscatter/gather list.
261306095b8SJohn Baldwin.Pp
262306095b8SJohn BaldwinIt is expected that
263306095b8SJohn Baldwin.Fn bus_dmamem_alloc
264306095b8SJohn Baldwinwill attempt to allocate memory requiring less expensive sync operations
265306095b8SJohn Baldwin(for example, implementations should not allocate regions requiring bounce
266306095b8SJohn Baldwinpages),
267306095b8SJohn Baldwinbut sync operations should still be used.
268306095b8SJohn BaldwinFor example, a driver should use
269306095b8SJohn Baldwin.Fn bus_dmamap_sync
270306095b8SJohn Baldwinin an interrupt handler before reading descriptor ring entries written by the
271306095b8SJohn Baldwindevice prior to the interrupt.
272306095b8SJohn Baldwin.Pp
273306095b8SJohn BaldwinWhen a consumer is finished with a memory region,
274306095b8SJohn Baldwinit should unload the mapping via
275306095b8SJohn Baldwin.Fn bus_dmamap_unload
276306095b8SJohn Baldwinand then release the memory region and mapping object via
277306095b8SJohn Baldwin.Fn bus_dmamem_free .
278306095b8SJohn Baldwin.Ss Dynamic Transactions
279306095b8SJohn BaldwinDynamic transactions map memory regions provided by other parts of the system.
280306095b8SJohn BaldwinA tag must be created via
281306095b8SJohn Baldwin.Fn bus_dma_tag_create
282306095b8SJohn Baldwinto describe the DMA transactions to and from these memory regions,
283306095b8SJohn Baldwinand a pool of mapping objects must be allocated via
284306095b8SJohn Baldwin.Fn bus_dmamap_create
285306095b8SJohn Baldwinto track the mappings of any in-flight transactions.
286306095b8SJohn Baldwin.Pp
287306095b8SJohn BaldwinWhen a consumer wishes to schedule a transaction for a memory region,
288306095b8SJohn Baldwinthe consumer must first obtain an unused mapping object from its pool
289306095b8SJohn Baldwinof mapping objects.
290306095b8SJohn BaldwinThe memory region must be bound to the mapping object via one of the
291306095b8SJohn Baldwin.Fn bus_dmamap_load
292306095b8SJohn Baldwinfunctions.
293306095b8SJohn BaldwinBefore scheduling the transaction,
294306095b8SJohn Baldwinthe consumer should sync the memory region via
295306095b8SJohn Baldwin.Fn bus_dmamap_sync
296306095b8SJohn Baldwinwith one or more of the
297306095b8SJohn Baldwin.Dq PRE
298306095b8SJohn Baldwinflags.
299306095b8SJohn BaldwinAfter the transaction has completed,
300306095b8SJohn Baldwinthe consumer should sync the memory region via
301306095b8SJohn Baldwin.Fn bus_dmamap_sync
302306095b8SJohn Baldwinwith one or more of the
303306095b8SJohn Baldwin.Dq POST
304306095b8SJohn Baldwinflags.
305306095b8SJohn BaldwinThe mapping can then be unloaded via
306306095b8SJohn Baldwin.Fn bus_dmamap_unload ,
307306095b8SJohn Baldwinand the mapping object can be returned to the pool of unused mapping objects.
308306095b8SJohn Baldwin.Pp
309306095b8SJohn BaldwinWhen a consumer is no longer scheduling DMA transactions,
310306095b8SJohn Baldwinthe mapping objects should be freed via
311306095b8SJohn Baldwin.Fn bus_dmamap_destroy ,
312306095b8SJohn Baldwinand the tag should be freed via
313306095b8SJohn Baldwin.Fn bus_dma_tag_destroy .
31424503465SHiten Pandya.Sh STRUCTURES AND TYPES
31581ae4b8dSRuslan Ermilov.Bl -tag -width indent
31624503465SHiten Pandya.It Vt bus_dma_tag_t
31724503465SHiten PandyaA machine-dependent (MD) opaque type that describes the
318306095b8SJohn Baldwincharacteristics of a group of DMA transactions.
31924503465SHiten PandyaDMA tags are organized into a hierarchy, with each child
32024503465SHiten Pandyatag inheriting the restrictions of its parent.
32124503465SHiten PandyaThis allows all devices along the path of DMA transactions
32224503465SHiten Pandyato contribute to the constraints of those transactions.
323757d4fbaSScott Long.It Vt bus_dma_template_t
324d58ff30aSScott LongA template is a structure for creating a
325757d4fbaSScott Long.Fa bus_dma_tag_t
326757d4fbaSScott Longfrom a set of defaults.
327757d4fbaSScott LongOnce initialized with
328757d4fbaSScott Long.Fn bus_dma_template_init ,
329757d4fbaSScott Longa driver can over-ride individual fields to suit its needs.
330d58ff30aSScott LongThe following fields start with the indicated default values:
331757d4fbaSScott Long.Bd -literal
332757d4fbaSScott Long	alignment	1
333757d4fbaSScott Long	boundary	0
334757d4fbaSScott Long	lowaddr		BUS_SPACE_MAXADDR
335757d4fbaSScott Long	highaddr	BUS_SPACE_MAXADDR
336757d4fbaSScott Long	maxsize		BUS_SPACE_MAXSIZE
337757d4fbaSScott Long	nsegments	BUS_SPACE_UNRESTRICTED
338757d4fbaSScott Long	maxsegsize	BUS_SPACE_MAXSIZE
339757d4fbaSScott Long	flags		0
340757d4fbaSScott Long	lockfunc	NULL
341757d4fbaSScott Long	lockfuncarg	NULL
342757d4fbaSScott Long.Ed
343757d4fbaSScott Long.Pp
344757d4fbaSScott LongDescriptions of each field are documented with
345757d4fbaSScott Long.Fn bus_dma_tag_create .
346757d4fbaSScott LongNote that the
347757d4fbaSScott Long.Fa filtfunc
348757d4fbaSScott Longand
349757d4fbaSScott Long.Fa filtfuncarg
350757d4fbaSScott Longattributes of the DMA tag are not supported with templates.
35124503465SHiten Pandya.It Vt bus_dma_filter_t
35224503465SHiten PandyaClient specified address filter having the format:
35381ae4b8dSRuslan Ermilov.Bl -tag -width indent
35424503465SHiten Pandya.It Ft int
35524503465SHiten Pandya.Fn "client_filter" "void *filtarg" "bus_addr_t testaddr"
35624503465SHiten Pandya.El
35781ae4b8dSRuslan Ermilov.Pp
35824503465SHiten PandyaAddress filters can be specified during tag creation to allow
35959892d33SRuslan Ermilovfor devices whose DMA address restrictions cannot be specified
36024503465SHiten Pandyaby a single window.
36124503465SHiten PandyaThe
36224503465SHiten Pandya.Fa filtarg
3632f46d621SJohn Baldwinargument is specified by the client during tag creation to be passed to all
36424503465SHiten Pandyainvocations of the callback.
36524503465SHiten PandyaThe
36624503465SHiten Pandya.Fa testaddr
36724503465SHiten Pandyaargument contains a potential starting address of a DMA mapping.
36824503465SHiten PandyaThe filter function operates on the set of addresses from
36924503465SHiten Pandya.Fa testaddr
37024503465SHiten Pandyato
37124503465SHiten Pandya.Ql trunc_page(testaddr) + PAGE_SIZE - 1 ,
37224503465SHiten Pandyainclusive.
3732f46d621SJohn BaldwinThe filter function should return zero if any mapping in this range
3742f46d621SJohn Baldwincan be accommodated by the device and non-zero otherwise.
375d58ff30aSScott Long.Pp
376*7cb028deSMitchell Horne.Em Note: The use of filters is no longer supported and will result in an error.
37724503465SHiten Pandya.It Vt bus_dma_segment_t
37824503465SHiten PandyaA machine-dependent type that describes individual
37924503465SHiten PandyaDMA segments.
3802f46d621SJohn BaldwinIt contains the following fields:
38124503465SHiten Pandya.Bd -literal
38224503465SHiten Pandya	bus_addr_t	ds_addr;
38324503465SHiten Pandya	bus_size_t	ds_len;
38424503465SHiten Pandya.Ed
38581ae4b8dSRuslan Ermilov.Pp
38624503465SHiten PandyaThe
38724503465SHiten Pandya.Fa ds_addr
38824503465SHiten Pandyafield contains the device visible address of the DMA segment, and
38924503465SHiten Pandya.Fa ds_len
39024503465SHiten Pandyacontains the length of the DMA segment.
39124503465SHiten PandyaAlthough the DMA segments returned by a mapping call will adhere to
39224503465SHiten Pandyaall restrictions necessary for a successful DMA operation, some conversion
3935203edcdSRuslan Ermilov(e.g.\& a conversion from host byte order to the device's byte order) is
39424503465SHiten Pandyaalmost always required when presenting segment information to the device.
39524503465SHiten Pandya.It Vt bus_dmamap_t
39624503465SHiten PandyaA machine-dependent opaque type describing an individual mapping.
39771bb1f9bSScott LongOne map is used for each memory allocation that will be loaded.
39871bb1f9bSScott LongMaps can be reused once they have been unloaded.
39971bb1f9bSScott LongMultiple maps can be associated with one DMA tag.
40081ae4b8dSRuslan ErmilovWhile the value of the map may evaluate to
40181ae4b8dSRuslan Ermilov.Dv NULL
40281ae4b8dSRuslan Ermilovon some platforms under certain conditions,
40381ae4b8dSRuslan Ermilovit should never be assumed that it will be
40481ae4b8dSRuslan Ermilov.Dv NULL
40581ae4b8dSRuslan Ermilovin all cases.
40624503465SHiten Pandya.It Vt bus_dmamap_callback_t
40724503465SHiten PandyaClient specified callback for receiving mapping information resulting from
40824503465SHiten Pandyathe load of a
40924503465SHiten Pandya.Vt bus_dmamap_t
41024503465SHiten Pandyavia
411a073133cSJim Harris.Fn bus_dmamap_load ,
412c0341432SJohn Baldwin.Fn bus_dmamap_load_bio ,
413c0341432SJohn Baldwin.Fn bus_dmamap_load_ccb ,
4149c0e3d3aSJohn Baldwin.Fn bus_dmamap_load_crp ,
415a073133cSJim Harrisor
4169c0e3d3aSJohn Baldwin.Fn bus_dmamap_load_crp_buffer .
41724503465SHiten PandyaCallbacks are of the format:
41881ae4b8dSRuslan Ermilov.Bl -tag -width indent
41924503465SHiten Pandya.It Ft void
42024503465SHiten Pandya.Fn "client_callback" "void *callback_arg" "bus_dma_segment_t *segs" \
42124503465SHiten Pandya"int nseg" "int error"
42224503465SHiten Pandya.El
42381ae4b8dSRuslan Ermilov.Pp
42424503465SHiten PandyaThe
42524503465SHiten Pandya.Fa callback_arg
42624503465SHiten Pandyais the callback argument passed to dmamap load functions.
42724503465SHiten PandyaThe
42824503465SHiten Pandya.Fa segs
42924503465SHiten Pandyaand
43024503465SHiten Pandya.Fa nseg
4312f46d621SJohn Baldwinarguments describe an array of
43224503465SHiten Pandya.Vt bus_dma_segment_t
43324503465SHiten Pandyastructures that represent the mapping.
43424503465SHiten PandyaThis array is only valid within the scope of the callback function.
43524503465SHiten PandyaThe success or failure of the mapping is indicated by the
43624503465SHiten Pandya.Fa error
4372f46d621SJohn Baldwinargument.
43824503465SHiten PandyaMore information on the use of callbacks can be found in the
43924503465SHiten Pandyadescription of the individual dmamap load functions.
44024503465SHiten Pandya.It Vt bus_dmamap_callback2_t
44124503465SHiten PandyaClient specified callback for receiving mapping information resulting from
44224503465SHiten Pandyathe load of a
44324503465SHiten Pandya.Vt bus_dmamap_t
44424503465SHiten Pandyavia
44524503465SHiten Pandya.Fn bus_dmamap_load_uio
44624503465SHiten Pandyaor
44724503465SHiten Pandya.Fn bus_dmamap_load_mbuf .
44881ae4b8dSRuslan Ermilov.Pp
44924503465SHiten PandyaCallback2s are of the format:
45081ae4b8dSRuslan Ermilov.Bl -tag -width indent
45124503465SHiten Pandya.It Ft void
45224503465SHiten Pandya.Fn "client_callback2" "void *callback_arg" "bus_dma_segment_t *segs" \
45324503465SHiten Pandya"int nseg" "bus_size_t mapsize" "int error"
45424503465SHiten Pandya.El
45581ae4b8dSRuslan Ermilov.Pp
45624503465SHiten PandyaCallback2's behavior is the same as
45724503465SHiten Pandya.Vt bus_dmamap_callback_t
45824503465SHiten Pandyawith the addition that the length of the data mapped is provided via
45924503465SHiten Pandya.Fa mapsize .
46024503465SHiten Pandya.It Vt bus_dmasync_op_t
46124503465SHiten PandyaMemory synchronization operation specifier.
46236a142c4SRuslan ErmilovBus DMA requires explicit synchronization of memory with its device
46324503465SHiten Pandyavisible mapping in order to guarantee memory coherency.
46424503465SHiten PandyaThe
46524503465SHiten Pandya.Vt bus_dmasync_op_t
46624503465SHiten Pandyaallows the type of DMA operation that will be or has been performed
46724503465SHiten Pandyato be communicated to the system so that the correct coherency measures
46824503465SHiten Pandyaare taken.
4691cb112abSScott LongThe operations are represented as bitfield flags that can be combined together,
4701cb112abSScott Longthough it only makes sense to combine PRE flags or POST flags, not both.
4711cb112abSScott LongSee the
472e8c9966dSJohn-Mark Gurney.Fn bus_dmamap_sync
4731cb112abSScott Longdescription below for more details on how to use these operations.
4746f3d2701SScott Long.Pp
4756f3d2701SScott LongAll operations specified below are performed from the host memory point of view,
4766f3d2701SScott Longwhere a read implies data coming from the device to the host memory, and a write
4776f3d2701SScott Longimplies data going from the host memory to the device.
47807bf564cSRuslan ErmilovAlternatively, the operations can be thought of in terms of driver operations,
479a79d1e83SScott Longwhere reading a network packet or storage sector corresponds to a read operation
480a79d1e83SScott Longin
481a79d1e83SScott Long.Nm .
48207bf564cSRuslan Ermilov.Bl -tag -width ".Dv BUS_DMASYNC_POSTWRITE"
48324503465SHiten Pandya.It Dv BUS_DMASYNC_PREREAD
4846f3d2701SScott LongPerform any synchronization required prior to an update of host memory by the
48507bf564cSRuslan Ermilovdevice.
48624503465SHiten Pandya.It Dv BUS_DMASYNC_PREWRITE
4876f3d2701SScott LongPerform any synchronization required after an update of host memory by the CPU
48807bf564cSRuslan Ermilovand prior to device access to host memory.
48924503465SHiten Pandya.It Dv BUS_DMASYNC_POSTREAD
49007bf564cSRuslan ErmilovPerform any synchronization required after an update of host memory by the
49107bf564cSRuslan Ermilovdevice and prior to CPU access to host memory.
49224503465SHiten Pandya.It Dv BUS_DMASYNC_POSTWRITE
4932f46d621SJohn BaldwinPerform any synchronization required after device access to host memory.
49424503465SHiten Pandya.El
4950e5f9b7dSScott Long.It Vt bus_dma_lock_t
496c7d3a65dSHiten PandyaClient specified lock/mutex manipulation method.
497c7d3a65dSHiten PandyaThis will be called from
4980e5f9b7dSScott Longwithin busdma whenever a client lock needs to be manipulated.
4994d855643SWarner LoshIn its current form, the function will be called immediately before
5005bbaa5cfSWojciech A. Koszekthe callback for a DMA load operation that has been deferred with
5014d855643SWarner Losh.Dv BUS_DMA_LOCK
5024d855643SWarner Loshand immediately after with
5034d855643SWarner Losh.Dv BUS_DMA_UNLOCK .
5044d855643SWarner LoshIf the load operation does not need to be deferred, then it
5054d855643SWarner Loshwill not be called since the function loading the map should
5064d855643SWarner Loshbe holding the appropriate locks.
5070e5f9b7dSScott LongThis method is of the format:
50881ae4b8dSRuslan Ermilov.Bl -tag -width indent
5090e5f9b7dSScott Long.It Ft void
5100e5f9b7dSScott Long.Fn "lockfunc" "void *lockfunc_arg" "bus_dma_lock_op_t op"
51124503465SHiten Pandya.El
51281ae4b8dSRuslan Ermilov.Pp
5132f46d621SJohn BaldwinThe
5142f46d621SJohn Baldwin.Fa lockfuncarg
5152f46d621SJohn Baldwinargument is specified by the client during tag creation to be passed to all
5162f46d621SJohn Baldwininvocations of the callback.
5172f46d621SJohn BaldwinThe
5182f46d621SJohn Baldwin.Fa op
5192f46d621SJohn Baldwinargument specifies the lock operation to perform.
5202f46d621SJohn Baldwin.Pp
5210e5f9b7dSScott LongTwo
5220e5f9b7dSScott Long.Vt lockfunc
5230e5f9b7dSScott Longimplementations are provided for convenience.
5240e5f9b7dSScott Long.Fn busdma_lock_mutex
5252f46d621SJohn Baldwinperforms standard mutex operations on the sleep mutex provided via
5260e5f9b7dSScott Long.Fa lockfuncarg .
5270e5f9b7dSScott Long.Fn dflt_lock
528c7d3a65dSHiten Pandyawill generate a system panic if it is called.
529c7d3a65dSHiten PandyaIt is substituted into the tag when
5300e5f9b7dSScott Long.Fa lockfunc
53181ae4b8dSRuslan Ermilovis passed as
53281ae4b8dSRuslan Ermilov.Dv NULL
53381ae4b8dSRuslan Ermilovto
5342f46d621SJohn Baldwin.Fn bus_dma_tag_create
5352f46d621SJohn Baldwinand is useful for tags that should not be used with deferred load operations.
5360e5f9b7dSScott Long.It Vt bus_dma_lock_op_t
5370e5f9b7dSScott LongOperations to be performed by the client-specified
5380e5f9b7dSScott Long.Fn lockfunc .
53981ae4b8dSRuslan Ermilov.Bl -tag -width ".Dv BUS_DMA_UNLOCK"
5400e5f9b7dSScott Long.It Dv BUS_DMA_LOCK
5412988974bSMike PritchardAcquires and/or locks the client locking primitive.
5420e5f9b7dSScott Long.It Dv BUS_DMA_UNLOCK
5430e5f9b7dSScott LongReleases and/or unlocks the client locking primitive.
5440e5f9b7dSScott Long.El
5450e5f9b7dSScott Long.El
54624503465SHiten Pandya.Sh FUNCTIONS
54781ae4b8dSRuslan Ermilov.Bl -tag -width indent
54824503465SHiten Pandya.It Fn bus_dma_tag_create "parent" "alignment" "boundary" "lowaddr" \
54924503465SHiten Pandya"highaddr" "*filtfunc" "*filtfuncarg" "maxsize" "nsegments" "maxsegsz" \
5509b5c4b66SScott Long"flags" "lockfunc" "lockfuncarg" "*dmat"
551306095b8SJohn BaldwinAllocates a DMA tag, and initializes it according to
55224503465SHiten Pandyathe arguments provided:
55381ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa filtfuncarg"
55424503465SHiten Pandya.It Fa parent
555306095b8SJohn BaldwinA parent tag from which to inherit restrictions.
556306095b8SJohn BaldwinThe restrictions passed in other arguments can only further tighten the
557306095b8SJohn Baldwinrestrictions inherited from the parent tag.
558306095b8SJohn Baldwin.Pp
559306095b8SJohn BaldwinAll tags created by a device driver must inherit from the tag returned by
560306095b8SJohn Baldwin.Fn bus_get_dma_tag
561306095b8SJohn Baldwinto honor restrictions between the parent bridge, CPU memory, and the
56224503465SHiten Pandyadevice.
56324503465SHiten Pandya.It Fa alignment
56424503465SHiten PandyaAlignment constraint, in bytes, of any mappings created using this tag.
56524503465SHiten PandyaThe alignment must be a power of 2.
56624503465SHiten PandyaHardware that can DMA starting at any address would specify
56724503465SHiten Pandya.Em 1
56824503465SHiten Pandyafor byte alignment.
56924503465SHiten PandyaHardware requiring DMA transfers to start on a multiple of 4K
57024503465SHiten Pandyawould specify
57124503465SHiten Pandya.Em 4096 .
57224503465SHiten Pandya.It Fa boundary
57324503465SHiten PandyaBoundary constraint, in bytes, of the target DMA memory region.
57424503465SHiten PandyaThe boundary indicates the set of addresses, all multiples of the
57524503465SHiten Pandyaboundary argument, that cannot be crossed by a single
57624503465SHiten Pandya.Vt bus_dma_segment_t .
5772d4071acSChristian BruefferThe boundary must be a power of 2 and must be no smaller than the
578ab0b83b5SScott Longmaximum segment size.
57924503465SHiten Pandya.Ql 0
58024503465SHiten Pandyaindicates that there are no boundary restrictions.
58181ae4b8dSRuslan Ermilov.It Fa lowaddr , highaddr
58224503465SHiten PandyaBounds of the window of bus address space that
58324503465SHiten Pandya.Em cannot
58424503465SHiten Pandyabe directly accessed by the device.
5855bbaa5cfSWojciech A. KoszekThe window contains all addresses greater than
5865bbaa5cfSWojciech A. Koszek.Fa lowaddr
5875bbaa5cfSWojciech A. Koszekand less than or equal to
5885bbaa5cfSWojciech A. Koszek.Fa highaddr .
5895bbaa5cfSWojciech A. KoszekFor example, a device incapable of DMA above 4GB, would specify a
5905bbaa5cfSWojciech A. Koszek.Fa highaddr
5915bbaa5cfSWojciech A. Koszekof
59224503465SHiten Pandya.Dv BUS_SPACE_MAXADDR
5935bbaa5cfSWojciech A. Koszekand a
5945bbaa5cfSWojciech A. Koszek.Fa lowaddr
5955bbaa5cfSWojciech A. Koszekof
59624503465SHiten Pandya.Dv BUS_SPACE_MAXADDR_32BIT .
5975bbaa5cfSWojciech A. KoszekSimilarly a device that can only perform DMA to addresses below
5985bbaa5cfSWojciech A. Koszek16MB would specify a
5995bbaa5cfSWojciech A. Koszek.Fa highaddr
6005bbaa5cfSWojciech A. Koszekof
60124503465SHiten Pandya.Dv BUS_SPACE_MAXADDR
6025bbaa5cfSWojciech A. Koszekand a
6035bbaa5cfSWojciech A. Koszek.Fa lowaddr
6045bbaa5cfSWojciech A. Koszekof
60524503465SHiten Pandya.Dv BUS_SPACE_MAXADDR_24BIT .
606306095b8SJohn BaldwinSome implementations require that some region of device visible
60724503465SHiten Pandyaaddress space, overlapping available host memory, be outside the
60824503465SHiten Pandyawindow.
60924503465SHiten PandyaThis area of
61024503465SHiten Pandya.Ql safe memory
61124503465SHiten Pandyais used to bounce requests that would otherwise conflict with
61224503465SHiten Pandyathe exclusion window.
61324503465SHiten Pandya.It Fa filtfunc
614*7cb028deSMitchell HorneFormerly the optional filter function; must be
615*7cb028deSMitchell Horne.Dv NULL .
61624503465SHiten Pandya.It Fa filtfuncarg
617*7cb028deSMitchell HorneMust be
61881ae4b8dSRuslan Ermilov.Dv NULL .
61924503465SHiten Pandya.It Fa maxsize
62024503465SHiten PandyaMaximum size, in bytes, of the sum of all segment lengths in a given
62124503465SHiten PandyaDMA mapping associated with this tag.
62224503465SHiten Pandya.It Fa nsegments
62324503465SHiten PandyaNumber of discontinuities (scatter/gather segments) allowed
62424503465SHiten Pandyain a DMA mapped region.
625094dc7e3SJohn-Mark Gurney.It Fa maxsegsz
626094dc7e3SJohn-Mark GurneyMaximum size, in bytes, of a segment in any DMA mapped region associated
627094dc7e3SJohn-Mark Gurneywith
628094dc7e3SJohn-Mark Gurney.Fa dmat .
62924503465SHiten Pandya.It Fa flags
63024503465SHiten PandyaAre as follows:
63181ae4b8dSRuslan Ermilov.Bl -tag -width ".Dv BUS_DMA_ALLOCNOW"
63224503465SHiten Pandya.It Dv BUS_DMA_ALLOCNOW
6330f3a0078SScott LongPre-allocate enough resources to handle at least one map load operation on
63471bb1f9bSScott Longthis tag.
63524503465SHiten PandyaIf sufficient resources are not available,
63624503465SHiten Pandya.Er ENOMEM
63724503465SHiten Pandyais returned.
63871bb1f9bSScott LongThis should not be used for tags that only describe buffers that will be
63971bb1f9bSScott Longallocated with
64071bb1f9bSScott Long.Fn bus_dmamem_alloc .
64171bb1f9bSScott LongAlso, due to resource sharing with other tags, this flag does not guarantee
64271bb1f9bSScott Longthat resources will be allocated or reserved exclusively for this tag.
64371bb1f9bSScott LongIt should be treated only as a minor optimization.
644435b87a9SEmmanuel Vadot.It Dv BUS_DMA_COHERENT
645435b87a9SEmmanuel VadotIndicate that the DMA engine and CPU are cache-coherent.
646435b87a9SEmmanuel VadotCached memory may be used to back allocations created by
647435b87a9SEmmanuel Vadot.Fn bus_dmamem_alloc .
648435b87a9SEmmanuel VadotFor
649435b87a9SEmmanuel Vadot.Fn bus_dma_tag_create ,
650435b87a9SEmmanuel Vadotthe
651435b87a9SEmmanuel Vadot.Dv BUS_DMA_COHERENT
652435b87a9SEmmanuel Vadotflag is currently implemented on arm64.
65324503465SHiten Pandya.El
6549b5c4b66SScott Long.It Fa lockfunc
65581ae4b8dSRuslan ErmilovOptional lock manipulation function (may be
65681ae4b8dSRuslan Ermilov.Dv NULL )
65781ae4b8dSRuslan Ermilovto be called when busdma
658c7d3a65dSHiten Pandyaneeds to manipulate a lock on behalf of the client.
65981ae4b8dSRuslan ErmilovIf
66081ae4b8dSRuslan Ermilov.Dv NULL
66181ae4b8dSRuslan Ermilovis specified,
6629b5c4b66SScott Long.Fn dflt_lock
6639b5c4b66SScott Longis used.
6649b5c4b66SScott Long.It Fa lockfuncarg
6659b5c4b66SScott LongOptional argument to be passed to the function specified by
6669b5c4b66SScott Long.Fa lockfunc .
66724503465SHiten Pandya.It Fa dmat
66824503465SHiten PandyaPointer to a bus_dma_tag_t where the resulting DMA tag will
66924503465SHiten Pandyabe stored.
67024503465SHiten Pandya.El
67124503465SHiten Pandya.Pp
67224503465SHiten PandyaReturns
67324503465SHiten Pandya.Er ENOMEM
67424503465SHiten Pandyaif sufficient memory is not available for tag creation
67524503465SHiten Pandyaor allocating mapping resources.
676*7cb028deSMitchell HorneReturns
677*7cb028deSMitchell Horne.Er EINVAL
678*7cb028deSMitchell Horneif either
679*7cb028deSMitchell Horne.Fa filtfunc
680*7cb028deSMitchell Horneor
681*7cb028deSMitchell Horne.Fa filtarg
682*7cb028deSMitchell Hornearguments are not
683*7cb028deSMitchell Horne.Dv NULL .
68424503465SHiten Pandya.It Fn bus_dma_tag_destroy "dmat"
68524503465SHiten PandyaDeallocate the DMA tag
68624503465SHiten Pandya.Fa dmat
68724503465SHiten Pandyathat was created by
68824503465SHiten Pandya.Fn bus_dma_tag_create .
68924503465SHiten Pandya.Pp
69024503465SHiten PandyaReturns
69124503465SHiten Pandya.Er EBUSY
69224503465SHiten Pandyaif any DMA maps remain associated with
69324503465SHiten Pandya.Fa dmat
69424503465SHiten Pandyaor
69524503465SHiten Pandya.Ql 0
69624503465SHiten Pandyaon success.
697757d4fbaSScott Long.It Fn bus_dma_template_init "*template" "parent"
698757d4fbaSScott LongInitializes a
699757d4fbaSScott Long.Fa bus_dma_template_t
700f2f60544SGordon Berglingstructure.
701f2f60544SGordon BerglingIf the
702757d4fbaSScott Long.Fa parent
703e18eb7b1SScott Longargument is non-NULL, this parent tag is associated with the template and
704f2f60544SGordon Berglingwill be compiled into the dma tag that is later created.
705f2f60544SGordon BerglingThe values of the parent are not copied into the template.
706f2f60544SGordon BerglingDuring tag creation in
707e18eb7b1SScott Long.Fn bus_dma_tag_template ,
708e18eb7b1SScott Longany parameters from the parent tag that are more restrictive than what is
709e18eb7b1SScott Longin the provided template will overwrite what goes into the new tag.
710757d4fbaSScott Long.It Fn bus_dma_template_tag "*template" "*dmat"
711757d4fbaSScott LongUnpacks a template into a tag, and returns the tag via the
712757d4fbaSScott Long.Fa dmat .
713757d4fbaSScott LongAll return values are identical to
714757d4fbaSScott Long.Fn bus_dma_tag_create .
715d58ff30aSScott LongThe template is not modified by this function, and can be reused and/or
716d58ff30aSScott Longfreed upon return.
717757d4fbaSScott Long.It Fn bus_dma_template_clone "*template" "dmat"
718d58ff30aSScott LongCopies the fields from an existing tag to a template.
719f2f60544SGordon BerglingThe template does not need to be initialized first.
720f2f60544SGordon BerglingAll of its fields will be overwritten by the values contained in the tag.
721f2f60544SGordon BerglingWhen paired with
722d58ff30aSScott Long.Fn bus_dma_template_tag ,
723d58ff30aSScott Longthis function is useful for creating copies of tags.
724e18eb7b1SScott Long.It Fn bus_dma_template_fill "*template" "params[]" "count"
725e18eb7b1SScott LongFills in the selected fields of the template with the keyed values from the
726e18eb7b1SScott Long.Fa params
727f2f60544SGordon Berglingarray.
728f2f60544SGordon BerglingThis is not meant to be called directly, use
729e18eb7b1SScott Long.Fn BUS_DMA_TEMPLATE_FILL
730e18eb7b1SScott Longinstead.
731e18eb7b1SScott Long.It Fn BUS_DMA_TEMPLATE_FILL "*template" "param ..."
732e18eb7b1SScott LongFills in the selected fields of the template with a variable number of
733f2f60544SGordon Berglingkey-value parameters.
734f2f60544SGordon BerglingThe macros listed below take an argument of the specified type and encapsulate
735f2f60544SGordon Berglingit into a key-value structure that is directly usable as a parameter argument.
736f2f60544SGordon BerglingMuliple parameters may be provided at once.
737e18eb7b1SScott Long.Bd -literal
738e18eb7b1SScott Long	BD_PARENT()	void *
739e18eb7b1SScott Long	BD_ALIGNMENT()	uintmax_t
740e18eb7b1SScott Long	BD_BOUNDARY()	uintmax_t
741e18eb7b1SScott Long	BD_LOWADDR()	vm_paddr_t
742e18eb7b1SScott Long	BD_HIGHADDR()	vm_paddr_t
743e18eb7b1SScott Long	BD_MAXSIZE()	uintmax_t
744e18eb7b1SScott Long	BD_NSEGMENTS()	uintmax_t
745e18eb7b1SScott Long	BD_MAXSEGSIZE()	uintmax_t
746e18eb7b1SScott Long	BD_FLAGS()	uintmax_t
747e18eb7b1SScott Long	BD_LOCKFUNC()	void *
748e18eb7b1SScott Long	BD_LOCKFUNCARG() void *
749e18eb7b1SScott Long.Ed
75024503465SHiten Pandya.It Fn bus_dmamap_create "dmat" "flags" "*mapp"
75124503465SHiten PandyaAllocates and initializes a DMA map.
75224503465SHiten PandyaArguments are as follows:
75381ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa nsegments"
75424503465SHiten Pandya.It Fa dmat
75524503465SHiten PandyaDMA tag.
75624503465SHiten Pandya.It Fa flags
757afbeac3eSMarius StroblAre as follows:
758afbeac3eSMarius Strobl.Bl -tag -width ".Dv BUS_DMA_COHERENT"
759afbeac3eSMarius Strobl.It Dv BUS_DMA_COHERENT
760afbeac3eSMarius StroblAttempt to map the memory loaded with this map such that cache sync
761afbeac3eSMarius Strobloperations are as cheap as possible.
762afbeac3eSMarius StroblThis flag is typically set on maps when the memory loaded with these will
763afbeac3eSMarius Stroblbe accessed by both a CPU and a DMA engine, frequently such as control data
764afbeac3eSMarius Strobland as opposed to streamable data such as receive and transmit buffers.
765afbeac3eSMarius StroblUse of this flag does not remove the requirement of using
766afbeac3eSMarius Strobl.Fn bus_dmamap_sync ,
767afbeac3eSMarius Stroblbut it may reduce the cost of performing these operations.
768afbeac3eSMarius Strobl.El
76924503465SHiten Pandya.It Fa mapp
77024503465SHiten PandyaPointer to a
77124503465SHiten Pandya.Vt bus_dmamap_t
77224503465SHiten Pandyawhere the resulting DMA map will be stored.
77324503465SHiten Pandya.El
77424503465SHiten Pandya.Pp
77524503465SHiten PandyaReturns
77624503465SHiten Pandya.Er ENOMEM
77724503465SHiten Pandyaif sufficient memory is not available for creating the
77824503465SHiten Pandyamap or allocating mapping resources.
77924503465SHiten Pandya.It Fn bus_dmamap_destroy "dmat" "map"
78024503465SHiten PandyaFrees all resources associated with a given DMA map.
78124503465SHiten PandyaArguments are as follows:
78281ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa dmat"
78324503465SHiten Pandya.It Fa dmat
78424503465SHiten PandyaDMA tag used to allocate
78524503465SHiten Pandya.Fa map .
78624503465SHiten Pandya.It Fa map
78724503465SHiten PandyaThe DMA map to destroy.
78824503465SHiten Pandya.El
78924503465SHiten Pandya.Pp
79024503465SHiten PandyaReturns
79124503465SHiten Pandya.Er EBUSY
79224503465SHiten Pandyaif a mapping is still active for
79324503465SHiten Pandya.Fa map .
79495929b66SWarner Losh.It Fn bus_dmamap_load "dmat" "map" "buf" "buflen" "*callback" \
79595929b66SWarner Losh"callback_arg" "flags"
79624503465SHiten PandyaCreates a mapping in device visible address space of
79724503465SHiten Pandya.Fa buflen
79824503465SHiten Pandyabytes of
79924503465SHiten Pandya.Fa buf ,
80024503465SHiten Pandyaassociated with the DMA map
80124503465SHiten Pandya.Fa map .
80271bb1f9bSScott LongThis call will always return immediately and will not block for any reason.
80324503465SHiten PandyaArguments are as follows:
80481ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa buflen"
80524503465SHiten Pandya.It Fa dmat
80624503465SHiten PandyaDMA tag used to allocate
80724503465SHiten Pandya.Fa map .
80824503465SHiten Pandya.It Fa map
80924503465SHiten PandyaA DMA map without a currently active mapping.
81024503465SHiten Pandya.It Fa buf
81124503465SHiten PandyaA kernel virtual address pointer to a contiguous (in KVA) buffer, to be
81224503465SHiten Pandyamapped into device visible address space.
81324503465SHiten Pandya.It Fa buflen
81424503465SHiten PandyaThe size of the buffer.
81524503465SHiten Pandya.It Fa callback Fa callback_arg
81624503465SHiten PandyaThe callback function, and its argument.
81771bb1f9bSScott LongThis function is called once sufficient mapping resources are available for
81871bb1f9bSScott Longthe DMA operation.
81971bb1f9bSScott LongIf resources are temporarily unavailable, this function will be deferred until
82071bb1f9bSScott Longlater, but the load operation will still return immediately to the caller.
82171bb1f9bSScott LongThus, callers should not assume that the callback will be called before the
82271bb1f9bSScott Longload returns, and code should be structured appropriately to handle this.
82371bb1f9bSScott LongSee below for specific flags and error codes that control this behavior.
82424503465SHiten Pandya.It Fa flags
82571bb1f9bSScott LongAre as follows:
82681ae4b8dSRuslan Ermilov.Bl -tag -width ".Dv BUS_DMA_NOWAIT"
82781ae4b8dSRuslan Ermilov.It Dv BUS_DMA_NOWAIT
82871bb1f9bSScott LongThe load should not be deferred in case of insufficient mapping resources,
82971bb1f9bSScott Longand instead should return immediately with an appropriate error.
83008390d3bSMarius Strobl.It Dv BUS_DMA_NOCACHE
83108390d3bSMarius StroblThe generated transactions to and from the virtual page are non-cacheable.
83271bb1f9bSScott Long.El
83324503465SHiten Pandya.El
83424503465SHiten Pandya.Pp
83524503465SHiten PandyaReturn values to the caller are as follows:
83681ae4b8dSRuslan Ermilov.Bl -tag -width ".Er EINPROGRESS"
83724503465SHiten Pandya.It 0
83824503465SHiten PandyaThe callback has been called and completed.
83924503465SHiten PandyaThe status of the mapping has been delivered to the callback.
84024503465SHiten Pandya.It Er EINPROGRESS
84124503465SHiten PandyaThe mapping has been deferred for lack of resources.
84224503465SHiten PandyaThe callback will be called as soon as resources are available.
84324503465SHiten PandyaCallbacks are serviced in FIFO order.
84428b5187fSJohn Baldwin.Pp
84528b5187fSJohn BaldwinNote that subsequent load operations for the same tag that do not require
84628b5187fSJohn Baldwinextra resources will still succeed.
84728b5187fSJohn BaldwinThis may result in out-of-order processing of requests.
84828b5187fSJohn BaldwinIf the caller requires the order of requests to be preserved,
84928b5187fSJohn Baldwinthen the caller is required to stall subsequent requests until a pending
85028b5187fSJohn Baldwinrequest's callback is invoked.
85171bb1f9bSScott Long.It Er ENOMEM
85271bb1f9bSScott LongThe load request has failed due to insufficient resources, and the caller
85371bb1f9bSScott Longspecifically used the
85481ae4b8dSRuslan Ermilov.Dv BUS_DMA_NOWAIT
85571bb1f9bSScott Longflag.
85624503465SHiten Pandya.It Er EINVAL
85724503465SHiten PandyaThe load request was invalid.
85871bb1f9bSScott LongThe callback has been called and has been provided the same error.
85924503465SHiten PandyaThis error value may indicate that
86024503465SHiten Pandya.Fa dmat ,
86124503465SHiten Pandya.Fa map ,
86224503465SHiten Pandya.Fa buf ,
86324503465SHiten Pandyaor
86424503465SHiten Pandya.Fa callback
86524503465SHiten Pandyawere invalid, or
86671bb1f9bSScott Long.Fa buflen
86724503465SHiten Pandyawas larger than the
86824503465SHiten Pandya.Fa maxsize
86924503465SHiten Pandyaargument used to create the dma tag
87024503465SHiten Pandya.Fa dmat .
87124503465SHiten Pandya.El
87224503465SHiten Pandya.Pp
87324503465SHiten PandyaWhen the callback is called, it is presented with an error value
87424503465SHiten Pandyaindicating the disposition of the mapping.
87524503465SHiten PandyaError may be one of the following:
87681ae4b8dSRuslan Ermilov.Bl -tag -width ".Er EINPROGRESS"
87724503465SHiten Pandya.It 0
87824503465SHiten PandyaThe mapping was successful and the
87924503465SHiten Pandya.Fa dm_segs
88024503465SHiten Pandyacallback argument contains an array of
88124503465SHiten Pandya.Vt bus_dma_segment_t
88224503465SHiten Pandyaelements describing the mapping.
88324503465SHiten PandyaThis array is only valid during the scope of the callback function.
88424503465SHiten Pandya.It Er EFBIG
88524503465SHiten PandyaA mapping could not be achieved within the segment constraints provided
88624503465SHiten Pandyain the tag even though the requested allocation size was less than maxsize.
88724503465SHiten Pandya.El
888a073133cSJim Harris.It Fn bus_dmamap_load_bio "dmat" "map" "bio" "callback" "callback_arg" "flags"
889a073133cSJim HarrisThis is a variation of
890a073133cSJim Harris.Fn bus_dmamap_load
891a073133cSJim Harriswhich maps buffers pointed to by
892a073133cSJim Harris.Fa bio
893a073133cSJim Harrisfor DMA transfers.
894a073133cSJim Harris.Fa bio
895a073133cSJim Harrismay point to either a mapped or unmapped buffer.
896a073133cSJim Harris.It Fn bus_dmamap_load_ccb "dmat" "map" "ccb" "callback" "callback_arg" "flags"
897a073133cSJim HarrisThis is a variation of
898a073133cSJim Harris.Fn bus_dmamap_load
899a073133cSJim Harriswhich maps data pointed to by
900a073133cSJim Harris.Fa ccb
901a073133cSJim Harrisfor DMA transfers.
902a073133cSJim HarrisThe data for
903a073133cSJim Harris.Fa ccb
904a073133cSJim Harrismay be any of the following types:
905a073133cSJim Harris.Bl -tag -width ".Er CAM_DATA_SG_PADDR"
906a073133cSJim Harris.It CAM_DATA_VADDR
907a073133cSJim HarrisThe data is a single KVA buffer.
908a073133cSJim Harris.It CAM_DATA_PADDR
909a073133cSJim HarrisThe data is a single bus address range.
910a073133cSJim Harris.It CAM_DATA_SG
911a073133cSJim HarrisThe data is a scatter/gather list of KVA buffers.
912a073133cSJim Harris.It CAM_DATA_SG_PADDR
913a073133cSJim HarrisThe data is a scatter/gather list of bus address ranges.
914a073133cSJim Harris.It CAM_DATA_BIO
915a073133cSJim HarrisThe data is contained in a
916a073133cSJim Harris.Vt struct bio
917a073133cSJim Harrisattached to the CCB.
918a073133cSJim Harris.El
919a073133cSJim Harris.Pp
920a073133cSJim Harris.Fn bus_dmamap_load_ccb
921a073133cSJim Harrissupports the following CCB XPT function codes:
922a073133cSJim Harris.Pp
923a073133cSJim Harris.Bl -item -offset indent -compact
924a073133cSJim Harris.It
925a073133cSJim HarrisXPT_ATA_IO
926a073133cSJim Harris.It
927a073133cSJim HarrisXPT_CONT_TARGET_IO
928a073133cSJim Harris.It
929a073133cSJim HarrisXPT_SCSI_IO
930a073133cSJim Harris.El
931c0341432SJohn Baldwin.It Fn bus_dmamap_load_crp "dmat" "map" "crp" "callback" "callback_arg" "flags"
932c0341432SJohn BaldwinThis is a variation of
933c0341432SJohn Baldwin.Fn bus_dmamap_load
9349c0e3d3aSJohn Baldwinwhich maps the input buffer pointed to by
935c0341432SJohn Baldwin.Fa crp
936c0341432SJohn Baldwinfor DMA transfers.
937c0341432SJohn BaldwinThe
938c0341432SJohn Baldwin.Dv BUS_DMA_NOWAIT
939c0341432SJohn Baldwinflag is implied, thus no callback deferral will happen.
9409c0e3d3aSJohn Baldwin.It Fn bus_dmamap_load_crp_buffer "dmat" "map" "cb" "callback" "callback_arg" \
9419c0e3d3aSJohn Baldwin"flags"
9429c0e3d3aSJohn BaldwinThis is a variation of
9439c0e3d3aSJohn Baldwin.Fn bus_dmamap_load
9449c0e3d3aSJohn Baldwinwhich maps the crypto data buffer pointed to by
9459c0e3d3aSJohn Baldwin.Fa cb
9469c0e3d3aSJohn Baldwinfor DMA transfers.
9479c0e3d3aSJohn BaldwinThe
9489c0e3d3aSJohn Baldwin.Dv BUS_DMA_NOWAIT
9499c0e3d3aSJohn Baldwinflag is implied, thus no callback deferral will happen.
95024503465SHiten Pandya.It Fn bus_dmamap_load_mbuf "dmat" "map" "mbuf" "callback2" "callback_arg" \
95124503465SHiten Pandya"flags"
95224503465SHiten PandyaThis is a variation of
95324503465SHiten Pandya.Fn bus_dmamap_load
95424503465SHiten Pandyawhich maps mbuf chains
95524503465SHiten Pandyafor DMA transfers.
95624503465SHiten PandyaA
95724503465SHiten Pandya.Vt bus_size_t
95824503465SHiten Pandyaargument is also passed to the callback routine, which
95924503465SHiten Pandyacontains the mbuf chain's packet header length.
96071bb1f9bSScott LongThe
96181ae4b8dSRuslan Ermilov.Dv BUS_DMA_NOWAIT
96271bb1f9bSScott Longflag is implied, thus no callback deferral will happen.
96324503465SHiten Pandya.Pp
96424503465SHiten PandyaMbuf chains are assumed to be in kernel virtual address space.
96524503465SHiten Pandya.Pp
96671bb1f9bSScott LongBeside the error values listed for
96771bb1f9bSScott Long.Fn bus_dmamap_load ,
96824503465SHiten Pandya.Er EINVAL
96971bb1f9bSScott Longwill be returned if the size of the mbuf chain exceeds the maximum limit of the
97024503465SHiten PandyaDMA tag.
971824f4edfSScott Long.It Fn bus_dmamap_load_mbuf_sg "dmat" "map" "mbuf" "segs" "nsegs" "flags"
972824f4edfSScott LongThis is just like
973824f4edfSScott Long.Fn bus_dmamap_load_mbuf
9744f068961SRuslan Ermilovexcept that it returns immediately without calling a callback function.
9754f068961SRuslan ErmilovIt is provided for efficiency.
976824f4edfSScott LongThe scatter/gather segment array
977824f4edfSScott Long.Va segs
978824f4edfSScott Longis provided by the caller and filled in directly by the function.
979824f4edfSScott LongThe
980824f4edfSScott Long.Va nsegs
981824f4edfSScott Longargument is returned with the number of segments filled in.
982824f4edfSScott LongReturns the same errors as
983824f4edfSScott Long.Fn bus_dmamap_load_mbuf .
98424503465SHiten Pandya.It Fn bus_dmamap_load_uio "dmat" "map" "uio" "callback2" "callback_arg" "flags"
98524503465SHiten PandyaThis is a variation of
98624503465SHiten Pandya.Fn bus_dmamap_load
98724503465SHiten Pandyawhich maps buffers pointed to by
98824503465SHiten Pandya.Fa uio
98924503465SHiten Pandyafor DMA transfers.
99024503465SHiten PandyaA
99124503465SHiten Pandya.Vt bus_size_t
99224503465SHiten Pandyaargument is also passed to the callback routine, which contains the size of
99324503465SHiten Pandya.Fa uio ,
99424503465SHiten Pandyai.e.
99524503465SHiten Pandya.Fa uio->uio_resid .
99671bb1f9bSScott LongThe
99781ae4b8dSRuslan Ermilov.Dv BUS_DMA_NOWAIT
99871bb1f9bSScott Longflag is implied, thus no callback deferral will happen.
99971bb1f9bSScott LongReturns the same errors as
100071bb1f9bSScott Long.Fn bus_dmamap_load .
100124503465SHiten Pandya.Pp
100224503465SHiten PandyaIf
100324503465SHiten Pandya.Fa uio->uio_segflg
100424503465SHiten Pandyais
100524503465SHiten Pandya.Dv UIO_USERSPACE ,
100624503465SHiten Pandyathen it is assumed that the buffer,
100724503465SHiten Pandya.Fa uio
100824503465SHiten Pandyais in
100924503465SHiten Pandya.Fa "uio->uio_td->td_proc" Ns 's
101024503465SHiten Pandyaaddress space.
101124503465SHiten PandyaUser space memory must be in-core and wired prior to attempting a map
101224503465SHiten Pandyaload operation.
1013490ec740SWarner LoshPages may be locked using
1014490ec740SWarner Losh.Xr vslock 9 .
101524503465SHiten Pandya.It Fn bus_dmamap_unload "dmat" "map"
101624503465SHiten PandyaUnloads a DMA map.
101724503465SHiten PandyaArguments are as follows:
101881ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa dmam"
101924503465SHiten Pandya.It Fa dmat
102024503465SHiten PandyaDMA tag used to allocate
102124503465SHiten Pandya.Fa map .
102224503465SHiten Pandya.It Fa map
102324503465SHiten PandyaThe DMA map that is to be unloaded.
102424503465SHiten Pandya.El
102524503465SHiten Pandya.Pp
102624503465SHiten Pandya.Fn bus_dmamap_unload
102724503465SHiten Pandyawill not perform any implicit synchronization of DMA buffers.
102824503465SHiten PandyaThis must be done explicitly by a call to
102924503465SHiten Pandya.Fn bus_dmamap_sync
103024503465SHiten Pandyaprior to unloading the map.
103124503465SHiten Pandya.It Fn bus_dmamap_sync "dmat" "map" "op"
103224503465SHiten PandyaPerforms synchronization of a device visible mapping with the CPU visible
103324503465SHiten Pandyamemory referenced by that mapping.
103424503465SHiten PandyaArguments are as follows:
103581ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa dmat"
103624503465SHiten Pandya.It Fa dmat
103724503465SHiten PandyaDMA tag used to allocate
103824503465SHiten Pandya.Fa map .
103924503465SHiten Pandya.It Fa map
104024503465SHiten PandyaThe DMA mapping to be synchronized.
104124503465SHiten Pandya.It Fa op
104224503465SHiten PandyaType of synchronization operation to perform.
104324503465SHiten PandyaSee the definition of
104424503465SHiten Pandya.Vt bus_dmasync_op_t
104524503465SHiten Pandyafor a description of the acceptable values for
104624503465SHiten Pandya.Fa op .
104724503465SHiten Pandya.El
104824503465SHiten Pandya.Pp
104907bf564cSRuslan ErmilovThe
105024503465SHiten Pandya.Fn bus_dmamap_sync
105107bf564cSRuslan Ermilovfunction
105207bf564cSRuslan Ermilovis the method used to ensure that CPU's and device's direct
105307bf564cSRuslan Ermilovmemory access (DMA) to shared
105424503465SHiten Pandyamemory is coherent.
105524503465SHiten PandyaFor example, the CPU might be used to set up the contents of a buffer
105607bf564cSRuslan Ermilovthat is to be made available to a device.
105724503465SHiten PandyaTo ensure that the data are visible via the device's mapping of that
105807bf564cSRuslan Ermilovmemory, the buffer must be loaded and a DMA sync operation of
10596f56dcd4SJohn-Mark Gurney.Dv BUS_DMASYNC_PREWRITE
10602f46d621SJohn Baldwinmust be performed after the CPU has updated the buffer and before the device
10612f46d621SJohn Baldwinaccess is initiated.
10622f46d621SJohn BaldwinIf the CPU modifies this buffer again later, another
106307bf564cSRuslan Ermilov.Dv BUS_DMASYNC_PREWRITE
10642f46d621SJohn Baldwinsync operation must be performed before an additional device
10652f46d621SJohn Baldwinaccess.
10662f46d621SJohn BaldwinConversely, suppose a device updates memory that is to be read by a CPU.
106707bf564cSRuslan ErmilovIn this case, the buffer must be loaded, and a DMA sync operation of
10686f56dcd4SJohn-Mark Gurney.Dv BUS_DMASYNC_PREREAD
10692f46d621SJohn Baldwinmust be performed before the device access is initiated.
107007bf564cSRuslan ErmilovThe CPU will only be able to see the results of this memory update
107107bf564cSRuslan Ermilovonce the DMA operation has completed and a
10726f56dcd4SJohn-Mark Gurney.Dv BUS_DMASYNC_POSTREAD
107307bf564cSRuslan Ermilovsync operation has been performed.
107424503465SHiten Pandya.Pp
107507bf564cSRuslan ErmilovIf read and write operations are not preceded and followed by the
107624503465SHiten Pandyaappropriate synchronization operations, behavior is undefined.
10776f3d2701SScott Long.It Fn bus_dmamem_alloc "dmat" "**vaddr" "flags" "*mapp"
107824503465SHiten PandyaAllocates memory that is mapped into KVA at the address returned
107924503465SHiten Pandyain
108024503465SHiten Pandya.Fa vaddr
10812f46d621SJohn Baldwinand that is permanently loaded into the newly created
108224503465SHiten Pandya.Vt bus_dmamap_t
108324503465SHiten Pandyareturned via
108424503465SHiten Pandya.Fa mapp .
108524503465SHiten PandyaArguments are as follows:
108681ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa alignment"
108724503465SHiten Pandya.It Fa dmat
108824503465SHiten PandyaDMA tag describing the constraints of the DMA mapping.
108924503465SHiten Pandya.It Fa vaddr
109024503465SHiten PandyaPointer to a pointer that will hold the returned KVA mapping of
109124503465SHiten Pandyathe allocated region.
109224503465SHiten Pandya.It Fa flags
109324503465SHiten PandyaFlags are defined as follows:
109481ae4b8dSRuslan Ermilov.Bl -tag -width ".Dv BUS_DMA_NOWAIT"
109524503465SHiten Pandya.It Dv BUS_DMA_WAITOK
109624503465SHiten PandyaThe routine can safely wait (sleep) for resources.
109724503465SHiten Pandya.It Dv BUS_DMA_NOWAIT
109824503465SHiten PandyaThe routine is not allowed to wait for resources.
109924503465SHiten PandyaIf resources are not available,
110024503465SHiten Pandya.Dv ENOMEM
110124503465SHiten Pandyais returned.
110224503465SHiten Pandya.It Dv BUS_DMA_COHERENT
1103afbeac3eSMarius StroblAttempt to map this memory in a coherent fashion.
1104afbeac3eSMarius StroblSee
1105afbeac3eSMarius Strobl.Fn bus_dmamap_create
1106afbeac3eSMarius Stroblabove for a description of this flag.
1107afbeac3eSMarius StroblFor
1108afbeac3eSMarius Strobl.Fn bus_dmamem_alloc ,
1109afbeac3eSMarius Stroblthe
111081ae4b8dSRuslan Ermilov.Dv BUS_DMA_COHERENT
111170254772SWarner Loshflag is currently implemented on arm and arm64.
111282d227dcSMaxime Henrion.It Dv BUS_DMA_ZERO
111382d227dcSMaxime HenrionCauses the allocated memory to be set to all zeros.
1114ba0b1618SRobert Noland.It Dv BUS_DMA_NOCACHE
1115ba0b1618SRobert NolandThe allocated memory will not be cached in the processor caches.
1116ba0b1618SRobert NolandAll memory accesses appear on the bus and are executed
1117ba0b1618SRobert Nolandwithout reordering.
111808390d3bSMarius StroblFor
111908390d3bSMarius Strobl.Fn bus_dmamem_alloc ,
112008390d3bSMarius Stroblthe
1121ba0b1618SRobert Noland.Dv BUS_DMA_NOCACHE
112208390d3bSMarius Stroblflag is currently implemented on amd64 and i386 where it results in the
112308390d3bSMarius StroblStrong Uncacheable PAT to be set for the allocated virtual address range.
112424503465SHiten Pandya.El
112524503465SHiten Pandya.It Fa mapp
11266f3d2701SScott LongPointer to a
11276f3d2701SScott Long.Vt bus_dmamap_t
11286f3d2701SScott Longwhere the resulting DMA map will be stored.
112924503465SHiten Pandya.El
113024503465SHiten Pandya.Pp
113124503465SHiten PandyaThe size of memory to be allocated is
113224503465SHiten Pandya.Fa maxsize
11332f46d621SJohn Baldwinas specified in the call to
11342f46d621SJohn Baldwin.Fn bus_dma_tag_create
11352f46d621SJohn Baldwinfor
113624503465SHiten Pandya.Fa dmat .
113724503465SHiten Pandya.Pp
113824503465SHiten PandyaThe current implementation of
113924503465SHiten Pandya.Fn bus_dmamem_alloc
114024503465SHiten Pandyawill allocate all requests as a single segment.
114124503465SHiten Pandya.Pp
11426f3d2701SScott LongAn initial load operation is required to obtain the bus address of the allocated
11436f3d2701SScott Longmemory, and an unload operation is required before freeing the memory, as
11446f3d2701SScott Longdescribed below in
11456f3d2701SScott Long.Fn bus_dmamem_free .
11466f3d2701SScott LongMaps are automatically handled by this function and should not be explicitly
11476f3d2701SScott Longallocated or destroyed.
11486f3d2701SScott Long.Pp
11496f3d2701SScott LongAlthough an explicit load is not required for each access to the memory
115024503465SHiten Pandyareferenced by the returned map, the synchronization requirements
115124503465SHiten Pandyaas described in the
115224503465SHiten Pandya.Fn bus_dmamap_sync
11539280e5faSMike Pritchardsection still apply and should be used to achieve portability on architectures
11546f3d2701SScott Longwithout coherent buses.
115524503465SHiten Pandya.Pp
115624503465SHiten PandyaReturns
115724503465SHiten Pandya.Er ENOMEM
115824503465SHiten Pandyaif sufficient memory is not available for completing
115924503465SHiten Pandyathe operation.
116024503465SHiten Pandya.It Fn bus_dmamem_free "dmat" "*vaddr" "map"
116124503465SHiten PandyaFrees memory previously allocated by
116224503465SHiten Pandya.Fn bus_dmamem_alloc .
116324503465SHiten PandyaAny mappings
116424503465SHiten Pandyawill be invalidated.
116524503465SHiten PandyaArguments are as follows:
116681ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa vaddr"
116724503465SHiten Pandya.It Fa dmat
116824503465SHiten PandyaDMA tag.
116924503465SHiten Pandya.It Fa vaddr
117024503465SHiten PandyaKernel virtual address of the memory.
117124503465SHiten Pandya.It Fa map
117224503465SHiten PandyaDMA map to be invalidated.
117324503465SHiten Pandya.El
117424503465SHiten Pandya.El
117524503465SHiten Pandya.Sh RETURN VALUES
117624503465SHiten PandyaBehavior is undefined if invalid arguments are passed to
117724503465SHiten Pandyaany of the above functions.
117824503465SHiten PandyaIf sufficient resources cannot be allocated for a given
117924503465SHiten Pandyatransaction,
118024503465SHiten Pandya.Er ENOMEM
118124503465SHiten Pandyais returned.
118224503465SHiten PandyaAll
11832f46d621SJohn Baldwinroutines that are not of type
11842f46d621SJohn Baldwin.Vt void
118524503465SHiten Pandyawill return 0 on success or an error
11862f46d621SJohn Baldwincode on failure as discussed above.
118724503465SHiten Pandya.Pp
118824503465SHiten PandyaAll
118924503465SHiten Pandya.Vt void
119024503465SHiten Pandyaroutines will succeed if provided with valid arguments.
11914905491fSScott Long.Sh LOCKING
11924905491fSScott LongTwo locking protocols are used by
11934905491fSScott Long.Nm .
11944905491fSScott LongThe first is a private global lock that is used to synchronize access to the
11954905491fSScott Longbounce buffer pool on the architectures that make use of them.
11964905491fSScott LongThis lock is strictly a leaf lock that is only used internally to
11974905491fSScott Long.Nm
11984905491fSScott Longand is not exposed to clients of the API.
11994905491fSScott Long.Pp
12004905491fSScott LongThe second protocol involves protecting various resources stored in the tag.
12014905491fSScott LongSince almost all
12024905491fSScott Long.Nm
12034905491fSScott Longoperations are done through requests from the driver that created the tag,
12044905491fSScott Longthe most efficient way to protect the tag resources is through the lock that
12054905491fSScott Longthe driver uses.
12064905491fSScott LongIn cases where
12074905491fSScott Long.Nm
12084905491fSScott Longacts on its own without being called by the driver, the lock primitive
12094905491fSScott Longspecified in the tag is acquired and released automatically.
12104905491fSScott LongAn example of this is when the
12114905491fSScott Long.Fn bus_dmamap_load
1212b1cc1020SGiorgos Keramidascallback function is called from a deferred context instead of the driver
12134905491fSScott Longcontext.
12144905491fSScott LongThis means that certain
12154905491fSScott Long.Nm
121681ae4b8dSRuslan Ermilovfunctions must always be called with the same lock held that is specified in the
121781ae4b8dSRuslan Ermilovtag.
121881ae4b8dSRuslan ErmilovThese functions include:
12194905491fSScott Long.Pp
122081ae4b8dSRuslan Ermilov.Bl -item -offset indent -compact
122181ae4b8dSRuslan Ermilov.It
122281ae4b8dSRuslan Ermilov.Fn bus_dmamap_load
122381ae4b8dSRuslan Ermilov.It
1224a073133cSJim Harris.Fn bus_dmamap_load_bio
1225a073133cSJim Harris.It
1226a073133cSJim Harris.Fn bus_dmamap_load_ccb
122781ae4b8dSRuslan Ermilov.It
122881ae4b8dSRuslan Ermilov.Fn bus_dmamap_load_mbuf
122981ae4b8dSRuslan Ermilov.It
123081ae4b8dSRuslan Ermilov.Fn bus_dmamap_load_mbuf_sg
123181ae4b8dSRuslan Ermilov.It
1232a073133cSJim Harris.Fn bus_dmamap_load_uio
1233a073133cSJim Harris.It
123481ae4b8dSRuslan Ermilov.Fn bus_dmamap_unload
123581ae4b8dSRuslan Ermilov.It
123681ae4b8dSRuslan Ermilov.Fn bus_dmamap_sync
12374905491fSScott Long.El
12384905491fSScott Long.Pp
12394905491fSScott LongThere is one exception to this rule.
12404905491fSScott LongIt is common practice to call some of these functions during driver start-up
12414905491fSScott Longwithout any locks held.
12424905491fSScott LongSo long as there is a guarantee of no possible concurrent use of the tag by
12434905491fSScott Longdifferent threads during this operation, it is safe to not hold a lock for
12444905491fSScott Longthese functions.
12454905491fSScott Long.Pp
12464905491fSScott LongCertain
12474905491fSScott Long.Nm
12484905491fSScott Longoperations should not be called with the driver lock held, either because
12494905491fSScott Longthey are already protected by an internal lock, or because they might sleep
125081ae4b8dSRuslan Ermilovdue to memory or resource allocation.
125181ae4b8dSRuslan ErmilovThe following functions must not be
12524905491fSScott Longcalled with any non-sleepable locks held:
12534905491fSScott Long.Pp
125481ae4b8dSRuslan Ermilov.Bl -item -offset indent -compact
125581ae4b8dSRuslan Ermilov.It
125681ae4b8dSRuslan Ermilov.Fn bus_dma_tag_create
125781ae4b8dSRuslan Ermilov.It
125881ae4b8dSRuslan Ermilov.Fn bus_dmamap_create
125981ae4b8dSRuslan Ermilov.It
126081ae4b8dSRuslan Ermilov.Fn bus_dmamem_alloc
12614905491fSScott Long.El
12624905491fSScott Long.Pp
12634905491fSScott LongAll other functions do not have a locking protocol and can thus be
12642f46d621SJohn Baldwincalled with or without any system or driver locks held.
126524503465SHiten Pandya.Sh SEE ALSO
126624503465SHiten Pandya.Xr devclass 9 ,
126724503465SHiten Pandya.Xr device 9 ,
126824503465SHiten Pandya.Xr driver 9 ,
1269490ec740SWarner Losh.Xr rman 9 ,
1270490ec740SWarner Losh.Xr vslock 9
127124503465SHiten Pandya.Pp
127224503465SHiten Pandya.Rs
127324503465SHiten Pandya.%A "Jason R. Thorpe"
127424503465SHiten Pandya.%T "A Machine-Independent DMA Framework for NetBSD"
127524503465SHiten Pandya.%J "Proceedings of the Summer 1998 USENIX Technical Conference"
127624503465SHiten Pandya.%Q "USENIX Association"
127724503465SHiten Pandya.%D "June 1998"
127824503465SHiten Pandya.Re
127924503465SHiten Pandya.Sh HISTORY
128024503465SHiten PandyaThe
128124503465SHiten Pandya.Nm
128224503465SHiten Pandyainterface first appeared in
128324503465SHiten Pandya.Nx 1.3 .
128424503465SHiten Pandya.Pp
128524503465SHiten PandyaThe
128624503465SHiten Pandya.Nm
128724503465SHiten PandyaAPI was adopted from
128824503465SHiten Pandya.Nx
128924503465SHiten Pandyafor use in the CAM SCSI subsystem.
129024503465SHiten PandyaThe alterations to the original API were aimed to remove the need for
129124503465SHiten Pandyaa
129224503465SHiten Pandya.Vt bus_dma_segment_t
129324503465SHiten Pandyaarray stored in each
129424503465SHiten Pandya.Vt bus_dmamap_t
129524503465SHiten Pandyawhile allowing callers to queue up on scarce resources.
129624503465SHiten Pandya.Sh AUTHORS
129724503465SHiten PandyaThe
129824503465SHiten Pandya.Nm
1299b9b855ddSMaxime Henrioninterface was designed and implemented by
1300b9b855ddSMaxime Henrion.An Jason R. Thorpe
1301b9b855ddSMaxime Henrionof the Numerical Aerospace Simulation Facility, NASA Ames Research Center.
130224503465SHiten PandyaAdditional input on the
130324503465SHiten Pandya.Nm
1304b9b855ddSMaxime Henriondesign was provided by
1305b9b855ddSMaxime Henrion.An -nosplit
1306b9b855ddSMaxime Henrion.An Chris Demetriou ,
1307b9b855ddSMaxime Henrion.An Charles Hannum ,
1308b9b855ddSMaxime Henrion.An Ross Harvey ,
1309b9b855ddSMaxime Henrion.An Matthew Jacob ,
1310b9b855ddSMaxime Henrion.An Jonathan Stone ,
1311b9b855ddSMaxime Henrionand
1312b9b855ddSMaxime Henrion.An Matt Thomas .
131324503465SHiten Pandya.Pp
131424503465SHiten PandyaThe
131524503465SHiten Pandya.Nm
131624503465SHiten Pandyainterface in
131724503465SHiten Pandya.Fx
1318b9b855ddSMaxime Henrionbenefits from the contributions of
1319b9b855ddSMaxime Henrion.An Justin T. Gibbs ,
1320b9b855ddSMaxime Henrion.An Peter Wemm ,
1321b9b855ddSMaxime Henrion.An Doug Rabson ,
1322b9b855ddSMaxime Henrion.An Matthew N. Dodd ,
1323b9b855ddSMaxime Henrion.An Sam Leffler ,
1324b9b855ddSMaxime Henrion.An Maxime Henrion ,
1325b9b855ddSMaxime Henrion.An Jake Burkholder ,
1326b9b855ddSMaxime Henrion.An Takahashi Yoshihiro ,
1327b9b855ddSMaxime Henrion.An Scott Long
1328b9b855ddSMaxime Henrionand many others.
132924503465SHiten Pandya.Pp
1330b9b855ddSMaxime HenrionThis manual page was written by
1331b9b855ddSMaxime Henrion.An Hiten M. Pandya
1332b9b855ddSMaxime Henrionand
1333b9b855ddSMaxime Henrion.An Justin T. Gibbs .
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