/freebsd/sys/contrib/device-tree/Bindings/bus/ |
H A D | qcom,ebi2.txt | 24 CS0 GPIO134 0x1a800000-0x1b000000 (8MB) 25 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB) 26 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB) 27 CS3 GPIO133 0x1d000000-0x25000000 (128 MB) 28 CS4 GPIO132 0x1c800000-0x1d000000 (8MB) 29 CS5 GPIO131 0x1c000000-0x1c800000 (8MB) 58 ranges = <0 0x0 0x1a800000 0x00800000>, 59 <1 0x0 0x1b000000 0x00800000>, 60 <2 0x0 0x1b800000 0x00800000>, 61 <3 0x0 0x1d000000 0x08000000>, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/ |
H A D | mediatek,ipesys.txt | 20 reg = <0 0x1b000000 0 0x1000>;
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H A D | mediatek,ethsys.txt | 26 reg = <0 0x1b000000 0 0x1000>;
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H A D | mediatek,mt8192-clock.yaml | 56 reg = <0x10720000 0x1000>; 63 reg = <0x11007000 0x1000>; 70 reg = <0x11cb1000 0x1000>; 77 reg = <0x11d03000 0x1000>; 84 reg = <0x11d23000 0x1000>; 91 reg = <0x11e01000 0x1000>; 98 reg = <0x11f02000 0x1000>; 105 reg = <0x11f10000 0x1000>; 112 reg = <0x13fbf000 0x1000>; 119 reg = <0x15020000 0x1000>; [all …]
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H A D | mediatek,mt8195-clock.yaml | 68 reg = <0x10720000 0x1000>; 75 reg = <0x11d03000 0x1000>; 82 reg = <0x11e05000 0x1000>; 89 reg = <0x13fbf000 0x1000>; 96 reg = <0x14e00000 0x1000>; 103 reg = <0x14e02000 0x1000>; 110 reg = <0x14e03000 0x1000>; 117 reg = <0x15000000 0x1000>; 124 reg = <0x15110000 0x1000>; 131 reg = <0x15130000 0x1000>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/dma/ |
H A D | apm-xgene-dma.txt | 27 clocks = <&socplldiv2 0>; 28 reg = <0x0 0x1f27c000 0x0 0x1000>; 36 reg = <0x0 0x1f270000 0x0 0x10000>, 37 <0x0 0x1f200000 0x0 0x10000>, 38 <0x0 0x1b000000 0x0 0x400000>, 39 <0x0 0x1054a000 0x0 0x100>; 40 interrupts = <0x0 0x82 0x4>, 41 <0x0 0xb8 0x4>, 42 <0x0 0xb9 0x4>, 43 <0x0 0xba 0x4>, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | ingenic,nemc.yaml | 14 pattern: "^memory-controller@[0-9a-f]+$" 40 ".*@[0-9]+$": 61 reg = <0x13410000 0x10000>; 64 ranges = <1 0 0x1b000000 0x1000000>, 65 <2 0 0x1a00000 [all...] |
/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | ingenic,nand.yaml | 66 reg = <0x13410000 0x10000>; 69 ranges = <1 0 0x1b000000 0x1000000>, 70 <2 0 0x1a000000 0x1000000>, 71 <3 0 0x19000000 0x1000000>, 72 <4 0 0x18000000 0x1000000>, 73 <5 0 0x17000000 0x1000000>, 74 <6 0 0x16000000 0x1000000>; 80 reg = <1 0 0x1000000>; 83 #size-cells = <0>; 94 pinctrl-0 = <&pins_nemc>; [all …]
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/freebsd/sys/contrib/device-tree/src/arc/ |
H A D | axc001.dtsi | 23 ranges = <0x00000000 0x0 0xf0000000 0x10000000>; 26 #clock-cells = <0>; 32 #clock-cells = <0>; 49 reg = < 0x2000 0x80 >; 51 #size-cells = <0>; 53 ictl_intc: gpio-controller@0 { 58 reg = <0>; 68 reg = <0x5000 0x100>; 97 reg = < 0x0 0xe0012000 0x0 0x200 >; 106 reg = <0x0 0x80000000 0x0 0x1b000000>; /* (512 - 32) MiB */ [all …]
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/freebsd/contrib/bearssl/src/symcipher/ |
H A D | aes_common.c | 28 0x01000000, 0x02000000, 0x04000000, 0x08000000, 0x10000000, 0x20000000, 29 0x40000000, 0x80000000, 0x1B000000, 0x36000000 36 0x63, 0x7C, 0x77, 0x7B, 0xF2, 0x6B, 0x6F, 0xC5, 0x30, 0x01, 0x67, 0x2B, 37 0xFE, 0xD7, 0xAB, 0x76, 0xCA, 0x82, 0xC9, 0x7D, 0xFA, 0x59, 0x47, 0xF0, 38 0xAD, 0xD4, 0xA2, 0xAF, 0x9C, 0xA4, 0x72, 0xC0, 0xB7, 0xFD, 0x93, 0x26, 39 0x36, 0x3F, 0xF7, 0xCC, 0x34, 0xA5, 0xE5, 0xF1, 0x71, 0xD8, 0x31, 0x15, 40 0x04, 0xC7, 0x23, 0xC3, 0x18, 0x96, 0x05, 0x9A, 0x07, 0x12, 0x80, 0xE2, 41 0xEB, 0x27, 0xB2, 0x75, 0x09, 0x83, 0x2C, 0x1A, 0x1B, 0x6E, 0x5A, 0xA0, 42 0x52, 0x3B, 0xD6, 0xB3, 0x29, 0xE3, 0x2F, 0x84, 0x53, 0xD1, 0x00, 0xED, 43 0x20, 0xFC, 0xB1, 0x5B, 0x6A, 0xCB, 0xBE, 0x39, 0x4A, 0x4C, 0x58, 0xCF, [all …]
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/freebsd/sys/contrib/device-tree/src/mips/qca/ |
H A D | ar9331.dtsi | 12 #size-cells = <0>; 14 cpu@0 { 18 reg = <0>; 34 #clock-cells = <0>; 57 reg = <0x18000000 0x100>; 64 reg = <0x18020000 0x14>; 76 reg = <0x18040000 0x34>; 92 reg = <0x18050000 0x100>; 102 reg = <0x18060010 0x8>; 113 reg = <0x1806001c 0x4>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt6779.dtsi | 26 #size-cells = <0>; 28 cpu0: cpu@0 { 32 reg = <0x000>; 39 reg = <0x100>; 46 reg = <0x200>; 53 reg = <0x300>; 60 reg = <0x400>; 67 reg = <0x500>; 74 reg = <0x600>; 81 reg = <0x700>; [all …]
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H A D | mt7622.dtsi | 69 #size-cells = <0>; 71 cpu0: cpu@0 { 74 reg = <0x0 0x0>; 89 reg = <0x0 0x1>; 111 #clock-cells = <0>; 116 #clock-cells = <0>; 140 reg = <0 0x4300000 [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/apm/ |
H A D | apm-storm.dtsi | 16 #size-cells = <0>; 18 cpu@0 { 21 reg = <0x0 0x000>; 23 cpu-release-addr = <0x1 0x0000fff8>; 29 reg = <0x0 0x001>; 31 cpu-release-addr = <0x1 0x0000fff [all...] |
/freebsd/sys/contrib/device-tree/src/mips/ingenic/ |
H A D | jz4780.dtsi | 13 #size-cells = <0>; 15 cpu0: cpu@0 { 17 compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 18 reg = <0>; 26 compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 35 #address-cells = <0>; 43 reg = <0x10001000 0x50>; 54 #clock-cells = <0>; 59 #clock-cells = <0>; 65 reg = <0x10000000 0x100>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/mediatek/ |
H A D | mt7629.dtsi | 24 #size-cells = <0>; 27 cpu0: cpu@0 { 30 reg = <0x0>; 38 reg = <0x1>; 51 clk20m: oscillator-0 { 53 #clock-cells = <0>; 60 #clock-cells = <0>; 83 reg = <0x10000000 0x1000>; 89 reg = <0x10002000 0x1000>; 97 reg = <0x10006000 0x1000>; [all …]
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H A D | mt2701.dtsi | 25 #size-cells = <0>; 28 cpu@0 { 31 reg = <0x0>; 36 reg = <0x1>; 41 reg = <0x2>; 46 reg = <0x3>; 57 reg = <0 0x80002000 0 0x1000>; 64 #clock-cells = <0>; 70 #clock-cells = <0>; 73 clk26m: oscillator@0 { [all …]
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H A D | mt7623.dtsi | 73 #size-cells = <0>; 76 cpu0: cpu@0 { 79 reg = <0x0>; 91 reg = <0x1>; 103 reg = <0x2>; 115 reg = <0x3>; 137 #clock-cells = <0>; 142 #clock-cells = <0>; 147 clk26m: oscillator-0 { 149 #clock-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/qcom/ |
H A D | qcom-msm8660.dtsi | 18 #size-cells = <0>; 20 cpu@0 { 24 reg = <0>; 45 reg = <0x0 0x0>; 50 interrupts = <1 9 0x304>; 56 #clock-cells = <0>; 63 #clock-cells = <0>; 70 #clock-cells = <0>; 86 reg = < 0x0208000 [all...] |
/freebsd/sys/contrib/device-tree/src/mips/img/ |
H A D | pistachio.dtsi | 23 #size-cells = <0>; 25 cpu0: cpu@0 { 28 reg = <0>; 46 reg = <0x18100000 0x200>; 56 pinctrl-0 = <&i2c0_pins>; 59 #size-cells = <0>; 64 reg = <0x18100200 0x200>; 74 pinctrl-0 = <&i2c1_pins>; 77 #size-cells = <0>; 82 reg = <0x18100400 0x200>; [all …]
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/freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/aes/ |
H A D | aestab2.h | 49 0x00000001, 0x00000002, 0x00000004, 0x00000008, 50 0x00000010, 0x00000020, 0x00000040, 0x00000080, 51 0x0000001b, 0x00000036 57 0x00000063, 0x0000007c, 0x00000077, 0x0000007b, 58 0x000000f2, 0x0000006b, 0x0000006f, 0x000000c5, 59 0x00000030, 0x00000001, 0x00000067, 0x0000002b, 60 0x000000fe, 0x000000d7, 0x000000ab, 0x00000076, 61 0x000000ca, 0x00000082, 0x000000c9, 0x0000007d, 62 0x000000fa, 0x00000059, 0x00000047, 0x000000f0, 63 0x000000ad, 0x000000d4, 0x000000a2, 0x000000af, [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | ecore_init_values.h | 35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */ 36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */ 37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */ 38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */ 40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */ 41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */ 42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */ 43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */ 44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */ 45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */ [all …]
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/freebsd/crypto/openssl/crypto/aes/asm/ |
H A D | aesp8-ppc.pl | 48 $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef; 49 $flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef; 69 $LITTLE_ENDIAN = ($flavour=~/le$/) ? $SIZE_T : 0; 71 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; 88 my ($zero,$in0,$in1,$key,$rcon,$mask,$tmp)=map("v$_",(0..6)); 98 .long 0x01000000, 0x01000000, 0x01000000, 0x01000000 ?rev 99 .long 0x1b000000, 0x1b000000, 0x1b000000, 0x1b000000 ?rev 100 .long 0x0d0e0f0c, 0x0d0e0f0c, 0x0d0e0f0c, 0x0d0e0f0c ?rev 101 .long 0,0,0,0 ?asis 102 .long 0x0f102132, 0x43546576, 0x8798a9ba, 0xcbdcedfe [all …]
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/freebsd/sys/dev/bhnd/cores/chipc/ |
H A D | chipcreg.h | 46 #define CHIPC_GET_FLAG(_value, _flag) (((_value) & _flag) != 0) 50 #define CHIPC_ID 0x00 51 #define CHIPC_CAPABILITIES 0x04 52 #define CHIPC_CORECTRL 0x08 /* rev >= 1 */ 53 #define CHIPC_BIST 0x0C 55 #define CHIPC_OTPST 0x10 /**< otp status */ 56 #define CHIPC_OTPCTRL 0x14 /**< otp control */ 57 #define CHIPC_OTPPROG 0x18 58 #define CHIPC_OTPLAYOUT 0x1C /**< otp layout (IPX OTP) */ 60 #define CHIPC_INTST 0x20 /**< interrupt status */ [all …]
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/freebsd/contrib/wpa/src/crypto/ |
H A D | aes-internal.c | 57 Td0[x] = Si[x].[0e, 09, 0d, 0b]; 58 Td1[x] = Si[x].[0b, 0e, 09, 0d]; 59 Td2[x] = Si[x].[0d, 0b, 0e, 09]; 60 Td3[x] = Si[x].[09, 0d, 0b, 0e]; 65 0xc66363a5U, 0xf87c7c84U, 0xee777799U, 0xf67b7b8dU, 66 0xfff2f20dU, 0xd66b6bbdU, 0xde6f6fb1U, 0x91c5c554U, 67 0x60303050U, 0x02010103U, 0xce6767a9U, 0x562b2b7dU, 68 0xe7fefe19U, 0xb5d7d762U, 0x4dababe6U, 0xec76769aU, 69 0x8fcaca45U, 0x1f82829dU, 0x89c9c940U, 0xfa7d7d87U, 70 0xeffafa15U, 0xb25959ebU, 0x8e4747c9U, 0xfbf0f00bU, [all …]
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