Lines Matching +full:0 +full:x1b000000

23 		#size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0>;
46 reg = <0x18100000 0x200>;
56 pinctrl-0 = <&i2c0_pins>;
59 #size-cells = <0>;
64 reg = <0x18100200 0x200>;
74 pinctrl-0 = <&i2c1_pins>;
77 #size-cells = <0>;
82 reg = <0x18100400 0x200>;
92 pinctrl-0 = <&i2c2_pins>;
95 #size-cells = <0>;
100 reg = <0x18100600 0x200>;
110 pinctrl-0 = <&i2c3_pins>;
113 #size-cells = <0>;
118 reg = <0x18100800 0x200>;
120 dmas = <&mdc 30 0xffffffff 0>;
126 pinctrl-0 = <&i2s_in_pins>;
129 #sound-dai-cells = <0>;
134 reg = <0x18100a00 0x200>;
136 dmas = <&mdc 23 0xffffffff 0>;
145 pinctrl-0 = <&i2s_out_pins>;
149 #sound-dai-cells = <0>;
154 reg = <0x18100c00 0x100>;
156 dmas = <&mdc 16 0xffffffff 0>;
166 #sound-dai-cells = <0>;
171 reg = <0x18100d00 0x100>;
173 dmas = <&mdc 14 0xffffffff 0>;
181 pinctrl-0 = <&spdif_out_pin>;
185 #sound-dai-cells = <0>;
190 reg = <0x18100e00 0x100>;
192 dmas = <&mdc 15 0xffffffff 0>;
197 pinctrl-0 = <&spdif_in_pin>;
200 #sound-dai-cells = <0>;
208 #sound-dai-cells = <0>;
213 reg = <0x18100f00 0x100>;
217 dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>;
223 #size-cells = <0>;
228 reg = <0x18101000 0x100>;
232 dmas = <&mdc 1 0xffffffff 0>, <&mdc 2 0xffffffff 0>;
239 #size-cells = <0>;
244 reg = <0x18101300 0x100>;
255 reg = <0x18101400 0x100>;
263 pinctrl-0 = <&uart0_pins>, <&uart0_rts_cts_pins>;
270 reg = <0x18101500 0x100>;
279 pinctrl-0 = <&uart1_pins>;
286 reg = <0x18101600 0x24>;
287 adc-reserved-channels = <0x30>;
300 reg = <0x18101c00 0x400>;
307 gpio-ranges = <&pinctrl 0 0 16>;
318 gpio-ranges = <&pinctrl 0 16 16>;
329 gpio-ranges = <&pinctrl 0 32 16>;
340 gpio-ranges = <&pinctrl 0 48 16>;
351 gpio-ranges = <&pinctrl 0 64 16>;
362 gpio-ranges = <&pinctrl 0 80 10>;
736 reg = <0x18102000 0x100>;
746 reg = <0x18102100 0x100>;
757 reg = <0x18102200 0x100>;
764 pinctrl-0 = <&ir_pin>;
771 reg = <0x18120000 0x1c000>;
781 reg = <0x18140000 0x2000>;
789 assigned-clock-rates = <0>, <50000000>;
790 pinctrl-0 = <&enet_pins>;
798 reg = <0x18142000 0x400>;
802 pinctrl-0 = <&sdhost_pins>;
804 fifo-depth = <0x20>;
814 reg = <0x1b000000 0x10000>;
819 reg = <0x18143000 0x1000>;
847 reg = <0x18144000 0x800>;
853 reg = <0x18144800 0x1000>;
861 reg = <0x18148000 0x1000>;
874 reg = <0x18149000 0x200>;
880 reg = <0x18149600 0x100>, <0x18101100 0x4>;
882 dmas = <&mdc 8 0xffffffff 0>;
891 reg = <0x1bdc0000 0x20000>;
905 reg = <0x1bde0000 0x10000>;
910 reg = <0x1bdf0000 0x10000>;
919 img,refclk = <0x2>;
921 #phy-cells = <0>;
926 #clock-cells = <0>;