1*c66ec88fSEmmanuel VadotApplied Micro X-Gene SoC DMA nodes 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotDMA nodes are defined to describe on-chip DMA interfaces in 4*c66ec88fSEmmanuel VadotAPM X-Gene SoC. 5*c66ec88fSEmmanuel Vadot 6*c66ec88fSEmmanuel VadotRequired properties for DMA interfaces: 7*c66ec88fSEmmanuel Vadot- compatible: Should be "apm,xgene-dma". 8*c66ec88fSEmmanuel Vadot- device_type: set to "dma". 9*c66ec88fSEmmanuel Vadot- reg: Address and length of the register set for the device. 10*c66ec88fSEmmanuel Vadot It contains the information of registers in the following order: 11*c66ec88fSEmmanuel Vadot 1st - DMA control and status register address space. 12*c66ec88fSEmmanuel Vadot 2nd - Descriptor ring control and status register address space. 13*c66ec88fSEmmanuel Vadot 3rd - Descriptor ring command register address space. 14*c66ec88fSEmmanuel Vadot 4th - Soc efuse register address space. 15*c66ec88fSEmmanuel Vadot- interrupts: DMA has 5 interrupts sources. 1st interrupt is 16*c66ec88fSEmmanuel Vadot DMA error reporting interrupt. 2nd, 3rd, 4th and 5th interrupts 17*c66ec88fSEmmanuel Vadot are completion interrupts for each DMA channels. 18*c66ec88fSEmmanuel Vadot- clocks: Reference to the clock entry. 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel VadotOptional properties: 21*c66ec88fSEmmanuel Vadot- dma-coherent : Present if dma operations are coherent 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel VadotExample: 24*c66ec88fSEmmanuel Vadot dmaclk: dmaclk@1f27c000 { 25*c66ec88fSEmmanuel Vadot compatible = "apm,xgene-device-clock"; 26*c66ec88fSEmmanuel Vadot #clock-cells = <1>; 27*c66ec88fSEmmanuel Vadot clocks = <&socplldiv2 0>; 28*c66ec88fSEmmanuel Vadot reg = <0x0 0x1f27c000 0x0 0x1000>; 29*c66ec88fSEmmanuel Vadot reg-names = "csr-reg"; 30*c66ec88fSEmmanuel Vadot clock-output-names = "dmaclk"; 31*c66ec88fSEmmanuel Vadot }; 32*c66ec88fSEmmanuel Vadot 33*c66ec88fSEmmanuel Vadot dma: dma@1f270000 { 34*c66ec88fSEmmanuel Vadot compatible = "apm,xgene-storm-dma"; 35*c66ec88fSEmmanuel Vadot device_type = "dma"; 36*c66ec88fSEmmanuel Vadot reg = <0x0 0x1f270000 0x0 0x10000>, 37*c66ec88fSEmmanuel Vadot <0x0 0x1f200000 0x0 0x10000>, 38*c66ec88fSEmmanuel Vadot <0x0 0x1b000000 0x0 0x400000>, 39*c66ec88fSEmmanuel Vadot <0x0 0x1054a000 0x0 0x100>; 40*c66ec88fSEmmanuel Vadot interrupts = <0x0 0x82 0x4>, 41*c66ec88fSEmmanuel Vadot <0x0 0xb8 0x4>, 42*c66ec88fSEmmanuel Vadot <0x0 0xb9 0x4>, 43*c66ec88fSEmmanuel Vadot <0x0 0xba 0x4>, 44*c66ec88fSEmmanuel Vadot <0x0 0xbb 0x4>; 45*c66ec88fSEmmanuel Vadot dma-coherent; 46*c66ec88fSEmmanuel Vadot clocks = <&dmaclk 0>; 47*c66ec88fSEmmanuel Vadot }; 48