Lines Matching +full:0 +full:x1b000000
26 #size-cells = <0>;
28 cpu0: cpu@0 {
32 reg = <0x000>;
39 reg = <0x100>;
46 reg = <0x200>;
53 reg = <0x300>;
60 reg = <0x400>;
67 reg = <0x500>;
74 reg = <0x600>;
81 reg = <0x700>;
88 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW 0>;
93 #clock-cells = <0>;
100 #clock-cells = <0>;
108 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
109 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
110 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
111 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
125 reg = <0 0x0c000000 0 0x40000>, /* GICD */
126 <0 0x0c040000 0 0x200000>; /* GICR */
127 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
130 ppi_cluster0: interrupt-partition-0 {
147 reg = <0 0x0c53a650 0 0x50>;
152 reg = <0 0x10000000 0 0x1000>;
158 reg = <0 0x10001000 0 0x1000>;
164 reg = <0 0x10005000 0 0x1000>,
165 <0 0x11c20000 0 0x1000>,
166 <0 0x11d10000 0 0x1000>,
167 <0 0x11e20000 0 0x1000>,
168 <0 0x11e70000 0 0x1000>,
169 <0 0x11ea0000 0 0x1000>,
170 <0 0x11f20000 0 0x1000>,
171 <0 0x11f30000 0 0x1000>,
172 <0 0x1000b000 0 0x1000>;
180 gpio-ranges = <&pio 0 0 210>;
188 reg = <0 0x1000c000 0 0xe00>;
194 reg = <0 0x1000d000 0 0x1000>;
203 reg = <0 0x10207000 0 0x1000>;
212 reg = <0 0x11002000 0 0x400>;
222 reg = <0 0x11003000 0 0x400>;
232 reg = <0 0x11004000 0 0x400>;
241 reg = <0 0x11210000 0 0x1000>;
247 reg = <0 0x13fbf000 0 0x1000>;
253 reg = <0 0x14000000 0 0x1000>;
259 reg = <0 0x15020000 0 0x1000>;
265 reg = <0 0x16000000 0 0x1000>;
271 reg = <0 0x17000000 0 0x1000>;
277 reg = <0 0x1a000000 0 0x10000>;
283 reg = <0 0x1b000000 0 0x1000>;