Lines Matching +full:0 +full:x1b000000
12 #size-cells = <0>;
14 cpu@0 {
18 reg = <0>;
34 #clock-cells = <0>;
57 reg = <0x18000000 0x100>;
64 reg = <0x18020000 0x14>;
76 reg = <0x18040000 0x34>;
92 reg = <0x18050000 0x100>;
102 reg = <0x18060010 0x8>;
113 reg = <0x1806001c 0x4>;
121 reg = <0x19000000 0x200>;
137 reg = <0x1a000000 0x200>;
156 #size-cells = <0>;
160 #size-cells = <0>;
163 reg = <0x10>;
175 #size-cells = <0>;
177 switch_port0: port@0 {
178 reg = <0x0>;
191 reg = <0x1>;
199 reg = <0x2>;
207 reg = <0x3>;
215 reg = <0x4>;
225 #size-cells = <0>;
229 phy_port0: phy@0 {
230 reg = <0x0>;
231 interrupts = <0>;
236 reg = <0x1>;
237 interrupts = <0>;
242 reg = <0x2>;
243 interrupts = <0>;
248 reg = <0x3>;
249 interrupts = <0>;
254 reg = <0x4>;
255 interrupts = <0>;
265 reg = <0x1b000000 0x200>;
278 reg = <0x1f000000 0x10>;
284 #size-cells = <0>;
296 #phy-cells = <0>;