| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | loongson,liointc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Local I/O Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips and
14 Loongson-2K series chips, as the primary package interrupt controller which
17 1.The Loongson-2K0500 is a single core CPU;
18 2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we
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| H A D | loongson,eiointc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Extended I/O Interrupt Controller
10 - Binbin Zhou <zhoubinbin@loongson.cn>
13 This interrupt controller is found on the Loongson-3 family chips and
14 Loongson-2K series chips and is used to distribute interrupts directly to
18 - $ref: /schemas/interrupt-controller.yaml#
23 - loongson,ls2k0500-eiointc
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| H A D | loongson,htvec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-3 HyperTransport Interrupt Vector Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips for
18 const: loongson,htvec-1.0
28 interrupt-controller: true
30 '#interrupt-cells':
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| H A D | loongson,htpic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-3 HyperTransport Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 - $ref: /schemas/interrupt-controller.yaml#
16 This interrupt controller is found in the Loongson-3 family of chips to transmit
21 const: loongson,htpic-1.0
32 interrupt-controller: true
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| /linux/Documentation/arch/loongarch/ |
| H A D | introduction.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. There are
8 currently 3 variants: a reduced 32-bit version (LA32R), a standard 32-bit
9 version (LA32S) and a 64-bit version (LA64). There are 4 privilege levels
22 ----
24 LoongArch has 32 GPRs ( ``$r0`` ~ ``$r31`` ); each one is 32-bit wide in LA32
25 and 64-bit wide in LA64. ``$r0`` is hard-wired to zero, and the other registers
26 are not architecturally special. (Except ``$r1``, which is hard-wired as the
30 the LoongArch ELF psABI spec, in :ref:`References <loongarch-references>`:
40 ``$r4``-``$r11`` ``$a0``-``$a7`` Argument registers No
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| /linux/drivers/platform/mips/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
12 MIPS platforms, including vendor-specific netbook/laptop/desktop
21 bool "Loongson-3 CPU HWMon Driver"
26 Loongson-3A/3B CPU Hwmon (temperature sensor) driver.
29 bool "Loongson RS780E ACPI Controller"
32 Loongson RS780E PCH ACPI Controller driver.
35 bool "Loongson-2K1000 Reset Controller"
38 Loongson-2K1000 Reset Controller driver.
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| /linux/arch/mips/include/asm/mach-loongson64/ |
| H A D | kernel-entry-init.h | 7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
28 /* Loongson-3A R4+ */
33 /* Loongson-3A R2/R3 */
59 /* Loongson-3A R4+ */
64 /* Loongson-3A R2/R3 */
91 b 2f /* Loongson-3A1000/3A2000/3A3000/3A4000 */
92 1: dins a0, t2, 14, 2 /* Loongson-3B1000/3B1500 need bit 15~14 */
94 3: addiu t9, -1 /* limit mailbox access */
95 bnez t9, 3b
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| H A D | loongson.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
20 /* machine-specific boot configuration */
40 /* machine-specific reboot/halt operation */
49 /* loongson-specific command line, env and memory initialization */
77 #define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
81 #define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
85 #define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
88 #define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
89 /* Loongson-3 specific registers */
92 #define LOONGSON3_REG_TOP (LOONGSON3_REG_BASE+LOONGSON3_REG_SIZE-1)
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| /linux/Documentation/translations/zh_TW/arch/loongarch/ |
| H A D | irq-chip-model.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_TW.rst
5 :Original: Documentation/arch/loongarch/irq-chip-model.rst
6 :Translator: Huacai Chen <chenhuacai@loongson.cn>
15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片組的主中
16 斷控制器）、PCH-LPC（LS7A芯片組的LPC中斷控制器）和PCH-MSI（MSI中斷控制器）。
19 全局中斷控制器（每個芯片一個，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
26 在這種模型裏面，IPI（Inter-Processor Interrupt）和CPU本地時鐘中斷直接發送到CPUINTC，
27 CPU串口（UARTs）中斷髮送到LIOINTC，而其他所有設備的中斷則分別發送到所連接的PCH-PIC/
28 PCH-LPC/PCH-MSI，然後被HTVECINTC統一收集，再發送到LIOINTC，最後到達CPUINTC::
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| H A D | introduction.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_TW.rst
6 :Translator: Huacai Chen <chenhuacai@loongson.cn>
12 LoongArch是一種新的RISC ISA，在一定程度上類似於MIPS和RISC-V。LoongArch指令集
25 ----------
32 :ref:`參考文獻 <loongarch-references-zh_TW>`:
41 ``$r4``-``$r11`` ``$a0``-``$a7`` 參數寄存器 否
42 ``$r4``-``$r5`` ``$v0``-``$v1`` 返回值 否
43 ``$r12``-``$r20`` ``$t0``-``$t8`` 臨時寄存器 否
46 ``$r23``-``$r31`` ``$s0``-``$s8`` 靜態寄存器 是
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| /linux/arch/mips/boot/dts/loongson/ |
| H A D | loongson64-2k1000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
8 compatible = "loongson,loongson2k1000";
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "loongson,gs264";
21 #clock-cells = <1>;
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| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | loongson,ls1b-apbdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/loongson,ls1b-apbdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 APB DMA Controller
10 - Keguang Zhang <keguang.zhang@gmail.com>
13 Loongson-1 APB DMA controller provides 3 independent channels for
19 - const: loongson,ls1b-apbdma
20 - items:
21 - enum:
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| /linux/drivers/irqchip/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
119 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
127 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
181 will be called irq-lan966x-oic.
222 bool "J-Core integrated AIC" if COMPILE_TEST
226 Support for the J-Core integrated AIC.
237 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
240 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
245 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
302 tristate "TS-4800 IRQ controller"
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| /linux/Documentation/translations/zh_CN/arch/loongarch/ |
| H A D | introduction.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_CN.rst
6 :Translator: Huacai Chen <chenhuacai@loongson.cn>
12 LoongArch是一种新的RISC ISA，在一定程度上类似于MIPS和RISC-V。LoongArch指令集
25 ----------
32 :ref:`参考文献 <loongarch-references-zh_CN>`:
41 ``$r4``-``$r11`` ``$a0``-``$a7`` 参数寄存器 否
42 ``$r4``-``$r5`` ``$v0``-``$v1`` 返回值 否
43 ``$r12``-``$r20`` ``$t0``-``$t8`` 临时寄存器 否
46 ``$r23``-``$r31`` ``$s0``-``$s8`` 静态寄存器 是
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| /linux/drivers/gpio/ |
| H A D | gpio-loongson.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Loongson-2F/3A/3B GPIO Support
6 * Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com>
20 #include <loongson.h>
97 struct device *dev = &pdev->dev; in loongson_gpio_probe()
101 return -ENOMEM; in loongson_gpio_probe()
103 gc->label = "loongson-gpio-chip"; in loongson_gpio_probe()
104 gc->base = 0; in loongson_gpio_probe()
105 gc->ngpio = LOONGSON_N_GPIO; in loongson_gpio_probe()
106 gc->get = loongson_gpio_get_value; in loongson_gpio_probe()
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| /linux/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac-loongson1.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Loongson-1 DWMAC glue layer
5 * Copyright (C) 2011-2023 Keguang Zhang <keguang.zhang@gmail.com>
21 /* Loongson-1 SYSCON Registers */
25 /* Loongson-1B SYSCON Register Bits */
27 #define GMAC1_USE_UART0 BIT(3)
32 #define GMAC1_USE_TXCLK BIT(3)
37 /* Loongson-1C SYSCON Register Bits */
52 struct plat_stmmacenet_data *plat = dwmac->plat_dat; in ls1b_dwmac_syscon_init()
53 struct regmap *regmap = dwmac->regmap; in ls1b_dwmac_syscon_init()
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| /linux/drivers/pci/controller/ |
| H A D | pci-loongson.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Loongson PCI Host Controller Driver
12 #include <linux/pci-acpi.h>
13 #include <linux/pci-ecam.h>
41 #define FLAG_DEV_HIDDEN BIT(3)
58 dev->class = PCI_CLASS_BRIDGE_PCI_NORMAL; in bridge_class_quirk()
73 pdev->mmio_always_on = 1; in system_bus_quirk()
74 pdev->non_compliant_bars = 1; in system_bus_quirk()
84 * Some Loongson PCIe ports have hardware limitations on their Maximum Read
87 * bridges. However, some MIPS Loongson firmware doesn't set MRRS properly,
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| /linux/Documentation/devicetree/bindings/mips/loongson/ |
| H A D | rs780e-acpi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mips/loongson/rs780e-acpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson RS780E PCH ACPI Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This controller can be found in Loongson-3 systems with RS780E PCH.
17 const: loongson,rs780e-acpi
23 - compatible
24 - reg
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| /linux/arch/loongarch/include/asm/ |
| H A D | cpu.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
12 * As described in LoongArch specs from Loongson Technology, the PRID register
15 * +---------------+----------------+------------+--------------------+
17 * +---------------+----------------+------------+--------------------+
37 #define PRID_SERIES_LA132 0x8000 /* Loongson 32bit */
38 #define PRID_SERIES_LA264 0xa000 /* Loongson 64bit, 2-issue */
39 #define PRID_SERIES_LA364 0xb000 /* Loongson 64bit, 3-issue */
40 #define PRID_SERIES_LA464 0xc000 /* Loongson 64bit, 4-issue */
41 #define PRID_SERIES_LA664 0xd000 /* Loongson 64bit, 6-issue */
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| /linux/drivers/acpi/ |
| H A D | pci_mcfg.c | 1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/pci-acpi.h>
14 #include <linux/pci-ecam.h>
37 ((end) - (start) + 1), \
52 AL_ECAM("GRAVITON", 0, 3, &al_pcie_ops),
64 QCOM_ECAM32(3),
74 { "HISI ", table_id, 0, (seg) + 3, MCFG_BUS_ANY, ops }
110 THUNDER_PEM_QUIRK(2, 0), /* off-chip devices */
111 THUNDER_PEM_QUIRK(2, 1), /* off-chip devices */
115 THUNDER_ECAM_QUIRK(2, 3),
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| /linux/arch/mips/include/asm/ |
| H A D | cpu.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
18 +----------------+----------------+----------------+----------------+
20 +----------------+----------------+----------------+----------------+
24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
92 #define PRID_IMP_LOONGSON_32 0x4200 /* Loongson-1 */
95 #define PRID_IMP_LOONGSON_64R 0x6100 /* Reduced Loongson-2 */
96 #define PRID_IMP_LOONGSON_64C 0x6300 /* Classic Loongson-2 and Loongson-3 */
97 #define PRID_IMP_LOONGSON_64G 0xc000 /* Generic Loongson-2 and Loongson-3 */
252 #define PRID_REV_LOONGSON1C 0x0020 /* Same as Loongson-1B */
269 * 4-bit bitfields, the 4K seems to simply count up and even newer MTI cores
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| /linux/sound/soc/loongson/ |
| H A D | loongson_i2s.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * ALSA I2S interface for the Loongson platform
5 * Copyright (C) 2023 Loongson Technology Corporation Limited
6 * Author: Yingkun Meng <mengyingkun@loongson.cn>
29 /* Loongson I2S Control Register */
39 #define I2S_CTRL_MCLK_EN BIT(3) /* Enable MCLK */
43 #define LS_I2S_DRVNAME "loongson-i2s"
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| /linux/arch/loongarch/power/ |
| H A D | suspend_asm.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Sleep helper for Loongson-3 sleep mode.
5 * Author: Huacai Chen <chenhuacai@loongson.cn>
6 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
17 addi.d sp, sp, -PT_SIZ
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| /linux/tools/perf/arch/loongarch/entry/syscalls/ |
| H A D | mksyscalltbl | |
| /linux/drivers/thermal/ |
| H A D | loongson2_thermal.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Author: zhanghongchen <zhanghongchen@loongson.cn>
4 * Yinbo Zhu <zhuyinbo@loongson.cn>
5 * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
20 #define LOONGSON2_MAX_SENSOR_SEL_NUM 3
35 * method of the Loongson-2K2000
54 int reg_off = data->chip_data->thermal_sensor_sel * 2; in loongson2_set_ctrl_regs()
59 writew(reg_ctrl, data->ctrl_reg + ctrl_reg + reg_off); in loongson2_set_ctrl_regs()
66 loongson2_set_ctrl_regs(data, clamp(-40, low, high), true, enable); in loongson2_thermal_set()
79 val = readl(data->ctrl_reg + LOONGSON2_THSENS_OUT_REG); in loongson2_2k1000_get_temp()
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