xref: /linux/Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml (revision 11147c16a6e0649cc95f8bb90302e4a99ece30bc) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/loongson,ls7a-pwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Loongson PWM Controller
8
9maintainers:
10  - Binbin Zhou <zhoubinbin@loongson.cn>
11
12description:
13  The Loongson PWM has one pulse width output signal and one pulse input
14  signal to be measured.
15  It can be found on Loongson-2K series cpus and Loongson LS7A bridge chips.
16
17allOf:
18  - $ref: pwm.yaml#
19
20properties:
21  compatible:
22    oneOf:
23      - const: loongson,ls7a-pwm
24      - items:
25          - enum:
26              - loongson,ls2k0500-pwm
27              - loongson,ls2k1000-pwm
28              - loongson,ls2k2000-pwm
29          - const: loongson,ls7a-pwm
30
31  reg:
32    maxItems: 1
33
34  interrupts:
35    maxItems: 1
36
37  clocks:
38    maxItems: 1
39
40  '#pwm-cells':
41    description:
42      The first cell must have a value of 0, which specifies the PWM output signal;
43      The second cell is the period in nanoseconds;
44      The third cell flag supported by this binding is PWM_POLARITY_INVERTED.
45    const: 3
46
47required:
48  - compatible
49  - reg
50  - interrupts
51  - clocks
52
53additionalProperties: false
54
55examples:
56  - |
57    #include <dt-bindings/interrupt-controller/irq.h>
58    #include <dt-bindings/clock/loongson,ls2k-clk.h>
59
60    pwm@1fe22000 {
61        compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm";
62        reg = <0x1fe22000 0x10>;
63        interrupt-parent = <&liointc0>;
64        interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
65        clocks = <&clk LOONGSON2_APB_CLK>;
66        #pwm-cells = <3>;
67    };
68