1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2023 Loongson Technology Corporation Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/clock/loongson,ls2k-clk.h> 10 11/ { 12 #address-cells = <2>; 13 #size-cells = <2>; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu0: cpu@0 { 20 compatible = "loongson,la264"; 21 device_type = "cpu"; 22 reg = <0x0>; 23 clocks = <&clk LOONGSON2_NODE_CLK>; 24 }; 25 }; 26 27 ref_100m: clock-ref-100m { 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 clock-frequency = <100000000>; 31 clock-output-names = "ref_100m"; 32 }; 33 34 cpuintc: interrupt-controller { 35 compatible = "loongson,cpu-interrupt-controller"; 36 #interrupt-cells = <1>; 37 interrupt-controller; 38 }; 39 40 thermal-zones { 41 cpu-thermal { 42 polling-delay-passive = <1000>; 43 polling-delay = <5000>; 44 thermal-sensors = <&tsensor 0>; 45 46 trips { 47 cpu-alert { 48 temperature = <33000>; 49 hysteresis = <2000>; 50 type = "active"; 51 }; 52 53 cpu-crit { 54 temperature = <85000>; 55 hysteresis = <5000>; 56 type = "critical"; 57 }; 58 }; 59 }; 60 }; 61 62 bus@10000000 { 63 compatible = "simple-bus"; 64 ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, 65 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>, 66 <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>, 67 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, 68 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; 69 #address-cells = <2>; 70 #size-cells = <2>; 71 72 isa@16400000 { 73 compatible = "isa"; 74 #size-cells = <1>; 75 #address-cells = <2>; 76 ranges = <1 0x0 0x0 0x16400000 0x4000>; 77 }; 78 79 clk: clock-controller@1fe10400 { 80 compatible = "loongson,ls2k0500-clk"; 81 reg = <0x0 0x1fe10400 0x0 0x2c>; 82 #clock-cells = <1>; 83 clocks = <&ref_100m>; 84 clock-names = "ref_100m"; 85 }; 86 87 dma-controller@1fe10c00 { 88 compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 89 reg = <0 0x1fe10c00 0 0x8>; 90 interrupt-parent = <&eiointc>; 91 interrupts = <67>; 92 clocks = <&clk LOONGSON2_APB_CLK>; 93 #dma-cells = <1>; 94 status = "disabled"; 95 }; 96 97 dma-controller@1fe10c10 { 98 compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 99 reg = <0 0x1fe10c10 0 0x8>; 100 interrupt-parent = <&eiointc>; 101 interrupts = <68>; 102 clocks = <&clk LOONGSON2_APB_CLK>; 103 #dma-cells = <1>; 104 status = "disabled"; 105 }; 106 107 dma-controller@1fe10c20 { 108 compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 109 reg = <0 0x1fe10c20 0 0x8>; 110 interrupt-parent = <&eiointc>; 111 interrupts = <69>; 112 clocks = <&clk LOONGSON2_APB_CLK>; 113 #dma-cells = <1>; 114 status = "disabled"; 115 }; 116 117 dma-controller@1fe10c30 { 118 compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 119 reg = <0 0x1fe10c30 0 0x8>; 120 interrupt-parent = <&eiointc>; 121 interrupts = <70>; 122 clocks = <&clk LOONGSON2_APB_CLK>; 123 #dma-cells = <1>; 124 status = "disabled"; 125 }; 126 127 liointc0: interrupt-controller@1fe11400 { 128 compatible = "loongson,liointc-2.0"; 129 reg = <0x0 0x1fe11400 0x0 0x40>, 130 <0x0 0x1fe11040 0x0 0x8>; 131 reg-names = "main", "isr0"; 132 133 interrupt-controller; 134 #interrupt-cells = <2>; 135 interrupt-parent = <&cpuintc>; 136 interrupts = <2>; 137 interrupt-names = "int0"; 138 139 loongson,parent_int_map = <0xffffffff>, /* int0 */ 140 <0x00000000>, /* int1 */ 141 <0x00000000>, /* int2 */ 142 <0x00000000>; /* int3 */ 143 }; 144 145 liointc1: interrupt-controller@1fe11440 { 146 compatible = "loongson,liointc-2.0"; 147 reg = <0x0 0x1fe11440 0x0 0x40>, 148 <0x0 0x1fe11048 0x0 0x8>; 149 reg-names = "main", "isr0"; 150 151 interrupt-controller; 152 #interrupt-cells = <2>; 153 interrupt-parent = <&cpuintc>; 154 interrupts = <4>; 155 interrupt-names = "int2"; 156 157 loongson,parent_int_map = <0x00000000>, /* int0 */ 158 <0x00000000>, /* int1 */ 159 <0xffffffff>, /* int2 */ 160 <0x00000000>; /* int3 */ 161 }; 162 163 eiointc: interrupt-controller@1fe11600 { 164 compatible = "loongson,ls2k0500-eiointc"; 165 reg = <0x0 0x1fe11600 0x0 0xea00>; 166 interrupt-controller; 167 #interrupt-cells = <1>; 168 interrupt-parent = <&cpuintc>; 169 interrupts = <3>; 170 }; 171 172 pwm@1ff5c000 { 173 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 174 reg = <0x0 0x1ff5c000 0x0 0x10>; 175 interrupt-parent = <&liointc0>; 176 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 177 clocks = <&clk LOONGSON2_APB_CLK>; 178 #pwm-cells = <3>; 179 status = "disabled"; 180 }; 181 182 pwm@1ff5c010 { 183 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 184 reg = <0x0 0x1ff5c010 0x0 0x10>; 185 interrupt-parent = <&liointc0>; 186 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 187 clocks = <&clk LOONGSON2_APB_CLK>; 188 #pwm-cells = <3>; 189 status = "disabled"; 190 }; 191 192 pwm@1ff5c020 { 193 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 194 reg = <0x0 0x1ff5c020 0x0 0x10>; 195 interrupt-parent = <&liointc0>; 196 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 197 clocks = <&clk LOONGSON2_APB_CLK>; 198 #pwm-cells = <3>; 199 status = "disabled"; 200 }; 201 202 pwm@1ff5c030 { 203 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 204 reg = <0x0 0x1ff5c030 0x0 0x10>; 205 interrupt-parent = <&liointc0>; 206 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 207 clocks = <&clk LOONGSON2_APB_CLK>; 208 #pwm-cells = <3>; 209 status = "disabled"; 210 }; 211 212 pwm@1ff5c040 { 213 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 214 reg = <0x0 0x1ff5c040 0x0 0x10>; 215 interrupt-parent = <&liointc0>; 216 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 217 clocks = <&clk LOONGSON2_APB_CLK>; 218 #pwm-cells = <3>; 219 status = "disabled"; 220 }; 221 222 pwm@1ff5c050 { 223 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 224 reg = <0x0 0x1ff5c050 0x0 0x10>; 225 interrupt-parent = <&liointc0>; 226 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 227 clocks = <&clk LOONGSON2_APB_CLK>; 228 #pwm-cells = <3>; 229 status = "disabled"; 230 }; 231 232 pwm@1ff5c060 { 233 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 234 reg = <0x0 0x1ff5c060 0x0 0x10>; 235 interrupt-parent = <&liointc0>; 236 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 237 clocks = <&clk LOONGSON2_APB_CLK>; 238 #pwm-cells = <3>; 239 status = "disabled"; 240 }; 241 242 pwm@1ff5c070 { 243 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 244 reg = <0x0 0x1ff5c070 0x0 0x10>; 245 interrupt-parent = <&liointc0>; 246 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 247 clocks = <&clk LOONGSON2_APB_CLK>; 248 #pwm-cells = <3>; 249 status = "disabled"; 250 }; 251 252 pwm@1ff5c080 { 253 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 254 reg = <0x0 0x1ff5c080 0x0 0x10>; 255 interrupt-parent = <&liointc0>; 256 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 257 clocks = <&clk LOONGSON2_APB_CLK>; 258 #pwm-cells = <3>; 259 status = "disabled"; 260 }; 261 262 pwm@1ff5c090 { 263 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 264 reg = <0x0 0x1ff5c090 0x0 0x10>; 265 interrupt-parent = <&liointc0>; 266 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 267 clocks = <&clk LOONGSON2_APB_CLK>; 268 #pwm-cells = <3>; 269 status = "disabled"; 270 }; 271 272 pwm@1ff5c0a0 { 273 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 274 reg = <0x0 0x1ff5c0a0 0x0 0x10>; 275 interrupt-parent = <&liointc0>; 276 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 277 clocks = <&clk LOONGSON2_APB_CLK>; 278 #pwm-cells = <3>; 279 status = "disabled"; 280 }; 281 282 pwm@1ff5c0b0 { 283 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 284 reg = <0x0 0x1ff5c0b0 0x0 0x10>; 285 interrupt-parent = <&liointc0>; 286 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 287 clocks = <&clk LOONGSON2_APB_CLK>; 288 #pwm-cells = <3>; 289 status = "disabled"; 290 }; 291 292 pwm@1ff5c0c0 { 293 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 294 reg = <0x0 0x1ff5c0c0 0x0 0x10>; 295 interrupt-parent = <&liointc0>; 296 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 297 clocks = <&clk LOONGSON2_APB_CLK>; 298 #pwm-cells = <3>; 299 status = "disabled"; 300 }; 301 302 pwm@1ff5c0d0 { 303 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 304 reg = <0x0 0x1ff5c0d0 0x0 0x10>; 305 interrupt-parent = <&liointc0>; 306 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 307 clocks = <&clk LOONGSON2_APB_CLK>; 308 #pwm-cells = <3>; 309 status = "disabled"; 310 }; 311 312 pwm@1ff5c0e0 { 313 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 314 reg = <0x0 0x1ff5c0e0 0x0 0x10>; 315 interrupt-parent = <&liointc0>; 316 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 317 clocks = <&clk LOONGSON2_APB_CLK>; 318 #pwm-cells = <3>; 319 status = "disabled"; 320 }; 321 322 pwm@1ff5c0f0 { 323 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 324 reg = <0x0 0x1ff5c0f0 0x0 0x10>; 325 interrupt-parent = <&liointc0>; 326 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 327 clocks = <&clk LOONGSON2_APB_CLK>; 328 #pwm-cells = <3>; 329 status = "disabled"; 330 }; 331 332 gmac0: ethernet@1f020000 { 333 compatible = "snps,dwmac-3.70a"; 334 reg = <0x0 0x1f020000 0x0 0x10000>; 335 interrupt-parent = <&liointc0>; 336 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; 337 interrupt-names = "macirq"; 338 status = "disabled"; 339 }; 340 341 gmac1: ethernet@1f030000 { 342 compatible = "snps,dwmac-3.70a"; 343 reg = <0x0 0x1f030000 0x0 0x10000>; 344 interrupt-parent = <&liointc0>; 345 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; 346 interrupt-names = "macirq"; 347 status = "disabled"; 348 }; 349 350 sata: sata@1f040000 { 351 compatible = "snps,spear-ahci"; 352 reg = <0x0 0x1f040000 0x0 0x10000>; 353 interrupt-parent = <&eiointc>; 354 interrupts = <75>; 355 status = "disabled"; 356 }; 357 358 ehci0: usb@1f050000 { 359 compatible = "generic-ehci"; 360 reg = <0x0 0x1f050000 0x0 0x8000>; 361 interrupt-parent = <&eiointc>; 362 interrupts = <71>; 363 status = "disabled"; 364 }; 365 366 ohci0: usb@1f058000 { 367 compatible = "generic-ohci"; 368 reg = <0x0 0x1f058000 0x0 0x8000>; 369 interrupt-parent = <&eiointc>; 370 interrupts = <72>; 371 status = "disabled"; 372 }; 373 374 tsensor: thermal-sensor@1fe11500 { 375 compatible = "loongson,ls2k0500-thermal", "loongson,ls2k1000-thermal"; 376 reg = <0x0 0x1fe11500 0x0 0x30>; 377 interrupt-parent = <&liointc0>; 378 interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 379 #thermal-sensor-cells = <1>; 380 }; 381 382 uart0: serial@1ff40800 { 383 compatible = "ns16550a"; 384 reg = <0x0 0x1ff40800 0x0 0x10>; 385 clock-frequency = <100000000>; 386 interrupt-parent = <&eiointc>; 387 interrupts = <2>; 388 no-loopback-test; 389 status = "disabled"; 390 }; 391 392 i2c0: i2c@1ff48000 { 393 compatible = "loongson,ls2k-i2c"; 394 reg = <0x0 0x1ff48000 0x0 0x0800>; 395 interrupt-parent = <&eiointc>; 396 interrupts = <14>; 397 status = "disabled"; 398 }; 399 400 i2c@1ff48800 { 401 compatible = "loongson,ls2k-i2c"; 402 reg = <0x0 0x1ff48800 0x0 0x0800>; 403 interrupt-parent = <&eiointc>; 404 interrupts = <15>; 405 status = "disabled"; 406 }; 407 408 i2c@1ff49000 { 409 compatible = "loongson,ls2k-i2c"; 410 reg = <0x0 0x1ff49000 0x0 0x0800>; 411 interrupt-parent = <&eiointc>; 412 interrupts = <16>; 413 status = "disabled"; 414 }; 415 416 i2c@1ff49800 { 417 compatible = "loongson,ls2k-i2c"; 418 reg = <0x0 0x1ff49800 0x0 0x0800>; 419 interrupt-parent = <&eiointc>; 420 interrupts = <17>; 421 status = "disabled"; 422 }; 423 424 i2c@1ff4a000 { 425 compatible = "loongson,ls2k-i2c"; 426 reg = <0x0 0x1ff4a000 0x0 0x0800>; 427 interrupt-parent = <&eiointc>; 428 interrupts = <18>; 429 status = "disabled"; 430 }; 431 432 i2c@1ff4a800 { 433 compatible = "loongson,ls2k-i2c"; 434 reg = <0x0 0x1ff4a800 0x0 0x0800>; 435 interrupt-parent = <&eiointc>; 436 interrupts = <19>; 437 status = "disabled"; 438 }; 439 440 pmc: power-management@1ff6c000 { 441 compatible = "loongson,ls2k0500-pmc", "syscon"; 442 reg = <0x0 0x1ff6c000 0x0 0x58>; 443 interrupt-parent = <&eiointc>; 444 interrupts = <56>; 445 loongson,suspend-address = <0x0 0x1c000500>; 446 447 syscon-reboot { 448 compatible = "syscon-reboot"; 449 offset = <0x30>; 450 mask = <0x1>; 451 }; 452 453 syscon-poweroff { 454 compatible = "syscon-poweroff"; 455 regmap = <&pmc>; 456 offset = <0x14>; 457 mask = <0x3c00>; 458 value = <0x3c00>; 459 }; 460 }; 461 462 rtc0: rtc@1ff6c100 { 463 compatible = "loongson,ls2k0500-rtc", "loongson,ls7a-rtc"; 464 reg = <0x0 0x1ff6c100 0x0 0x100>; 465 interrupt-parent = <&eiointc>; 466 interrupts = <35>; 467 status = "disabled"; 468 }; 469 470 pcie@1a000000 { 471 compatible = "loongson,ls2k-pci"; 472 reg = <0x0 0x1a000000 0x0 0x02000000>, 473 <0xfe 0x0 0x0 0x20000000>; 474 #address-cells = <3>; 475 #size-cells = <2>; 476 device_type = "pci"; 477 bus-range = <0x0 0x5>; 478 ranges = <0x01000000 0x0 0x00004000 0x0 0x16404000 0x0 0x00004000>, 479 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>; 480 481 pcie@0,0 { 482 reg = <0x0000 0x0 0x0 0x0 0x0>; 483 #address-cells = <3>; 484 #size-cells = <2>; 485 device_type = "pci"; 486 interrupt-parent = <&eiointc>; 487 #interrupt-cells = <1>; 488 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 489 interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 81>; 490 ranges; 491 }; 492 493 pcie@1,0 { 494 reg = <0x0800 0x0 0x0 0x0 0x0>; 495 #address-cells = <3>; 496 #size-cells = <2>; 497 device_type = "pci"; 498 interrupt-parent = <&eiointc>; 499 #interrupt-cells = <1>; 500 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 501 interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 82>; 502 ranges; 503 }; 504 }; 505 }; 506}; 507