1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2023-2025 Keguang Zhang <keguang.zhang@gmail.com> 4 */ 5 6/dts-v1/; 7#include "loongson1.dtsi" 8 9/ { 10 clkc: clock-controller@1fe78030 { 11 compatible = "loongson,ls1c-clk"; 12 reg = <0x1fe78030 0x8>; 13 clocks = <&xtal>; 14 #clock-cells = <1>; 15 }; 16}; 17 18&soc { 19 syscon: syscon@420 { 20 compatible = "loongson,ls1c-syscon", "syscon"; 21 reg = <0x420 0x8>; 22 }; 23 24 intc4: interrupt-controller@10a0 { 25 compatible = "loongson,ls1x-intc"; 26 reg = <0x10a0 0x18>; 27 interrupt-controller; 28 interrupt-parent = <&cpu_intc>; 29 interrupts = <6>; 30 #interrupt-cells = <2>; 31 }; 32 33 gpio2: gpio@10c8 { 34 compatible = "loongson,ls1x-gpio"; 35 reg = <0x10c8 0x4>; 36 gpio-controller; 37 ngpios = <32>; 38 #gpio-cells = <2>; 39 }; 40 41 gpio3: gpio@10cc { 42 compatible = "loongson,ls1x-gpio"; 43 reg = <0x10cc 0x4>; 44 gpio-controller; 45 ngpios = <32>; 46 #gpio-cells = <2>; 47 }; 48 49 dma: dma-controller@1160 { 50 compatible = "loongson,ls1c-apbdma", "loongson,ls1b-apbdma"; 51 reg = <0x1160 0x4>; 52 interrupt-parent = <&intc0>; 53 interrupts = <13 IRQ_TYPE_EDGE_RISING>, 54 <14 IRQ_TYPE_EDGE_RISING>, 55 <15 IRQ_TYPE_EDGE_RISING>; 56 interrupt-names = "ch0", "ch1", "ch2"; 57 #dma-cells = <1>; 58 }; 59 60 emac: ethernet@110000 { 61 compatible = "loongson,ls1c-emac", "snps,dwmac-3.50a"; 62 reg = <0x110000 0x10000>; 63 clocks = <&clkc LS1X_CLKID_AHB>; 64 clock-names = "stmmaceth"; 65 interrupt-parent = <&intc1>; 66 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; 67 interrupt-names = "macirq"; 68 loongson,ls1-syscon = <&syscon>; 69 snps,pbl = <1>; 70 status = "disabled"; 71 }; 72 73 ehci: usb@120000 { 74 compatible = "generic-ehci"; 75 reg = <0x120000 0x100>; 76 interrupt-parent = <&intc1>; 77 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 78 status = "disabled"; 79 }; 80 81 ohci: usb@128000 { 82 compatible = "generic-ohci"; 83 reg = <0x128000 0x100>; 84 interrupt-parent = <&intc1>; 85 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; 86 status = "disabled"; 87 }; 88}; 89 90&apb { 91 watchdog: watchdog@1c060 { 92 compatible = "loongson,ls1c-wdt"; 93 reg = <0x1c060 0xc>; 94 clocks = <&clkc LS1X_CLKID_APB>; 95 status = "disabled"; 96 }; 97 98 rtc: rtc@24000 { 99 compatible = "loongson,ls1c-rtc"; 100 reg = <0x24000 0x78>; 101 status = "disabled"; 102 }; 103 104 nand: nand-controller@38000 { 105 compatible = "loongson,ls1c-nand-controller"; 106 reg = <0x38000 0x24>, <0x38040 0x4>; 107 reg-names = "nand", "nand-dma"; 108 dmas = <&dma 0>; 109 dma-names = "rxtx"; 110 #address-cells = <1>; 111 #size-cells = <0>; 112 status = "disabled"; 113 114 nand@0 { 115 reg = <0>; 116 label = "ls1x-nand"; 117 nand-use-soft-ecc-engine; 118 nand-ecc-algo = "hamming"; 119 }; 120 }; 121}; 122 123&gpio0 { 124 ngpios = <32>; 125}; 126 127&gpio1 { 128 ngpios = <32>; 129}; 130 131&uart1 { 132 interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; 133}; 134 135&uart2 { 136 interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; 137}; 138 139&uart3 { 140 interrupts = <29 IRQ_TYPE_LEVEL_HIGH>; 141}; 142