Home
last modified time | relevance | path

Searched full:display (Results 1 – 25 of 2383) sorted by relevance

12345678910>>...96

/linux/drivers/gpu/drm/i915/display/
H A Di9xx_display_sr.c15 static void i9xx_display_save_swf(struct intel_display *display) in i9xx_display_save_swf() argument
20 if (DISPLAY_VER(display) == 2 && display->platform.mobile) { in i9xx_display_save_swf()
22 display->restore.saveSWF0[i] = intel_de_read(display, SWF0(display, i)); in i9xx_display_save_swf()
23 display->restore.saveSWF1[i] = intel_de_read(display, SWF1(display, i)); in i9xx_display_save_swf()
26 display->restore.saveSWF3[i] = intel_de_read(display, SWF3(display, i)); in i9xx_display_save_swf()
27 } else if (DISPLAY_VER(display) == 2) { in i9xx_display_save_swf()
29 display->restore.saveSWF1[i] = intel_de_read(display, SWF1(display, i)); in i9xx_display_save_swf()
30 } else if (HAS_GMCH(display)) { in i9xx_display_save_swf()
32 display->restore.saveSWF0[i] = intel_de_read(display, SWF0(display, i)); in i9xx_display_save_swf()
33 display->restore.saveSWF1[i] = intel_de_read(display, SWF1(display, i)); in i9xx_display_save_swf()
[all …]
H A Dvlv_dsi.c89 struct intel_display *display = to_intel_display(&intel_dsi->base); in vlv_dsi_wait_for_fifo_empty() local
95 if (intel_de_wait_for_set(display, MIPI_GEN_FIFO_STAT(display, port), in vlv_dsi_wait_for_fifo_empty()
97 drm_err(display->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
100 static void write_data(struct intel_display *display, in write_data() argument
112 intel_de_write(display, reg, val); in write_data()
116 static void read_data(struct intel_display *display, in read_data() argument
123 u32 val = intel_de_read(display, reg); in read_data()
135 struct intel_display *display = to_intel_display(&intel_dsi->base); in intel_dsi_host_transfer() local
150 data_reg = MIPI_LP_GEN_DATA(display, port); in intel_dsi_host_transfer()
152 ctrl_reg = MIPI_LP_GEN_CTRL(display, port); in intel_dsi_host_transfer()
[all …]
H A Dintel_audio.c43 * DOC: High Definition Audio over HDMI and Display Port
46 * HDMI and Display Port. The audio programming sequences are divided into audio
191 static bool needs_wa_14020863754(struct intel_display *display) in needs_wa_14020863754() argument
193 return DISPLAY_VERx100(display) == 3000 || in needs_wa_14020863754()
194 DISPLAY_VERx100(display) == 2000 || in needs_wa_14020863754()
195 DISPLAY_VERx100(display) == 1401; in needs_wa_14020863754()
201 struct intel_display *display = to_intel_display(crtc_state); in audio_config_hdmi_pixel_clock() local
211 if (DISPLAY_VER(display) < 12 && adjusted_mode->crtc_clock > 148500) in audio_config_hdmi_pixel_clock()
215 drm_dbg_kms(display->drm, in audio_config_hdmi_pixel_clock()
221 drm_dbg_kms(display->drm, in audio_config_hdmi_pixel_clock()
[all …]
H A Dintel_bw.c42 static int dg1_mchbar_read_qgv_point_info(struct intel_display *display, in dg1_mchbar_read_qgv_point_info() argument
46 struct drm_i915_private *i915 = to_i915(display->drm); in dg1_mchbar_read_qgv_point_info()
78 static int icl_pcode_read_qgv_point_info(struct intel_display *display, in icl_pcode_read_qgv_point_info() argument
82 struct drm_i915_private *i915 = to_i915(display->drm); in icl_pcode_read_qgv_point_info()
94 sp->dclk = DIV_ROUND_UP((16667 * dclk) + (DISPLAY_VER(display) >= 12 ? 500 : 0), in icl_pcode_read_qgv_point_info()
107 static int adls_pcode_read_psf_gv_point_info(struct intel_display *display, in adls_pcode_read_psf_gv_point_info() argument
110 struct drm_i915_private *i915 = to_i915(display->drm); in adls_pcode_read_psf_gv_point_info()
128 static u16 icl_qgv_points_mask(struct intel_display *display) in icl_qgv_points_mask() argument
130 unsigned int num_psf_gv_points = display->bw.max[0].num_psf_gv_points; in icl_qgv_points_mask()
131 unsigned int num_qgv_points = display->bw.max[0].num_qgv_points; in icl_qgv_points_mask()
[all …]
H A Dintel_ddi.c31 #include <drm/display/drm_dp_helper.h>
32 #include <drm/display/drm_scdc_helper.h>
112 static bool has_buf_trans_select(struct intel_display *display) in has_buf_trans_select() argument
114 return DISPLAY_VER(display) < 10 && !display->platform.broxton; in has_buf_trans_select()
117 static bool has_iboost(struct intel_display *display) in has_iboost() argument
119 return DISPLAY_VER(display) == 9 && !display->platform.broxton; in has_iboost()
130 struct intel_display *display = to_intel_display(encoder); in hsw_prepare_dp_ddi_buffers() local
137 if (drm_WARN_ON_ONCE(display->drm, !trans)) in hsw_prepare_dp_ddi_buffers()
141 if (has_iboost(display) && in hsw_prepare_dp_ddi_buffers()
146 intel_de_write(display, DDI_BUF_TRANS_LO(port, i), in hsw_prepare_dp_ddi_buffers()
[all …]
H A Dintel_display.c35 #include <drm/display/drm_dp_helper.h>
36 #include <drm/display/drm_dp_tunnel.h>
187 void intel_update_czclk(struct intel_display *display) in intel_update_czclk() argument
189 struct drm_i915_private *dev_priv = to_i915(display->drm); in intel_update_czclk()
191 if (!display->platform.valleyview && !display->platform.cherryview) in intel_update_czclk()
197 drm_dbg_kms(display->drm, "CZ clock rate: %d kHz\n", dev_priv->czclk_freq); in intel_update_czclk()
206 /* WA Display #0827: Gen9:all */
208 skl_wa_827(struct intel_display *display, enum pipe pipe, bool enable) in skl_wa_827() argument
210 intel_de_rmw(display, CLKGATE_DIS_PSL(pipe), in skl_wa_827()
217 icl_wa_scalerclkgating(struct intel_display *display, enum pipe pipe, in icl_wa_scalerclkgating() argument
[all …]
H A Dvlv_dsi_regs.h14 #define _MIPI_MMIO_BASE(display) ((display)->dsi.mmio_base) argument
97 #define MIPI_DEVICE_READY(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DEVICE_R… argument
107 #define MIPI_INTR_STAT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INTR_STAT,… argument
110 #define MIPI_INTR_EN(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INTR_EN, _MI… argument
146 #define MIPI_DSI_FUNC_PRG(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DSI_FUNC… argument
169 #define MIPI_HS_TX_TIMEOUT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HS_TX_T… argument
174 #define MIPI_LP_RX_TIMEOUT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_LP_RX_T… argument
179 #define MIPI_TURN_AROUND_TIMEOUT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_T… argument
184 #define MIPI_DEVICE_RESET_TIMER(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DE… argument
189 #define MIPI_DPI_RESOLUTION(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DPI_RE… argument
[all …]
H A Dintel_opregion.c85 u32 didl[8]; /* supported display devices ID list */
86 u32 cpdl[8]; /* currently presented display list */
87 u32 cadl[8]; /* currently active display list */
98 u32 did2[7]; /* extended supported display devices ID list */
99 u32 cpd2[7]; /* extended attached display devices list */
256 struct intel_display *display; member
272 static int check_swsci_function(struct intel_display *display, u32 function) in check_swsci_function() argument
274 struct intel_opregion *opregion = display->opregion; in check_swsci_function()
304 static int swsci(struct intel_display *display, in swsci() argument
308 struct pci_dev *pdev = to_pci_dev(display->drm->dev); in swsci()
[all …]
H A Dintel_opregion.h37 int intel_opregion_setup(struct intel_display *display);
38 void intel_opregion_cleanup(struct intel_display *display);
40 void intel_opregion_register(struct intel_display *display);
41 void intel_opregion_unregister(struct intel_display *display);
43 void intel_opregion_resume(struct intel_display *display);
44 void intel_opregion_suspend(struct intel_display *display,
47 bool intel_opregion_asle_present(struct intel_display *display);
48 void intel_opregion_asle_intr(struct intel_display *display);
51 int intel_opregion_notify_adapter(struct intel_display *display,
53 int intel_opregion_get_panel_type(struct intel_display *display);
[all …]
H A Dintel_display_driver.h17 void intel_display_driver_init_hw(struct intel_display *display);
18 void intel_display_driver_early_probe(struct intel_display *display);
19 int intel_display_driver_probe_noirq(struct intel_display *display);
20 int intel_display_driver_probe_nogem(struct intel_display *display);
21 int intel_display_driver_probe(struct intel_display *display);
22 void intel_display_driver_register(struct intel_display *display);
23 void intel_display_driver_remove(struct intel_display *display);
24 void intel_display_driver_remove_noirq(struct intel_display *display);
25 void intel_display_driver_remove_nogem(struct intel_display *display);
26 void intel_display_driver_unregister(struct intel_display *display);
[all …]
H A Dintel_vblank.c72 struct intel_display *display = to_intel_display(crtc->dev); in i915_get_vblank_counter() local
108 frame = intel_de_read64_2x32(display, PIPEFRAMEPIXEL(display, pipe), in i915_get_vblank_counter()
109 PIPEFRAME(display, pipe)); in i915_get_vblank_counter()
124 struct intel_display *display = to_intel_display(crtc->dev); in g4x_get_vblank_counter() local
131 return intel_de_read(display, PIPE_FRMCOUNT_G4X(display, pipe)); in g4x_get_vblank_counter()
136 struct intel_display *display = to_intel_display(crtc); in intel_crtc_scanlines_since_frame_timestamp() local
151 * This field provides read back of the display in intel_crtc_scanlines_since_frame_timestamp()
155 scan_prev_time = intel_de_read_fw(display, in intel_crtc_scanlines_since_frame_timestamp()
162 scan_curr_time = intel_de_read_fw(display, IVB_TIMESTAMP_CTR); in intel_crtc_scanlines_since_frame_timestamp()
164 scan_post_time = intel_de_read_fw(display, in intel_crtc_scanlines_since_frame_timestamp()
[all …]
H A Dintel_dp.c40 #include <drm/display/drm_dp_helper.h>
41 #include <drm/display/drm_dp_tunnel.h>
42 #include <drm/display/drm_dsc_helper.h>
43 #include <drm/display/drm_hdmi_helper.h>
176 struct intel_display *display = to_intel_display(intel_dp); in max_dprx_rate() local
191 drm_dbg_kms(display->drm, in max_dprx_rate()
287 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_set_sink_rates() local
297 drm_err(display->drm, in intel_dp_set_sink_rates()
312 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_set_max_sink_lane_count() local
326 drm_err(display->drm, in intel_dp_set_max_sink_lane_count()
[all …]
H A Dintel_encoder.c41 void intel_encoder_suspend_all(struct intel_display *display) in intel_encoder_suspend_all() argument
45 if (!HAS_DISPLAY(display)) in intel_encoder_suspend_all()
52 drm_modeset_lock_all(display->drm); in intel_encoder_suspend_all()
53 for_each_intel_encoder(display->drm, encoder) in intel_encoder_suspend_all()
56 drm_modeset_unlock_all(display->drm); in intel_encoder_suspend_all()
58 for_each_intel_encoder(display->drm, encoder) in intel_encoder_suspend_all()
63 void intel_encoder_shutdown_all(struct intel_display *display) in intel_encoder_shutdown_all() argument
67 if (!HAS_DISPLAY(display)) in intel_encoder_shutdown_all()
74 drm_modeset_lock_all(display->drm); in intel_encoder_shutdown_all()
75 for_each_intel_encoder(display->drm, encoder) in intel_encoder_shutdown_all()
[all …]
H A Dintel_dp_mst.c117 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_mst_dec_active_streams() local
119 drm_dbg_kms(display->drm, "active MST streams %d -> %d\n", in intel_dp_mst_dec_active_streams()
122 if (drm_WARN_ON(display->drm, intel_dp->mst.active_streams == 0)) in intel_dp_mst_dec_active_streams()
130 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_mst_inc_active_streams() local
132 drm_dbg_kms(display->drm, "active MST streams %d -> %d\n", in intel_dp_mst_inc_active_streams()
141 struct intel_display *display = to_intel_display(crtc_state); in intel_dp_mst_max_dpt_bpp() local
145 if (!intel_dp_is_uhbr(crtc_state) || DISPLAY_VER(display) >= 20 || !dsc) in intel_dp_mst_max_dpt_bpp()
158 * - DELL U3224KBA display in intel_dp_mst_max_dpt_bpp()
249 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_mtp_tu_compute_config() local
262 drm_WARN_ON(display->drm, !dsc && (fxp_q4_to_frac(min_bpp_x16) || in intel_dp_mtp_tu_compute_config()
[all …]
/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-display-engine.yaml4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-engine.yaml#
7 title: Allwinner A10 Display Engine Pipeline
14 The display engine pipeline (and its entry point, since it can be
18 The Allwinner A10 Display pipeline is composed of several components
22 display pipeline, when there are multiple components of the same
52 - allwinner,sun4i-a10-display-engine
53 - allwinner,sun5i-a10s-display-engine
54 - allwinner,sun5i-a13-display-engine
55 - allwinner,sun6i-a31-display-engine
56 - allwinner,sun6i-a31s-display-engine
[all …]
H A Dxylon,logicvc-display.yaml5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
8 title: Xylon LogiCVC display controller
14 The Xylon LogiCVC is a display controller that supports multiple layers.
32 - xylon,logicvc-3.02.a-display
33 - xylon,logicvc-4.01.a-display
67 xylon,display-interface:
79 description: Display output interface (C_DISPLAY_INTERFACE).
81 xylon,display-colorspace:
89 description: Display output colorspace (C_DISPLAY_COLOR_SPACE).
91 xylon,display-depth:
[all …]
H A Dallwinner,sun4i-a10-display-frontend.yaml4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-frontend.yaml#
7 title: Allwinner A10 Display Engine Frontend
14 The display engine frontend does formats conversion, scaling,
20 - allwinner,sun4i-a10-display-frontend
21 - allwinner,sun5i-a13-display-frontend
22 - allwinner,sun6i-a31-display-frontend
23 - allwinner,sun7i-a20-display-frontend
24 - allwinner,sun8i-a23-display-frontend
25 - allwinner,sun8i-a33-display-frontend
26 - allwinner,sun9i-a80-display-frontend
[all …]
/linux/drivers/soc/sunxi/
H A Dsunxi_mbus.c13 * The display engine virtual devices are not strictly speaking
18 "allwinner,sun4i-a10-display-engine",
19 "allwinner,sun5i-a10s-display-engine",
20 "allwinner,sun5i-a13-display-engine",
21 "allwinner,sun6i-a31-display-engine",
22 "allwinner,sun6i-a31s-display-engine",
23 "allwinner,sun7i-a20-display-engine",
24 "allwinner,sun8i-a23-display-engine",
25 "allwinner,sun8i-a33-display-engine",
26 "allwinner,sun9i-a80-display-engine",
[all …]
/linux/drivers/video/fbdev/omap2/omapfb/
H A Domapfb-ioctl.c206 struct omap_dss_device *display = fb2display(fbi); in omapfb_setup_mem() local
216 if (display && display->driver->sync) in omapfb_setup_mem()
217 display->driver->sync(display); in omapfb_setup_mem()
281 struct omap_dss_device *display = fb2display(fbi); in omapfb_update_window() local
284 if (!display) in omapfb_update_window()
290 display->driver->get_resolution(display, &dw, &dh); in omapfb_update_window()
295 return display->driver->update(display, x, y, w, h); in omapfb_update_window()
301 struct omap_dss_device *display = fb2display(fbi); in omapfb_set_update_mode() local
307 if (!display) in omapfb_set_update_mode()
315 d = get_display_data(fbdev, display); in omapfb_set_update_mode()
[all …]
/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra186-display.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml#
7 title: NVIDIA Tegra186 (and later) Display Hub
15 pattern: "^display-hub@[0-9a-f]+$"
19 - nvidia,tegra186-display
20 - nvidia,tegra194-display
44 - description: display hub reset
69 "^display@[0-9a-f]+$":
77 const: nvidia,tegra186-display
82 - description: display core clock
83 - description: display stream compression clock
[all …]
/linux/Documentation/devicetree/bindings/auxdisplay/
H A Dmodtronix,lcd2s.yaml7 title: Modtronix engineering LCD2S Character LCD Display
13 The LCD2S is a Character LCD Display manufactured by Modtronix Engineering.
14 The display supports a serial I2C and SPI interface. The driver currently
24 I2C bus address of the display.
26 display-height-chars:
27 description: Height of the display, in character cells.
32 display-width-chars:
33 description: Width of the display, in character cells.
41 - display-height-chars
42 - display-width-chars
[all …]
/linux/drivers/acpi/acpica/
H A Dutbuffer.c22 * display - BYTE, WORD, DWORD, or QWORD display:
27 * base_offset - Beginning buffer offset (display only)
34 void acpi_ut_dump_buffer(u8 *buffer, u32 count, u32 display, u32 base_offset) in acpi_ut_dump_buffer() argument
40 u32 display_data_only = display & DB_DISPLAY_DATA_ONLY; in acpi_ut_dump_buffer()
42 display &= ~DB_DISPLAY_DATA_ONLY; in acpi_ut_dump_buffer()
49 display = DB_BYTE_DISPLAY; in acpi_ut_dump_buffer()
69 acpi_os_printf("%*s", ((display * 2) + 1), " "); in acpi_ut_dump_buffer()
70 j += display; in acpi_ut_dump_buffer()
74 switch (display) { in acpi_ut_dump_buffer()
76 default: /* Default is BYTE display */ in acpi_ut_dump_buffer()
[all …]
/linux/include/video/
H A Ds1d13xxxfb.h44 #define S1DREG_LCD_DISP_HWIDTH 0x0032 /* LCD Horizontal Display Width Register: ((val)+1)*8)=pix/l…
45 #define S1DREG_LCD_NDISP_HPER 0x0034 /* LCD Horizontal Non-Display Period Register: ((val)+1)*8)=N…
48 #define S1DREG_LCD_DISP_VHEIGHT0 0x0038 /* LCD Vertical Display Height Register 0 */
49 #define S1DREG_LCD_DISP_VHEIGHT1 0x0039 /* LCD Vertical Display Height Register 1 */
50 #define S1DREG_LCD_NDISP_VPER 0x003A /* LCD Vertical Non-Display Period Register: (val)+1=NDlines …
53 #define S1DREG_LCD_DISP_MODE 0x0040 /* LCD Display Mode Register */
55 #define S1DREG_LCD_DISP_START0 0x0042 /* LCD Display Start Address Register 0 */
56 #define S1DREG_LCD_DISP_START1 0x0043 /* LCD Display Start Address Register 1 */
57 #define S1DREG_LCD_DISP_START2 0x0044 /* LCD Display Start Address Register 2 */
61 #define S1DREG_LCD_DISP_FIFO_HTC 0x004A /* LCD Display FIFO High Threshold Control Register */
[all …]
/linux/drivers/auxdisplay/
H A Dline-display.c3 * Character line display core support
30 #include "line-display.h"
35 * linedisp_scroll() - scroll the display by a character
38 * Scroll the current message along the display by one character, rearming the
57 /* update the display */ in linedisp_scroll()
72 * @msg: the message to display
75 * Display a new message @msg on the display. @msg can be longer than the
76 * number of characters the display can display, in which case it will begin
77 * scrolling across the display.
97 /* Clear the display */ in linedisp_display()
[all …]
/linux/drivers/gpu/drm/amd/display/modules/hdcp/
H A Dhdcp.c255 struct mod_hdcp_display *display, in update_display_adjustments() argument
262 display->adjust.disable == true && in update_display_adjustments()
264 display->adjust.disable = false; in update_display_adjustments()
271 display->adjust.disable = true; in update_display_adjustments()
275 memcmp(adj, &display->adjust, in update_display_adjustments()
320 struct mod_hdcp_link *link, struct mod_hdcp_display *display, in mod_hdcp_add_display() argument
326 HDCP_TOP_INTERFACE_TRACE_WITH_INDEX(hdcp, display->index); in mod_hdcp_add_display()
329 /* skip inactive display */ in mod_hdcp_add_display()
330 if (display->state != MOD_HDCP_DISPLAY_ACTIVE) { in mod_hdcp_add_display()
335 /* check existing display container */ in mod_hdcp_add_display()
[all …]

12345678910>>...96