1f1d46c11SPaul Kocialkowski# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2f1d46c11SPaul Kocialkowski# Copyright 2019 Bootlin 3f1d46c11SPaul Kocialkowski%YAML 1.2 4f1d46c11SPaul Kocialkowski--- 5*4334aec0SRob Herring$id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml# 6*4334aec0SRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml# 7f1d46c11SPaul Kocialkowski 8f1d46c11SPaul Kocialkowskititle: Xylon LogiCVC display controller 9f1d46c11SPaul Kocialkowski 10f1d46c11SPaul Kocialkowskimaintainers: 11f1d46c11SPaul Kocialkowski - Paul Kocialkowski <paul.kocialkowski@bootlin.com> 12f1d46c11SPaul Kocialkowski 13f1d46c11SPaul Kocialkowskidescription: | 14f1d46c11SPaul Kocialkowski The Xylon LogiCVC is a display controller that supports multiple layers. 15f1d46c11SPaul Kocialkowski It is usually implemented as programmable logic and was optimized for use 16f1d46c11SPaul Kocialkowski with Xilinx Zynq-7000 SoCs and Xilinx FPGAs. 17f1d46c11SPaul Kocialkowski 18f1d46c11SPaul Kocialkowski Because the controller is intended for use in a FPGA, most of the 19f1d46c11SPaul Kocialkowski configuration of the controller takes place at logic configuration bitstream 20f1d46c11SPaul Kocialkowski synthesis time. As a result, many of the device-tree bindings are meant to 21f1d46c11SPaul Kocialkowski reflect the synthesis configuration and must not be configured differently. 22f1d46c11SPaul Kocialkowski Matching synthesis parameters are provided when applicable. 23f1d46c11SPaul Kocialkowski 24f1d46c11SPaul Kocialkowski Layers are declared in the "layers" sub-node and have dedicated configuration. 25f1d46c11SPaul Kocialkowski In version 3 of the controller, each layer has fixed memory offset and address 26f1d46c11SPaul Kocialkowski starting from the video memory base address for its framebuffer. In version 4, 27f1d46c11SPaul Kocialkowski framebuffers are configured with a direct memory address instead. 28f1d46c11SPaul Kocialkowski 29f1d46c11SPaul Kocialkowskiproperties: 30f1d46c11SPaul Kocialkowski compatible: 31f1d46c11SPaul Kocialkowski enum: 32f1d46c11SPaul Kocialkowski - xylon,logicvc-3.02.a-display 33f1d46c11SPaul Kocialkowski - xylon,logicvc-4.01.a-display 34f1d46c11SPaul Kocialkowski 35f1d46c11SPaul Kocialkowski reg: 36f1d46c11SPaul Kocialkowski maxItems: 1 37f1d46c11SPaul Kocialkowski 38f1d46c11SPaul Kocialkowski clocks: 39f1d46c11SPaul Kocialkowski minItems: 1 40f1d46c11SPaul Kocialkowski maxItems: 4 41f1d46c11SPaul Kocialkowski 42f1d46c11SPaul Kocialkowski clock-names: 43f1d46c11SPaul Kocialkowski minItems: 1 44f1d46c11SPaul Kocialkowski items: 45f1d46c11SPaul Kocialkowski # vclk is required and must be provided as first item. 46f1d46c11SPaul Kocialkowski - const: vclk 47f1d46c11SPaul Kocialkowski # Other clocks are optional and can be provided in any order. 48f1d46c11SPaul Kocialkowski - enum: 49f1d46c11SPaul Kocialkowski - vclk2 50f1d46c11SPaul Kocialkowski - lvdsclk 51f1d46c11SPaul Kocialkowski - lvdsclkn 52f1d46c11SPaul Kocialkowski - enum: 53f1d46c11SPaul Kocialkowski - vclk2 54f1d46c11SPaul Kocialkowski - lvdsclk 55f1d46c11SPaul Kocialkowski - lvdsclkn 56f1d46c11SPaul Kocialkowski - enum: 57f1d46c11SPaul Kocialkowski - vclk2 58f1d46c11SPaul Kocialkowski - lvdsclk 59f1d46c11SPaul Kocialkowski - lvdsclkn 60f1d46c11SPaul Kocialkowski 61f1d46c11SPaul Kocialkowski interrupts: 62f1d46c11SPaul Kocialkowski maxItems: 1 63f1d46c11SPaul Kocialkowski 64f1d46c11SPaul Kocialkowski memory-region: 65f1d46c11SPaul Kocialkowski maxItems: 1 66f1d46c11SPaul Kocialkowski 67f1d46c11SPaul Kocialkowski xylon,display-interface: 68f1d46c11SPaul Kocialkowski enum: 69f1d46c11SPaul Kocialkowski # Parallel RGB interface (C_DISPLAY_INTERFACE == 0) 70f1d46c11SPaul Kocialkowski - parallel-rgb 71f1d46c11SPaul Kocialkowski # ITU-T BR656 interface (C_DISPLAY_INTERFACE == 1) 72f1d46c11SPaul Kocialkowski - bt656 73f1d46c11SPaul Kocialkowski # 4-bit LVDS interface (C_DISPLAY_INTERFACE == 2) 74f1d46c11SPaul Kocialkowski - lvds-4bits 75f1d46c11SPaul Kocialkowski # 3-bit LVDS interface (C_DISPLAY_INTERFACE == 4) 76f1d46c11SPaul Kocialkowski - lvds-3bits 77f1d46c11SPaul Kocialkowski # DVI interface (C_DISPLAY_INTERFACE == 5) 78f1d46c11SPaul Kocialkowski - dvi 79f1d46c11SPaul Kocialkowski description: Display output interface (C_DISPLAY_INTERFACE). 80f1d46c11SPaul Kocialkowski 81f1d46c11SPaul Kocialkowski xylon,display-colorspace: 82f1d46c11SPaul Kocialkowski enum: 83f1d46c11SPaul Kocialkowski # RGB colorspace (C_DISPLAY_COLOR_SPACE == 0) 84f1d46c11SPaul Kocialkowski - rgb 85f1d46c11SPaul Kocialkowski # YUV 4:2:2 colorspace (C_DISPLAY_COLOR_SPACE == 1) 86f1d46c11SPaul Kocialkowski - yuv422 87f1d46c11SPaul Kocialkowski # YUV 4:4:4 colorspace (C_DISPLAY_COLOR_SPACE == 2) 88f1d46c11SPaul Kocialkowski - yuv444 89f1d46c11SPaul Kocialkowski description: Display output colorspace (C_DISPLAY_COLOR_SPACE). 90f1d46c11SPaul Kocialkowski 91f1d46c11SPaul Kocialkowski xylon,display-depth: 92*4334aec0SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 93f1d46c11SPaul Kocialkowski description: Display output depth (C_PIXEL_DATA_WIDTH). 94f1d46c11SPaul Kocialkowski 95f1d46c11SPaul Kocialkowski xylon,row-stride: 96*4334aec0SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 97f1d46c11SPaul Kocialkowski description: Fixed number of pixels in a framebuffer row (C_ROW_STRIDE). 98f1d46c11SPaul Kocialkowski 99f1d46c11SPaul Kocialkowski xylon,dithering: 100*4334aec0SRob Herring $ref: /schemas/types.yaml#/definitions/flag 101f1d46c11SPaul Kocialkowski description: Dithering module is enabled (C_XCOLOR) 102f1d46c11SPaul Kocialkowski 103f1d46c11SPaul Kocialkowski xylon,background-layer: 104*4334aec0SRob Herring $ref: /schemas/types.yaml#/definitions/flag 105f1d46c11SPaul Kocialkowski description: | 106f1d46c11SPaul Kocialkowski The last layer is used to display a black background (C_USE_BACKGROUND). 107f1d46c11SPaul Kocialkowski The layer must still be registered. 108f1d46c11SPaul Kocialkowski 109f1d46c11SPaul Kocialkowski xylon,layers-configurable: 110*4334aec0SRob Herring $ref: /schemas/types.yaml#/definitions/flag 111f1d46c11SPaul Kocialkowski description: | 112f1d46c11SPaul Kocialkowski Configuration of layers' size, position and offset is enabled 113f1d46c11SPaul Kocialkowski (C_USE_SIZE_POSITION). 114f1d46c11SPaul Kocialkowski 115f1d46c11SPaul Kocialkowski layers: 116f1d46c11SPaul Kocialkowski type: object 117f1d46c11SPaul Kocialkowski 118f1d46c11SPaul Kocialkowski properties: 119f1d46c11SPaul Kocialkowski "#address-cells": 120f1d46c11SPaul Kocialkowski const: 1 121f1d46c11SPaul Kocialkowski 122f1d46c11SPaul Kocialkowski "#size-cells": 123f1d46c11SPaul Kocialkowski const: 0 124f1d46c11SPaul Kocialkowski 125f1d46c11SPaul Kocialkowski patternProperties: 126f1d46c11SPaul Kocialkowski "^layer@[0-9]+$": 127f1d46c11SPaul Kocialkowski type: object 128f1d46c11SPaul Kocialkowski 129f1d46c11SPaul Kocialkowski properties: 130f1d46c11SPaul Kocialkowski reg: 131f1d46c11SPaul Kocialkowski maxItems: 1 132f1d46c11SPaul Kocialkowski 133f1d46c11SPaul Kocialkowski xylon,layer-depth: 134*4334aec0SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 135f1d46c11SPaul Kocialkowski description: Layer depth (C_LAYER_X_DATA_WIDTH). 136f1d46c11SPaul Kocialkowski 137f1d46c11SPaul Kocialkowski xylon,layer-colorspace: 138f1d46c11SPaul Kocialkowski enum: 139f1d46c11SPaul Kocialkowski # RGB colorspace (C_LAYER_X_TYPE == 0) 140f1d46c11SPaul Kocialkowski - rgb 141f1d46c11SPaul Kocialkowski # YUV packed colorspace (C_LAYER_X_TYPE == 0) 142f1d46c11SPaul Kocialkowski - yuv 143f1d46c11SPaul Kocialkowski description: Layer colorspace (C_LAYER_X_TYPE). 144f1d46c11SPaul Kocialkowski 145f1d46c11SPaul Kocialkowski xylon,layer-alpha-mode: 146f1d46c11SPaul Kocialkowski enum: 147f1d46c11SPaul Kocialkowski # Alpha is configured layer-wide (C_LAYER_X_ALPHA_MODE == 0) 148f1d46c11SPaul Kocialkowski - layer 149f1d46c11SPaul Kocialkowski # Alpha is configured per-pixel (C_LAYER_X_ALPHA_MODE == 1) 150f1d46c11SPaul Kocialkowski - pixel 151f1d46c11SPaul Kocialkowski description: Alpha mode for the layer (C_LAYER_X_ALPHA_MODE). 152f1d46c11SPaul Kocialkowski 153f1d46c11SPaul Kocialkowski xylon,layer-base-offset: 154*4334aec0SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 155f1d46c11SPaul Kocialkowski description: | 156f1d46c11SPaul Kocialkowski Offset in number of lines (C_LAYER_X_OFFSET) starting from the 157f1d46c11SPaul Kocialkowski video RAM base (C_VMEM_BASEADDR), only for version 3. 158f1d46c11SPaul Kocialkowski 159f1d46c11SPaul Kocialkowski xylon,layer-buffer-offset: 160*4334aec0SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 161f1d46c11SPaul Kocialkowski description: | 162f1d46c11SPaul Kocialkowski Offset in number of lines (C_BUFFER_*_OFFSET) starting from the 163f1d46c11SPaul Kocialkowski layer base offset for the second buffer used in double-buffering. 164f1d46c11SPaul Kocialkowski 165f1d46c11SPaul Kocialkowski xylon,layer-primary: 166*4334aec0SRob Herring $ref: /schemas/types.yaml#/definitions/flag 167f1d46c11SPaul Kocialkowski description: | 168f1d46c11SPaul Kocialkowski Layer should be registered as a primary plane (exactly one is 169f1d46c11SPaul Kocialkowski required). 170f1d46c11SPaul Kocialkowski 171f1d46c11SPaul Kocialkowski additionalProperties: false 172f1d46c11SPaul Kocialkowski 173f1d46c11SPaul Kocialkowski required: 174f1d46c11SPaul Kocialkowski - reg 175f1d46c11SPaul Kocialkowski - xylon,layer-depth 176f1d46c11SPaul Kocialkowski - xylon,layer-colorspace 177f1d46c11SPaul Kocialkowski - xylon,layer-alpha-mode 178f1d46c11SPaul Kocialkowski 179f1d46c11SPaul Kocialkowski required: 180f1d46c11SPaul Kocialkowski - "#address-cells" 181f1d46c11SPaul Kocialkowski - "#size-cells" 182f1d46c11SPaul Kocialkowski - layer@0 183f1d46c11SPaul Kocialkowski 184f1d46c11SPaul Kocialkowski additionalProperties: false 185f1d46c11SPaul Kocialkowski 186f1d46c11SPaul Kocialkowski description: | 187f1d46c11SPaul Kocialkowski The description of the display controller layers, containing layer 188f1d46c11SPaul Kocialkowski sub-nodes that each describe a registered layer. 189f1d46c11SPaul Kocialkowski 190f1d46c11SPaul Kocialkowski port: 191f1d46c11SPaul Kocialkowski $ref: /schemas/graph.yaml#/properties/port 192f1d46c11SPaul Kocialkowski description: | 193f1d46c11SPaul Kocialkowski Video output port, typically connected to a panel or bridge. 194f1d46c11SPaul Kocialkowski 195f1d46c11SPaul KocialkowskiadditionalProperties: false 196f1d46c11SPaul Kocialkowski 197f1d46c11SPaul Kocialkowskirequired: 198f1d46c11SPaul Kocialkowski - compatible 199f1d46c11SPaul Kocialkowski - reg 200f1d46c11SPaul Kocialkowski - clocks 201f1d46c11SPaul Kocialkowski - clock-names 202f1d46c11SPaul Kocialkowski - interrupts 203f1d46c11SPaul Kocialkowski - xylon,display-interface 204f1d46c11SPaul Kocialkowski - xylon,display-colorspace 205f1d46c11SPaul Kocialkowski - xylon,display-depth 206f1d46c11SPaul Kocialkowski - xylon,row-stride 207f1d46c11SPaul Kocialkowski - layers 208f1d46c11SPaul Kocialkowski - port 209f1d46c11SPaul Kocialkowski 210f1d46c11SPaul Kocialkowskiexamples: 211f1d46c11SPaul Kocialkowski - | 212f1d46c11SPaul Kocialkowski #include <dt-bindings/interrupt-controller/irq.h> 213f1d46c11SPaul Kocialkowski 214f1d46c11SPaul Kocialkowski logicvc: logicvc@43c00000 { 215f1d46c11SPaul Kocialkowski compatible = "xylon,logicvc-3.02.a", "syscon", "simple-mfd"; 216f1d46c11SPaul Kocialkowski reg = <0x43c00000 0x6000>; 217f1d46c11SPaul Kocialkowski 218f1d46c11SPaul Kocialkowski #address-cells = <1>; 219f1d46c11SPaul Kocialkowski #size-cells = <1>; 220f1d46c11SPaul Kocialkowski 221f1d46c11SPaul Kocialkowski logicvc_display: display@0 { 222f1d46c11SPaul Kocialkowski compatible = "xylon,logicvc-3.02.a-display"; 223f1d46c11SPaul Kocialkowski reg = <0x0 0x6000>; 224f1d46c11SPaul Kocialkowski 225f1d46c11SPaul Kocialkowski memory-region = <&logicvc_cma>; 226f1d46c11SPaul Kocialkowski 227f1d46c11SPaul Kocialkowski clocks = <&logicvc_vclk 0>, <&logicvc_lvdsclk 0>; 228f1d46c11SPaul Kocialkowski clock-names = "vclk", "lvdsclk"; 229f1d46c11SPaul Kocialkowski 230f1d46c11SPaul Kocialkowski interrupt-parent = <&intc>; 231f1d46c11SPaul Kocialkowski interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; 232f1d46c11SPaul Kocialkowski 233f1d46c11SPaul Kocialkowski xylon,display-interface = "lvds-4bits"; 234f1d46c11SPaul Kocialkowski xylon,display-colorspace = "rgb"; 235f1d46c11SPaul Kocialkowski xylon,display-depth = <16>; 236f1d46c11SPaul Kocialkowski xylon,row-stride = <1024>; 237f1d46c11SPaul Kocialkowski 238f1d46c11SPaul Kocialkowski xylon,layers-configurable; 239f1d46c11SPaul Kocialkowski 240f1d46c11SPaul Kocialkowski layers { 241f1d46c11SPaul Kocialkowski #address-cells = <1>; 242f1d46c11SPaul Kocialkowski #size-cells = <0>; 243f1d46c11SPaul Kocialkowski 244f1d46c11SPaul Kocialkowski layer@0 { 245f1d46c11SPaul Kocialkowski reg = <0>; 246f1d46c11SPaul Kocialkowski xylon,layer-depth = <16>; 247f1d46c11SPaul Kocialkowski xylon,layer-colorspace = "rgb"; 248f1d46c11SPaul Kocialkowski xylon,layer-alpha-mode = "layer"; 249f1d46c11SPaul Kocialkowski xylon,layer-base-offset = <0>; 250f1d46c11SPaul Kocialkowski xylon,layer-buffer-offset = <480>; 251f1d46c11SPaul Kocialkowski xylon,layer-primary; 252f1d46c11SPaul Kocialkowski }; 253f1d46c11SPaul Kocialkowski 254f1d46c11SPaul Kocialkowski layer@1 { 255f1d46c11SPaul Kocialkowski reg = <1>; 256f1d46c11SPaul Kocialkowski xylon,layer-depth = <16>; 257f1d46c11SPaul Kocialkowski xylon,layer-colorspace = "rgb"; 258f1d46c11SPaul Kocialkowski xylon,layer-alpha-mode = "layer"; 259f1d46c11SPaul Kocialkowski xylon,layer-base-offset = <2400>; 260f1d46c11SPaul Kocialkowski xylon,layer-buffer-offset = <480>; 261f1d46c11SPaul Kocialkowski }; 262f1d46c11SPaul Kocialkowski 263f1d46c11SPaul Kocialkowski layer@2 { 264f1d46c11SPaul Kocialkowski reg = <2>; 265f1d46c11SPaul Kocialkowski xylon,layer-depth = <16>; 266f1d46c11SPaul Kocialkowski xylon,layer-colorspace = "rgb"; 267f1d46c11SPaul Kocialkowski xylon,layer-alpha-mode = "layer"; 268f1d46c11SPaul Kocialkowski xylon,layer-base-offset = <960>; 269f1d46c11SPaul Kocialkowski xylon,layer-buffer-offset = <480>; 270f1d46c11SPaul Kocialkowski }; 271f1d46c11SPaul Kocialkowski 272f1d46c11SPaul Kocialkowski layer@3 { 273f1d46c11SPaul Kocialkowski reg = <3>; 274f1d46c11SPaul Kocialkowski xylon,layer-depth = <16>; 275f1d46c11SPaul Kocialkowski xylon,layer-colorspace = "rgb"; 276f1d46c11SPaul Kocialkowski xylon,layer-alpha-mode = "layer"; 277f1d46c11SPaul Kocialkowski xylon,layer-base-offset = <480>; 278f1d46c11SPaul Kocialkowski xylon,layer-buffer-offset = <480>; 279f1d46c11SPaul Kocialkowski }; 280f1d46c11SPaul Kocialkowski 281f1d46c11SPaul Kocialkowski layer@4 { 282f1d46c11SPaul Kocialkowski reg = <4>; 283f1d46c11SPaul Kocialkowski xylon,layer-depth = <16>; 284f1d46c11SPaul Kocialkowski xylon,layer-colorspace = "rgb"; 285f1d46c11SPaul Kocialkowski xylon,layer-alpha-mode = "layer"; 286f1d46c11SPaul Kocialkowski xylon,layer-base-offset = <8192>; 287f1d46c11SPaul Kocialkowski xylon,layer-buffer-offset = <480>; 288f1d46c11SPaul Kocialkowski }; 289f1d46c11SPaul Kocialkowski }; 290f1d46c11SPaul Kocialkowski 291f1d46c11SPaul Kocialkowski port { 292f1d46c11SPaul Kocialkowski #address-cells = <1>; 293f1d46c11SPaul Kocialkowski #size-cells = <0>; 294f1d46c11SPaul Kocialkowski 295f1d46c11SPaul Kocialkowski logicvc_output: endpoint@0 { 296f1d46c11SPaul Kocialkowski reg = <0>; 297f1d46c11SPaul Kocialkowski remote-endpoint = <&panel_input>; 298f1d46c11SPaul Kocialkowski }; 299f1d46c11SPaul Kocialkowski }; 300f1d46c11SPaul Kocialkowski }; 301f1d46c11SPaul Kocialkowski }; 302